SparcInstrInfo.cpp revision b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0
1//===- SparcV8InstrInfo.cpp - SparcV8 Instruction Information ---*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the SparcV8 implementation of the TargetInstrInfo class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "SparcV8InstrInfo.h" 15#include "SparcV8.h" 16#include "llvm/CodeGen/MachineInstrBuilder.h" 17#include "SparcV8GenInstrInfo.inc" 18using namespace llvm; 19 20SparcV8InstrInfo::SparcV8InstrInfo() 21 : TargetInstrInfo(SparcV8Insts, sizeof(SparcV8Insts)/sizeof(SparcV8Insts[0])){ 22} 23 24static bool isZeroImmed (const MachineOperand &op) { 25 return (op.isImmediate() && op.getImmedValue() == 0); 26} 27 28/// Return true if the instruction is a register to register move and 29/// leave the source and dest operands in the passed parameters. 30/// 31bool SparcV8InstrInfo::isMoveInstr(const MachineInstr &MI, 32 unsigned &SrcReg, unsigned &DstReg) const { 33 // We look for 3 kinds of patterns here: 34 // or with G0 or 0 35 // add with G0 or 0 36 // fmovs or FpMOVD (pseudo double move). 37 if (MI.getOpcode() == V8::ORrr || MI.getOpcode() == V8::ADDrr) { 38 if (MI.getOperand(1).getReg() == V8::G0) { 39 DstReg = MI.getOperand(0).getReg(); 40 SrcReg = MI.getOperand(2).getReg(); 41 return true; 42 } else if (MI.getOperand (2).getReg() == V8::G0) { 43 DstReg = MI.getOperand(0).getReg(); 44 SrcReg = MI.getOperand(1).getReg(); 45 return true; 46 } 47 } else if (MI.getOpcode() == V8::ORri || MI.getOpcode() == V8::ADDri) { 48 if (isZeroImmed (MI.getOperand (1))) { 49 DstReg = MI.getOperand(0).getReg(); 50 SrcReg = MI.getOperand(2).getReg(); 51 return true; 52 } else if (isZeroImmed (MI.getOperand (2))) { 53 DstReg = MI.getOperand(0).getReg(); 54 SrcReg = MI.getOperand(1).getReg(); 55 return true; 56 } 57 } else if (MI.getOpcode() == V8::FMOVS || MI.getOpcode() == V8::FpMOVD) { 58 SrcReg = MI.getOperand(1).getReg(); 59 DstReg = MI.getOperand(0).getReg(); 60 return true; 61 } 62 return false; 63} 64