SparcInstrInfo.td revision 4351857d78c6604b1f5dd7a83be2a8cc869ae423
11e9bf3e0803691d0a228da41fc608347b6db4340Torne (Richard Coles)//===- SparcV8Instrs.td - Target Description for SparcV8 Target -----------===// 25821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// 35821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// The LLVM Compiler Infrastructure 45821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// 51e9bf3e0803691d0a228da41fc608347b6db4340Torne (Richard Coles)// This file was developed by the LLVM research group and is distributed under 65821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// the University of Illinois Open Source License. See LICENSE.TXT for details. 75821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// 87d4cd473f85ac64c3747c96c277f9e506a0d2246Torne (Richard Coles)//===----------------------------------------------------------------------===// 95821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// 10868fa2fe829687343ffae624259930155e16dbd8Torne (Richard Coles)// This file describes the SparcV8 instructions in TableGen format. 11868fa2fe829687343ffae624259930155e16dbd8Torne (Richard Coles)// 12868fa2fe829687343ffae624259930155e16dbd8Torne (Richard Coles)//===----------------------------------------------------------------------===// 13eb525c5499e34cc9c4b825d6d9e75bb07cc06aceBen Murdoch 145821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)//===----------------------------------------------------------------------===// 15bb1529ce867d8845a77ec7cdf3e3003ef1771a40Ben Murdoch// Instruction format superclass 165821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)//===----------------------------------------------------------------------===// 171e9bf3e0803691d0a228da41fc608347b6db4340Torne (Richard Coles) 181e9bf3e0803691d0a228da41fc608347b6db4340Torne (Richard Coles)class InstV8 : Instruction { // SparcV8 instruction baseline 191e9bf3e0803691d0a228da41fc608347b6db4340Torne (Richard Coles) field bits<32> Inst; 20f2477e01787aa58f445919b809d89e252beef54fTorne (Richard Coles) 215821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let Namespace = "V8"; 225821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 235d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) bits<2> op; 245821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let Inst{31-30} = op; // Top two bits are the 'op' field 255821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 265821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) // Bit attributes specific to SparcV8 instructions 275821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) bit isPasi = 0; // Does this instruction affect an alternate addr space? 285821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) bit isPrivileged = 0; // Is this a privileged instruction? 295821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)} 305821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 312a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)include "SparcV8InstrFormats.td" 322a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles) 335821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)//===----------------------------------------------------------------------===// 345821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Instructions 355821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)//===----------------------------------------------------------------------===// 365821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 375821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Pseudo instructions. 385821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)class PseudoInstV8<string nm> : InstV8 { 395821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let Name = nm; 405821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)} 412a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)def PHI : PseudoInstV8<"PHI">; 425821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ADJCALLSTACKDOWN : PseudoInstV8<"ADJCALLSTACKDOWN">; 435821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ADJCALLSTACKUP : PseudoInstV8<"ADJCALLSTACKUP">; 445821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def IMPLICIT_USE : PseudoInstV8<"IMPLICIT_USE">; 455821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def IMPLICIT_DEF : PseudoInstV8<"IMPLICIT_DEF">; 465821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FpMOVD : PseudoInstV8<"FpMOVD">; // pseudo 64-bit double move 475821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 485821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section A.3 - Synthetic Instructions, p. 85 495821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// special cases of JMPL: 505821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)let isReturn = 1, isTerminator = 1, hasDelaySlot = 1 in { 515821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let rd = I7.Num, rs1 = G0.Num, simm13 = 8 in 525821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) def RET : F3_2<2, 0b111000, "ret">; 535821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let rd = O7.Num, rs1 = G0.Num, simm13 = 8 in 545821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) def RETL: F3_2<2, 0b111000, "retl">; 555821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)} 565821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// CMP is a special case of SUBCC where destination is ignored, by setting it to 575821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// %g0 (hardwired zero). 585821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// FIXME: should keep track of the fact that it defs the integer condition codes 595821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)let rd = 0 in 605821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) def CMPri: F3_2<2, 0b010100, "cmp">; 615821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 625821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.1 - Load Integer Instructions, p. 90 635821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def LDSB: F3_2<3, 0b001001, "ldsb">; 645821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def LDSH: F3_2<3, 0b001010, "ldsh">; 655821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def LDUB: F3_2<3, 0b000001, "ldub">; 665821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def LDUH: F3_2<3, 0b000010, "lduh">; 675821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def LD : F3_2<3, 0b000000, "ld">; 685821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def LDD : F3_2<3, 0b000011, "ldd">; 695821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 7090dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)// Section B.2 - Load Floating-point Instructions, p. 92 7190dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)def LDFrr : F3_1<3, 0b100000, "ld">; 7290dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles)def LDFri : F3_2<3, 0b100000, "ld">; 735821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def LDDFrr : F3_1<3, 0b100011, "ldd">; 745821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def LDDFri : F3_2<3, 0b100011, "ldd">; 755821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def LDFSRrr: F3_1<3, 0b100001, "ld">; 765821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def LDFSRri: F3_2<3, 0b100001, "ld">; 775821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 785821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.4 - Store Integer Instructions, p. 95 795821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def STB : F3_2<3, 0b000101, "stb">; 805821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def STH : F3_2<3, 0b000110, "sth">; 815821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ST : F3_2<3, 0b000100, "st">; 825821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def STD : F3_2<3, 0b000111, "std">; 835821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 845821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.5 - Store Floating-point Instructions, p. 97 855821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def STFrr : F3_1<3, 0b100100, "st">; 865821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def STFri : F3_2<3, 0b100100, "st">; 875821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def STDFrr : F3_1<3, 0b100111, "std">; 885821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def STDFri : F3_2<3, 0b100111, "std">; 895821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def STFSRrr : F3_1<3, 0b100101, "st">; 905821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def STFSRri : F3_2<3, 0b100101, "st">; 915821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def STDFQrr : F3_1<3, 0b100110, "std">; 925821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def STDFQri : F3_2<3, 0b100110, "std">; 935821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 945821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.9 - SETHI Instruction, p. 104 955821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SETHIi: F2_1<0b100, "sethi">; 965821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 975821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.10 - NOP Instruction, p. 105 985821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// (It's a special case of SETHI) 995821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)let rd = 0, imm22 = 0 in 10090dce4d38c5ff5333bea97d859d4e484e27edf0cTorne (Richard Coles) def NOP : F2_1<0b100, "nop">; 1015821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1025821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.11 - Logical Instructions, p. 106 1035821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ANDrr : F3_1<2, 0b000001, "and">; 1045821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ANDri : F3_2<2, 0b000001, "and">; 1055821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ORrr : F3_1<2, 0b000010, "or">; 1065821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ORri : F3_2<2, 0b000010, "or">; 107bb1529ce867d8845a77ec7cdf3e3003ef1771a40Ben Murdochdef XORrr : F3_1<2, 0b000011, "xor">; 108bb1529ce867d8845a77ec7cdf3e3003ef1771a40Ben Murdochdef XORri : F3_2<2, 0b000011, "xor">; 1095821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1105821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.12 - Shift Instructions, p. 107 1115821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SLLrr : F3_1<2, 0b100101, "sll">; 1125821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SLLri : F3_2<2, 0b100101, "sll">; 113bb1529ce867d8845a77ec7cdf3e3003ef1771a40Ben Murdochdef SRLrr : F3_1<2, 0b100110, "srl">; 114bb1529ce867d8845a77ec7cdf3e3003ef1771a40Ben Murdochdef SRLri : F3_2<2, 0b100110, "srl">; 115bb1529ce867d8845a77ec7cdf3e3003ef1771a40Ben Murdochdef SRArr : F3_1<2, 0b100111, "sra">; 1165821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SRAri : F3_2<2, 0b100111, "sra">; 1175821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1185821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.13 - Add Instructions, p. 108 1195821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ADDrr : F3_1<2, 0b000000, "add">; 1205821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ADDri : F3_2<2, 0b000000, "add">; 1215821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ADDCCrr : F3_1<2, 0b010000, "addcc">; 1225821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ADDCCri : F3_2<2, 0b010000, "addcc">; 1235821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ADDXrr : F3_1<2, 0b001000, "addx">; 1245821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ADDXri : F3_2<2, 0b001000, "addx">; 1255821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ADDXCCrr: F3_1<2, 0b011000, "addxcc">; 1265821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def ADDXCCri: F3_2<2, 0b011000, "addxcc">; 1275821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1285821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.15 - Subtract Instructions, p. 110 1295821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SUBrr : F3_1<2, 0b000100, "sub">; 1305821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SUBri : F3_2<2, 0b000100, "sub">; 1315821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SUBCCrr : F3_1<2, 0b010100, "subcc">; 1325821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SUBCCri : F3_2<2, 0b010100, "subcc">; 1335821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SUBXrr : F3_1<2, 0b001100, "subx">; 1345821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SUBXri : F3_2<2, 0b001100, "subx">; 1355821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SUBXCCrr: F3_1<2, 0b011100, "subxcc">; 1365821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SUBXCCri: F3_2<2, 0b011100, "subxcc">; 1375821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1385821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.18 - Multiply Instructions, p. 113 1395821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def UMULrr : F3_1<2, 0b001010, "umul">; 140a93a17c8d99d686bd4a1511e5504e5e6cc9fcadfTorne (Richard Coles)def SMULrr : F3_1<2, 0b001011, "smul">; 1415821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1425821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.19 - Divide Instructions, p. 115 1435821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def UDIVrr : F3_1<2, 0b001110, "udiv">; 1445821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def UDIVri : F3_2<2, 0b001110, "udiv">; 1455821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SDIVrr : F3_1<2, 0b001111, "sdiv">; 1465821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SDIVri : F3_2<2, 0b001111, "sdiv">; 1475821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def UDIVCCrr : F3_1<2, 0b011110, "udivcc">; 1485821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def UDIVCCri : F3_2<2, 0b011110, "udivcc">; 1495821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SDIVCCrr : F3_1<2, 0b011111, "sdivcc">; 1505821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SDIVCCri : F3_2<2, 0b011111, "sdivcc">; 1515821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1525821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.20 - SAVE and RESTORE, p. 117 1535821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SAVErr : F3_1<2, 0b111100, "save">; // save r, r, r 1545821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def SAVEri : F3_2<2, 0b111100, "save">; // save r, i, r 1555821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def RESTORErr : F3_1<2, 0b111101, "restore">; // restore r, r, r 1565821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def RESTOREri : F3_2<2, 0b111101, "restore">; // restore r, i, r 1575821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1585821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.21 - Branch on Integer Condition Codes Instructions, p. 119 1595821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1605821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// conditional branch class: 1615821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)class BranchV8<bits<4> cc, string nm> : F2_2<cc, 0b010, nm> { 1625821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let isBranch = 1; 1635821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let isTerminator = 1; 1645821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let hasDelaySlot = 1; 1655821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)} 1665821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 167a3f6a49ab37290eeeb8db0f41ec0f1cb74a68be7Torne (Richard Coles)let isBarrier = 1 in 1685821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) def BA : BranchV8<0b1000, "ba">; 1695821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def BN : BranchV8<0b0000, "bn">; 1705821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def BNE : BranchV8<0b1001, "bne">; 1715821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def BE : BranchV8<0b0001, "be">; 1725821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def BG : BranchV8<0b1010, "bg">; 1735821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def BLE : BranchV8<0b0010, "ble">; 1745821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def BGE : BranchV8<0b1011, "bge">; 1755821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def BL : BranchV8<0b0011, "bl">; 1765821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def BGU : BranchV8<0b1100, "bgu">; 1775821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def BLEU : BranchV8<0b0100, "bleu">; 1785821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def BCC : BranchV8<0b1101, "bcc">; 1795821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def BCS : BranchV8<0b0101, "bcs">; 1805821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1815821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.22 - Branch on Floating-point Condition Codes Instructions, p. 121 1825821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1835821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// floating-point conditional branch class: 1845821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)class FPBranchV8<bits<4> cc, string nm> : F2_2<cc, 0b110, nm> { 1855821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let isBranch = 1; 1865821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let isTerminator = 1; 1875821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let hasDelaySlot = 1; 1885821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)} 1895821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1905821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBA : FPBranchV8<0b1000, "fba">; 1915821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBN : FPBranchV8<0b0000, "fbn">; 1925821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBU : FPBranchV8<0b0111, "fbu">; 1935821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBG : FPBranchV8<0b0110, "fbg">; 1945821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBUG : FPBranchV8<0b0101, "fbug">; 1955821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBL : FPBranchV8<0b0100, "fbl">; 1965821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBUL : FPBranchV8<0b0011, "fbul">; 1975821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBLG : FPBranchV8<0b0010, "fblg">; 1985821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBNE : FPBranchV8<0b0001, "fbne">; 1991e9bf3e0803691d0a228da41fc608347b6db4340Torne (Richard Coles)def FBE : FPBranchV8<0b1001, "fbe">; 2005821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBUE : FPBranchV8<0b1010, "fbue">; 2015821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBGE : FPBranchV8<0b1011, "fbge">; 2025821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBUGE: FPBranchV8<0b1100, "fbuge">; 2035821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBLE : FPBranchV8<0b1101, "fble">; 2045821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBULE: FPBranchV8<0b1110, "fbule">; 2055821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FBO : FPBranchV8<0b1111, "fbo">; 2061e9bf3e0803691d0a228da41fc608347b6db4340Torne (Richard Coles) 2075821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 208c2e0dbddbe15c98d52c4786dac06cb8952a8ae6dTorne (Richard Coles) 2095821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.24 - Call and Link Instruction, p. 125 2105821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// This is the only Format 1 instruction 211a1401311d1ab56c4ed0a474bd38c108f75cb0cd9Torne (Richard Coles)let Uses = [O0, O1, O2, O3, O4, O5], hasDelaySlot = 1, isCall = 1 in { 2125821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) // pc-relative call: 2132a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles) let Defs = [O0, O1, O2, O3, O4, O5, O7, G1, G2, G3, G4, G5, G6, G7, 214f2477e01787aa58f445919b809d89e252beef54fTorne (Richard Coles) D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15] in 2155821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) def CALL : InstV8 { 2165821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) bits<30> disp; 2175821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let op = 1; 2185821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let Inst{29-0} = disp; 2195821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let Name = "call"; 2205821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) } 2215821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 2225821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) // indirect call (O7 is an EXPLICIT def in indirect calls, so it cannot also 2231e9bf3e0803691d0a228da41fc608347b6db4340Torne (Richard Coles) // be an implicit def): 2245821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) let Defs = [O0, O1, O2, O3, O4, O5, G1, G2, G3, G4, G5, G6, G7, 2255821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15] in 2265821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) def JMPLrr : F3_1<2, 0b111000, "jmpl">; // jmpl [rs1+rs2], rd 2275821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)} 2285821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 2295821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Section B.29 - Write State Register Instructions 2305821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def WRrr : F3_1<2, 0b110000, "wr">; // wr rs1, rs2, rd 2315821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def WRri : F3_2<2, 0b110000, "wr">; // wr rs1, imm, rd 2325821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 2335821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Convert Integer to Floating-point Instructions, p. 141 2345821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FITOS : F3_3<2, 0b110100, 0b011000100, "fitos">; 2355821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FITOD : F3_3<2, 0b110100, 0b011001000, "fitod">; 2365821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 2375821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Convert Floating-point to Integer Instructions, p. 142 2385821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FSTOI : F3_3<2, 0b110100, 0b011010001, "fstoi">; 2395821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FDTOI : F3_3<2, 0b110100, 0b011010010, "fdtoi">; 2405821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 2415821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Convert between Floating-point Formats Instructions, p. 143 2425821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FSTOD : F3_3<2, 0b110100, 0b011001001, "fstod">; 2435821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FDTOS : F3_3<2, 0b110100, 0b011000110, "fdtos">; 2445821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 2455821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Floating-point Move Instructions, p. 144 2465821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FMOVS : F3_3<2, 0b110100, 0b000000001, "fmovs">; 2475821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FNEGS : F3_3<2, 0b110100, 0b000000101, "fnegs">; 2485821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FABSS : F3_3<2, 0b110100, 0b000001001, "fabss">; 2495821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 2505821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Floating-point Add and Subtract Instructions, p. 146 2515821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FADDS : F3_3<2, 0b110100, 0b001000001, "fadds">; 2525821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FADDD : F3_3<2, 0b110100, 0b001000010, "faddd">; 2535821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FSUBS : F3_3<2, 0b110100, 0b001000101, "fsubs">; 2545821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FSUBD : F3_3<2, 0b110100, 0b001000110, "fsubd">; 2555821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 2565821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Floating-point Multiply and Divide Instructions, p. 147 2575821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FMULS : F3_3<2, 0b110100, 0b001001001, "fmuls">; 2585821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FMULD : F3_3<2, 0b110100, 0b001001010, "fmuld">; 2595821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FSMULD : F3_3<2, 0b110100, 0b001101001, "fsmuld">; 2605821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FDIVS : F3_3<2, 0b110100, 0b001001101, "fdivs">; 2615821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)def FDIVD : F3_3<2, 0b110100, 0b001001110, "fdivd">; 2625821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 2635821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Floating-point Compare Instructions, p. 148 2645821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Note: the 2nd template arg is different for these guys. 2655821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// Note 2: the result of a FCMP is not available until the 2nd cycle 2665821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// after the instr is retired, but there is no interlock. This behavior 2675821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// is modelled as a delay slot. 2685821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)let hasDelaySlot = 1 in { 2695821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) def FCMPS : F3_3<2, 0b110101, 0b001010001, "fcmps">; 2705821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) def FCMPD : F3_3<2, 0b110101, 0b001010010, "fcmpd">; 2714e180b6a0b4720a9b8e9e959a882386f690f08ffTorne (Richard Coles) def FCMPES : F3_3<2, 0b110101, 0b001010101, "fcmpes">; 2724e180b6a0b4720a9b8e9e959a882386f690f08ffTorne (Richard Coles) def FCMPED : F3_3<2, 0b110101, 0b001010110, "fcmped">; 2734e180b6a0b4720a9b8e9e959a882386f690f08ffTorne (Richard Coles)} 2745821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 2754e180b6a0b4720a9b8e9e959a882386f690f08ffTorne (Richard Coles)