SparcInstrInfo.td revision e806173ab6f571f48e8b056fbd355ccef4371a23 
1//===- SparcV8Instrs.td - Target Description for SparcV8 Target -----------===//
2// 
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7// 
8//===----------------------------------------------------------------------===//
9//
10// This file describes the SparcV8 instructions in TableGen format.
11//
12//===----------------------------------------------------------------------===//
13
14//===----------------------------------------------------------------------===//
15// Instruction format superclass
16//===----------------------------------------------------------------------===//
17
18class InstV8 : Instruction {          // SparcV8 instruction baseline
19  field bits<32> Inst;
20
21  let Namespace = "V8";
22
23  bits<2> op;
24  let Inst{31-30} = op;               // Top two bits are the 'op' field
25
26  // Bit attributes specific to SparcV8 instructions
27  bit isPasi       = 0; // Does this instruction affect an alternate addr space?
28  bit isPrivileged = 0; // Is this a privileged instruction?
29}
30
31include "SparcV8InstrInfo_F2.td"
32include "SparcV8InstrInfo_F3.td"
33
34//===----------------------------------------------------------------------===//
35// Instructions
36//===----------------------------------------------------------------------===//
37
38// Pseudo instructions.
39def PHI : InstV8 {
40  let Name = "PHI";
41}
42def ADJCALLSTACKDOWN : InstV8 {
43  let Name = "ADJCALLSTACKDOWN";
44}
45def ADJCALLSTACKUP : InstV8 {
46  let Name = "ADJCALLSTACKUP";
47}
48
49// Section B.20: SAVE and RESTORE - p117
50def SAVEr    : F3_1<2, 0b111100, "save">;           // save    r, r, r
51def SAVEi    : F3_2<2, 0b111100, "save">;           // save    r, i, r
52def RESTOREr : F3_1<2, 0b111101, "restore">;        // restore r, r, r
53def RESTOREi : F3_2<2, 0b111101, "restore">;        // restore r, i, r
54
55// Section B.24: Call and Link - p125
56// This is the only Format 1 instruction
57def CALL : InstV8 {
58  bits<30> disp;
59
60  let op = 1;
61  let Inst{29-0} = disp;
62  let Name = "call";
63}
64
65// Section B.9 - SETHI Instruction, p. 102
66def SETHIi: F2_1<0b100, "sethi">;
67
68// Section B.11 - Logical Instructions, p. 106
69def ANDri : F3_2<2, 0b000001, "and">;
70def ORrr  : F3_1<2, 0b000010, "or">;
71def ORri  : F3_2<2, 0b000010, "or">;
72
73// Section B.12 - Shift Instructions, p. 107
74def SLLri : F3_1<2, 0b100101, "sll">;
75def SRLri : F3_1<2, 0b100110, "srl">;
76def SRAri : F3_1<2, 0b100111, "sra">;
77
78// Section B.13 - Add Instructions, p. 108
79def ADDrr : F3_1<2, 0b000000, "add">;
80
81// Section B.25 - Jump and Link, p. 126
82def JMPLr : F3_1<2, 0b111000, "jmpl">;              // jmpl [rs1+rs2], rd
83def JMPLi : F3_2<2, 0b111000, "jmpl">;              // jmpl [rs1+imm], rd
84
85