SystemZMCTargetDesc.cpp revision 514756983e9ba3684a89ed583bf5a98ffb20c203 
1//===-- SystemZMCTargetDesc.cpp - SystemZ target descriptions -------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#include "SystemZMCTargetDesc.h"
11#include "InstPrinter/SystemZInstPrinter.h"
12#include "SystemZMCAsmInfo.h"
13#include "llvm/MC/MCCodeGenInfo.h"
14#include "llvm/MC/MCInstrInfo.h"
15#include "llvm/MC/MCStreamer.h"
16#include "llvm/MC/MCSubtargetInfo.h"
17#include "llvm/Support/TargetRegistry.h"
18
19#define GET_INSTRINFO_MC_DESC
20#include "SystemZGenInstrInfo.inc"
21
22#define GET_SUBTARGETINFO_MC_DESC
23#include "SystemZGenSubtargetInfo.inc"
24
25#define GET_REGINFO_MC_DESC
26#include "SystemZGenRegisterInfo.inc"
27
28using namespace llvm;
29
30const unsigned SystemZMC::GR32Regs[16] = {
31  SystemZ::R0L, SystemZ::R1L, SystemZ::R2L, SystemZ::R3L,
32  SystemZ::R4L, SystemZ::R5L, SystemZ::R6L, SystemZ::R7L,
33  SystemZ::R8L, SystemZ::R9L, SystemZ::R10L, SystemZ::R11L,
34  SystemZ::R12L, SystemZ::R13L, SystemZ::R14L, SystemZ::R15L
35};
36
37const unsigned SystemZMC::GR64Regs[16] = {
38  SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D,
39  SystemZ::R4D, SystemZ::R5D, SystemZ::R6D, SystemZ::R7D,
40  SystemZ::R8D, SystemZ::R9D, SystemZ::R10D, SystemZ::R11D,
41  SystemZ::R12D, SystemZ::R13D, SystemZ::R14D, SystemZ::R15D
42};
43
44const unsigned SystemZMC::GR128Regs[16] = {
45  SystemZ::R0Q, 0, SystemZ::R2Q, 0,
46  SystemZ::R4Q, 0, SystemZ::R6Q, 0,
47  SystemZ::R8Q, 0, SystemZ::R10Q, 0,
48  SystemZ::R12Q, 0, SystemZ::R14Q, 0
49};
50
51const unsigned SystemZMC::FP32Regs[16] = {
52  SystemZ::F0S, SystemZ::F1S, SystemZ::F2S, SystemZ::F3S,
53  SystemZ::F4S, SystemZ::F5S, SystemZ::F6S, SystemZ::F7S,
54  SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S,
55  SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S
56};
57
58const unsigned SystemZMC::FP64Regs[16] = {
59  SystemZ::F0D, SystemZ::F1D, SystemZ::F2D, SystemZ::F3D,
60  SystemZ::F4D, SystemZ::F5D, SystemZ::F6D, SystemZ::F7D,
61  SystemZ::F8D, SystemZ::F9D, SystemZ::F10D, SystemZ::F11D,
62  SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D
63};
64
65const unsigned SystemZMC::FP128Regs[16] = {
66  SystemZ::F0Q, SystemZ::F1Q, 0, 0,
67  SystemZ::F4Q, SystemZ::F5Q, 0, 0,
68  SystemZ::F8Q, SystemZ::F9Q, 0, 0,
69  SystemZ::F12Q, SystemZ::F13Q, 0, 0
70};
71
72unsigned SystemZMC::getFirstReg(unsigned Reg) {
73  static unsigned Map[SystemZ::NUM_TARGET_REGS];
74  static bool Initialized = false;
75  if (!Initialized) {
76    for (unsigned I = 0; I < 16; ++I) {
77      Map[GR32Regs[I]] = I;
78      Map[GR64Regs[I]] = I;
79      Map[GR128Regs[I]] = I;
80      Map[FP32Regs[I]] = I;
81      Map[FP64Regs[I]] = I;
82      Map[FP128Regs[I]] = I;
83    }
84  }
85  assert(Reg < SystemZ::NUM_TARGET_REGS);
86  return Map[Reg];
87}
88
89static MCAsmInfo *createSystemZMCAsmInfo(const MCRegisterInfo &MRI,
90                                         StringRef TT) {
91  MCAsmInfo *MAI = new SystemZMCAsmInfo(TT);
92  MCCFIInstruction Inst =
93      MCCFIInstruction::createDefCfa(0, MRI.getDwarfRegNum(SystemZ::R15D, true),
94                                     SystemZMC::CFAOffsetFromInitialSP);
95  MAI->addInitialFrameState(Inst);
96  return MAI;
97}
98
99static MCInstrInfo *createSystemZMCInstrInfo() {
100  MCInstrInfo *X = new MCInstrInfo();
101  InitSystemZMCInstrInfo(X);
102  return X;
103}
104
105static MCRegisterInfo *createSystemZMCRegisterInfo(StringRef TT) {
106  MCRegisterInfo *X = new MCRegisterInfo();
107  InitSystemZMCRegisterInfo(X, SystemZ::R14D);
108  return X;
109}
110
111static MCSubtargetInfo *createSystemZMCSubtargetInfo(StringRef TT,
112                                                     StringRef CPU,
113                                                     StringRef FS) {
114  MCSubtargetInfo *X = new MCSubtargetInfo();
115  InitSystemZMCSubtargetInfo(X, TT, CPU, FS);
116  return X;
117}
118
119static MCCodeGenInfo *createSystemZMCCodeGenInfo(StringRef TT, Reloc::Model RM,
120                                                 CodeModel::Model CM,
121                                                 CodeGenOpt::Level OL) {
122  MCCodeGenInfo *X = new MCCodeGenInfo();
123
124  // Static code is suitable for use in a dynamic executable; there is no
125  // separate DynamicNoPIC model.
126  if (RM == Reloc::Default || RM == Reloc::DynamicNoPIC)
127    RM = Reloc::Static;
128
129  // For SystemZ we define the models as follows:
130  //
131  // Small:  BRASL can call any function and will use a stub if necessary.
132  //         Locally-binding symbols will always be in range of LARL.
133  //
134  // Medium: BRASL can call any function and will use a stub if necessary.
135  //         GOT slots and locally-defined text will always be in range
136  //         of LARL, but other symbols might not be.
137  //
138  // Large:  Equivalent to Medium for now.
139  //
140  // Kernel: Equivalent to Medium for now.
141  //
142  // This means that any PIC module smaller than 4GB meets the
143  // requirements of Small, so Small seems like the best default there.
144  //
145  // All symbols bind locally in a non-PIC module, so the choice is less
146  // obvious.  There are two cases:
147  //
148  // - When creating an executable, PLTs and copy relocations allow
149  //   us to treat external symbols as part of the executable.
150  //   Any executable smaller than 4GB meets the requirements of Small,
151  //   so that seems like the best default.
152  //
153  // - When creating JIT code, stubs will be in range of BRASL if the
154  //   image is less than 4GB in size.  GOT entries will likewise be
155  //   in range of LARL.  However, the JIT environment has no equivalent
156  //   of copy relocs, so locally-binding data symbols might not be in
157  //   the range of LARL.  We need the Medium model in that case.
158  if (CM == CodeModel::Default)
159    CM = CodeModel::Small;
160  else if (CM == CodeModel::JITDefault)
161    CM = RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium;
162  X->InitMCCodeGenInfo(RM, CM, OL);
163  return X;
164}
165
166static MCInstPrinter *createSystemZMCInstPrinter(const Target &T,
167                                                 unsigned SyntaxVariant,
168                                                 const MCAsmInfo &MAI,
169                                                 const MCInstrInfo &MII,
170                                                 const MCRegisterInfo &MRI,
171                                                 const MCSubtargetInfo &STI) {
172  return new SystemZInstPrinter(MAI, MII, MRI);
173}
174
175static MCStreamer *createSystemZMCObjectStreamer(const Target &T, StringRef TT,
176                                                 MCContext &Ctx,
177                                                 MCAsmBackend &MAB,
178                                                 raw_ostream &OS,
179                                                 MCCodeEmitter *Emitter,
180                                                 bool RelaxAll,
181                                                 bool NoExecStack) {
182  return createELFStreamer(Ctx, MAB, OS, Emitter, RelaxAll, NoExecStack);
183}
184
185extern "C" void LLVMInitializeSystemZTargetMC() {
186  // Register the MCAsmInfo.
187  TargetRegistry::RegisterMCAsmInfo(TheSystemZTarget,
188                                    createSystemZMCAsmInfo);
189
190  // Register the MCCodeGenInfo.
191  TargetRegistry::RegisterMCCodeGenInfo(TheSystemZTarget,
192                                        createSystemZMCCodeGenInfo);
193
194  // Register the MCCodeEmitter.
195  TargetRegistry::RegisterMCCodeEmitter(TheSystemZTarget,
196					createSystemZMCCodeEmitter);
197
198  // Register the MCInstrInfo.
199  TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget,
200                                      createSystemZMCInstrInfo);
201
202  // Register the MCRegisterInfo.
203  TargetRegistry::RegisterMCRegInfo(TheSystemZTarget,
204                                    createSystemZMCRegisterInfo);
205
206  // Register the MCSubtargetInfo.
207  TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget,
208                                          createSystemZMCSubtargetInfo);
209
210  // Register the MCAsmBackend.
211  TargetRegistry::RegisterMCAsmBackend(TheSystemZTarget,
212                                       createSystemZMCAsmBackend);
213
214  // Register the MCInstPrinter.
215  TargetRegistry::RegisterMCInstPrinter(TheSystemZTarget,
216                                        createSystemZMCInstPrinter);
217
218  // Register the MCObjectStreamer;
219  TargetRegistry::RegisterMCObjectStreamer(TheSystemZTarget,
220                                           createSystemZMCObjectStreamer);
221}
222