SystemZInstrInfo.td revision fc9ceeaad8728257df62758d91d70e1f0789f38e 
1//===- SystemZInstrInfo.td - SystemZ Instruction defs ---------*- tblgen-*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source 
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file describes the SystemZ instructions in TableGen format.
11//
12//===----------------------------------------------------------------------===//
13
14include "SystemZInstrFormats.td"
15
16//===----------------------------------------------------------------------===//
17// SystemZ Specific Node Definitions.
18//===----------------------------------------------------------------------===//
19def SystemZretflag : SDNode<"SystemZISD::RET_FLAG", SDTNone,
20                     [SDNPHasChain, SDNPOptInFlag]>;
21
22let neverHasSideEffects = 1 in
23def NOP : Pseudo<(outs), (ins), "# no-op", []>;
24
25//===----------------------------------------------------------------------===//
26// Instruction Pattern Stuff.
27//===----------------------------------------------------------------------===//
28def LL16 : SDNodeXForm<imm, [{
29  // Transformation function: return low 16 bits.
30  return getI16Imm(N->getZExtValue() & 0x000000000000FFFFULL);
31}]>;
32
33def LH16 : SDNodeXForm<imm, [{
34  // Transformation function: return bits 16-31.
35  return getI16Imm((N->getZExtValue() & 0x00000000FFFF0000ULL) >> 16);
36}]>;
37
38def HL16 : SDNodeXForm<imm, [{
39  // Transformation function: return bits 32-47.
40  return getI16Imm((N->getZExtValue() & 0x0000FFFF00000000ULL) >> 32);
41}]>;
42
43def HH16 : SDNodeXForm<imm, [{
44  // Transformation function: return bits 48-63.
45  return getI16Imm((N->getZExtValue() & 0xFFFF000000000000ULL) >> 48);
46}]>;
47
48def i64ll16 : PatLeaf<(i64 imm), [{  
49  // i64ll16 predicate - true if the 64-bit immediate has only rightmost 16
50  // bits set.
51  return ((N->getZExtValue() & 0x000000000000FFFFULL) == N->getZExtValue());
52}], LL16>;
53
54def i64lh16 : PatLeaf<(i64 imm), [{  
55  // i64lh16 predicate - true if the 64-bit immediate has only bits 16-31 set.
56  return ((N->getZExtValue() & 0x00000000FFFF0000ULL) == N->getZExtValue());
57}], LH16>;
58
59def i64hl16 : PatLeaf<(i64 imm), [{  
60  // i64hl16 predicate - true if the 64-bit immediate has only bits 32-47 set.
61  return ((N->getZExtValue() & 0x0000FFFF00000000ULL) == N->getZExtValue());
62}], HL16>;
63
64def i64hh16 : PatLeaf<(i64 imm), [{  
65  // i64hh16 predicate - true if the 64-bit immediate has only bits 48-63 set.
66  return ((N->getZExtValue() & 0xFFFF000000000000ULL) == N->getZExtValue());
67}], HH16>;
68
69def immSExt16 : PatLeaf<(i64 imm), [{
70  // immSExt16 predicate - true if the immediate fits in a 16-bit sign extended
71  // field.
72  uint64_t val = N->getZExtValue();
73  return ((int64_t)val == (int16_t)val);
74}]>;
75
76//===----------------------------------------------------------------------===//
77//  Control Flow Instructions...
78//
79
80// FIXME: Provide proper encoding!
81let isReturn = 1, isTerminator = 1 in {
82  def RET : Pseudo<(outs), (ins), "br\t%r14", [(SystemZretflag)]>;
83}
84
85//===----------------------------------------------------------------------===//
86// Move Instructions
87
88// FIXME: Provide proper encoding!
89let neverHasSideEffects = 1 in {
90def MOV64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src),
91                     "lgr\t{$dst, $src}",
92                     []>;
93}
94
95// FIXME: Provide proper encoding!
96let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
97def MOV64ri16 : Pseudo<(outs GR64:$dst), (ins i64imm:$src),
98                       "lghi\t{$dst, $src}",
99                       [(set GR64:$dst, immSExt16:$src)]>;
100}
101
102//===----------------------------------------------------------------------===//
103// Arithmetic Instructions
104
105let isTwoAddress = 1 in {
106
107let Defs = [PSW] in {
108
109let isCommutable = 1 in { // X = ADD Y, Z  == X = ADD Z, Y
110// FIXME: Provide proper encoding!
111def ADD64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
112                     "agr\t{$dst, $src2}",
113                     [(set GR64:$dst, (add GR64:$src1, GR64:$src2)),
114                      (implicit PSW)]>;
115}
116
117// FIXME: Provide proper encoding!
118def ADD64ri16 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2),
119                       "aghi\t{$dst, $src2}",
120                       [(set GR64:$dst, (add GR64:$src1, immSExt16:$src2)),
121                        (implicit PSW)]>;
122
123let isCommutable = 1 in { // X = AND Y, Z  == X = AND Z, Y
124// FIXME: Provide proper encoding!
125def AND64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
126                     "ngr\t{$dst, $src2}",
127                     [(set GR64:$dst, (and GR64:$src1, GR64:$src2))]>;
128}
129
130// FIXME: Provide proper encoding!
131def AND64rill16 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2),
132                         "nill\t{$dst, $src2}",
133                         [(set GR64:$dst, (and GR64:$src1, i64ll16:$src2))]>;
134def AND64rilh16 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2),
135                         "nilh\t{$dst, $src2}",
136                         [(set GR64:$dst, (and GR64:$src1, i64lh16:$src2))]>;
137def AND64rihl16 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2),
138                         "nihl\t{$dst, $src2}",
139                         [(set GR64:$dst, (and GR64:$src1, i64hl16:$src2))]>;
140def AND64rihh16 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2),
141                         "nihh\t{$dst, $src2}",
142                         [(set GR64:$dst, (and GR64:$src1, i64hh16:$src2))]>;
143
144let isCommutable = 1 in { // X = OR Y, Z  == X = OR Z, Y
145// FIXME: Provide proper encoding!
146def OR64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
147                    "ogr\t{$dst, $src2}",
148                    [(set GR64:$dst, (or GR64:$src1, GR64:$src2))]>;
149}
150def OR64rill16 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2),
151                        "oill\t{$dst, $src2}",
152                        [(set GR64:$dst, (or GR64:$src1, i64ll16:$src2))]>;
153def OR64rilh16 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2),
154                        "oilh\t{$dst, $src2}",
155                        [(set GR64:$dst, (or GR64:$src1, i64lh16:$src2))]>;
156def OR64rihl16 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2),
157                        "oihl\t{$dst, $src2}",
158                        [(set GR64:$dst, (or GR64:$src1, i64hl16:$src2))]>;
159def OR64rihh16 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2),
160                        "oihh\t{$dst, $src2}",
161                        [(set GR64:$dst, (or GR64:$src1, i64hh16:$src2))]>;
162
163// FIXME: Provide proper encoding!
164def SUB64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
165                     "sgr\t{$dst, $src2}",
166                     [(set GR64:$dst, (sub GR64:$src1, GR64:$src2))]>;
167
168
169let isCommutable = 1 in { // X = XOR Y, Z  == X = XOR Z, Y
170// FIXME: Provide proper encoding!
171def XOR64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
172                     "xgr\t{$dst, $src2}",
173                     [(set GR64:$dst, (xor GR64:$src1, GR64:$src2))]>;
174}
175
176} // Defs = [PSW]
177} // isTwoAddress = 1
178