SystemZRegisterInfo.cpp revision 4403b930f867f61b48304a23a6843026b0b9a32a
1//===- SystemZRegisterInfo.cpp - SystemZ Register Information -------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the SystemZ implementation of the TargetRegisterInfo class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "SystemZ.h" 15#include "SystemZRegisterInfo.h" 16#include "SystemZSubtarget.h" 17#include "llvm/CodeGen/MachineInstrBuilder.h" 18#include "llvm/CodeGen/MachineFrameInfo.h" 19#include "llvm/CodeGen/MachineFunction.h" 20#include "llvm/Target/TargetMachine.h" 21#include "llvm/Target/TargetOptions.h" 22#include "llvm/ADT/BitVector.h" 23using namespace llvm; 24 25SystemZRegisterInfo::SystemZRegisterInfo(SystemZTargetMachine &tm, 26 const TargetInstrInfo &tii) 27 : SystemZGenRegisterInfo(SystemZ::NOP, SystemZ::NOP), 28 TM(tm), TII(tii) { 29} 30 31const unsigned* 32SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { 33 static const unsigned CalleeSavedRegs[] = { 34 SystemZ::R6, SystemZ::R7, SystemZ::R8, SystemZ::R9, 35 SystemZ::R10, SystemZ::R11, SystemZ::R12, SystemZ::R13, 36 SystemZ::F1, SystemZ::F3, SystemZ::F5, SystemZ::F7, 37 0 38 }; 39 40 return CalleeSavedRegs; 41} 42 43const TargetRegisterClass* const* 44SystemZRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const { 45 static const TargetRegisterClass * const CalleeSavedRegClasses[] = { 46 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass, 47 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass, 48 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass, 49 &SystemZ::GR64RegClass, &SystemZ::GR64RegClass, 50 &SystemZ::FP64RegClass, &SystemZ::FP64RegClass, 51 &SystemZ::FP64RegClass, &SystemZ::FP64RegClass, 0 52 }; 53 return CalleeSavedRegClasses; 54} 55 56BitVector SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const { 57 BitVector Reserved(getNumRegs()); 58 if (hasFP(MF)) 59 Reserved.set(SystemZ::R11); 60 Reserved.set(SystemZ::R14); 61 Reserved.set(SystemZ::R15); 62 return Reserved; 63} 64 65// needsFP - Return true if the specified function should have a dedicated frame 66// pointer register. This is true if the function has variable sized allocas or 67// if frame pointer elimination is disabled. 68// 69bool SystemZRegisterInfo::hasFP(const MachineFunction &MF) const { 70 const MachineFrameInfo *MFI = MF.getFrameInfo(); 71 return NoFramePointerElim || MFI->hasVarSizedObjects(); 72} 73 74void SystemZRegisterInfo:: 75eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 76 MachineBasicBlock::iterator I) const { 77 assert(0 && "Not implemented yet!"); 78} 79 80void SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, 81 int SPAdj, RegScavenger *RS) const { 82 assert(0 && "Not implemented yet!"); 83} 84 85void SystemZRegisterInfo::emitPrologue(MachineFunction &MF) const { 86 // Nothing here yet 87} 88 89void SystemZRegisterInfo::emitEpilogue(MachineFunction &MF, 90 MachineBasicBlock &MBB) const { 91 // Nothing here yet 92} 93 94unsigned SystemZRegisterInfo::getRARegister() const { 95 assert(0 && "What is the return address register"); 96 return 0; 97} 98 99unsigned SystemZRegisterInfo::getFrameRegister(MachineFunction &MF) const { 100 assert(0 && "What is the frame register"); 101 return 0; 102} 103 104unsigned SystemZRegisterInfo::getEHExceptionRegister() const { 105 assert(0 && "What is the exception register"); 106 return 0; 107} 108 109unsigned SystemZRegisterInfo::getEHHandlerRegister() const { 110 assert(0 && "What is the exception handler register"); 111 return 0; 112} 113 114int SystemZRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { 115 assert(0 && "What is the dwarf register number"); 116 return -1; 117} 118 119#include "SystemZGenRegisterInfo.inc" 120