X86FixupLEAs.cpp revision 2967a804126c6081a18d8b75adf2d9fd5a3c096e
16f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org//===-- X86FixupLEAs.cpp - use or replace LEA instructions -----------===// 26f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org// 36f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org// The LLVM Compiler Infrastructure 46f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org// 56f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org// This file is distributed under the University of Illinois Open Source 66f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org// License. See LICENSE.TXT for details. 76f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org// 86f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org//===----------------------------------------------------------------------===// 96f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org// 106f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org// This file defines the pass which will find instructions which 116f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org// can be re-written as LEA instructions in order to reduce pipeline 126f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org// delays for some models of the Intel Atom family. 136f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org// 146f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org//===----------------------------------------------------------------------===// 156f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 166f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org#define DEBUG_TYPE "x86-fixup-LEAs" 176f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org#include "X86.h" 186f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org#include "X86InstrInfo.h" 196f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org#include "X86Subtarget.h" 206f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org#include "llvm/ADT/Statistic.h" 216f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org#include "llvm/CodeGen/LiveVariables.h" 226f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org#include "llvm/CodeGen/MachineFunctionPass.h" 236f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org#include "llvm/CodeGen/MachineInstrBuilder.h" 246f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org#include "llvm/CodeGen/MachineRegisterInfo.h" 256f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org#include "llvm/CodeGen/Passes.h" 266f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org#include "llvm/Support/Debug.h" 276f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org#include "llvm/Support/raw_ostream.h" 286f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org#include "llvm/Target/TargetInstrInfo.h" 296f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.orgusing namespace llvm; 306f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 316f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.orgSTATISTIC(NumLEAs, "Number of LEA instructions created"); 326f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 336f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.orgnamespace { 346f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org class FixupLEAPass : public MachineFunctionPass { 356f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org enum RegUsageState { RU_NotUsed, RU_Write, RU_Read }; 366f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org static char ID; 376f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// \brief Loop over all of the instructions in the basic block 386f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// replacing applicable instructions with LEA instructions, 396f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// where appropriate. 406f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org bool processBasicBlock(MachineFunction &MF, MachineFunction::iterator MFI); 416f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 426f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org virtual const char *getPassName() const { return "X86 Atom LEA Fixup";} 436f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 446f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// \brief Given a machine register, look for the instruction 456f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// which writes it in the current basic block. If found, 466f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// try to replace it with an equivalent LEA instruction. 476f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// If replacement succeeds, then also process the the newly created 486f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// instruction. 496f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org void seekLEAFixup(MachineOperand& p, MachineBasicBlock::iterator& I, 506f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineFunction::iterator MFI); 516f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 526f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// \brief Given a memory access or LEA instruction 536f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// whose address mode uses a base and/or index register, look for 546f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// an opportunity to replace the instruction which sets the base or index 556f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// register with an equivalent LEA instruction. 566f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org void processInstruction(MachineBasicBlock::iterator& I, 576f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineFunction::iterator MFI); 586f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 596f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// \brief Determine if an instruction references a machine register 606f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// and, if so, whether it reads or writes the register. 616f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org RegUsageState usesRegister(MachineOperand& p, 626f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineBasicBlock::iterator I); 636f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 646f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// \brief Step backwards through a basic block, looking 656f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// for an instruction which writes a register within 666f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// a maximum of INSTR_DISTANCE_THRESHOLD instruction latency cycles. 676f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineBasicBlock::iterator searchBackwards(MachineOperand& p, 686f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineBasicBlock::iterator& I, 696f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineFunction::iterator MFI); 706f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 716f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// \brief if an instruction can be converted to an 726f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// equivalent LEA, insert the new instruction into the basic block 736f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// and return a pointer to it. Otherwise, return zero. 746f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineInstr* postRAConvertToLEA(MachineFunction::iterator &MFI, 756f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineBasicBlock::iterator &MBBI) const; 766f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 776f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org public: 786f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org FixupLEAPass() : MachineFunctionPass(ID) {} 796f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 806f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// \brief Loop over all of the basic blocks, 816f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// replacing instructions by equivalent LEA instructions 826f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org /// if needed and when possible. 836f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org virtual bool runOnMachineFunction(MachineFunction &MF); 846f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 856f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org private: 866f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineFunction *MF; 876f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org const TargetMachine *TM; 886f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org const TargetInstrInfo *TII; // Machine instruction info. 896f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 906f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org }; 916f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org char FixupLEAPass::ID = 0; 926f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org} 936f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 946f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.orgMachineInstr * 956f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.orgFixupLEAPass::postRAConvertToLEA(MachineFunction::iterator &MFI, 966f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineBasicBlock::iterator &MBBI) const { 976f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineInstr* MI = MBBI; 986f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineInstr* NewMI; 996f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org switch (MI->getOpcode()) { 1006f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::MOV32rr: 1016f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::MOV64rr: { 1026f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org const MachineOperand& Src = MI->getOperand(1); 1036f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org const MachineOperand& Dest = MI->getOperand(0); 1046f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org NewMI = BuildMI(*MF, MI->getDebugLoc(), 1056f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org TII->get( MI->getOpcode() == X86::MOV32rr ? X86::LEA32r : X86::LEA64r)) 1066f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org .addOperand(Dest) 1076f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org .addOperand(Src).addImm(1).addReg(0).addImm(0).addReg(0); 1086f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MFI->insert(MBBI, NewMI); // Insert the new inst 1096f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org return NewMI; 1106f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org } 1116f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::ADD64ri32: 1126f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::ADD64ri8: 1136f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::ADD64ri32_DB: 1146f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::ADD64ri8_DB: 1156f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::ADD32ri: 1166f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::ADD32ri8: 1176f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::ADD32ri_DB: 1186f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::ADD32ri8_DB: 1196f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::ADD16ri: 1206f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::ADD16ri8: 1216f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::ADD16ri_DB: 1226f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::ADD16ri8_DB: 1236f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org if (!MI->getOperand(2).isImm()) { 1246f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org // convertToThreeAddress will call getImm() 1256f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org // which requires isImm() to be true 1266f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org return 0; 1276f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org } 1286f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::ADD16rr: 1296f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org case X86::ADD16rr_DB: 1306f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org if (MI->getOperand(1).getReg() != MI->getOperand(2).getReg()) { 1316f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org // if src1 != src2, then convertToThreeAddress will 1326f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org // need to create a Virtual register, which we cannot do 1336f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org // after register allocation. 1346f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org return 0; 1356f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org } 1366f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org } 1376f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org return TII->convertToThreeAddress(MFI, MBBI, 0); 1386f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org} 1396f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 1406f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.orgFunctionPass *llvm::createX86FixupLEAs() { 1416f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org return new FixupLEAPass(); 1426f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org} 1436f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 1446f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.orgbool FixupLEAPass::runOnMachineFunction(MachineFunction &Func) { 1456f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MF = &Func; 1466f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org TM = &MF->getTarget(); 1476f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org TII = TM->getInstrInfo(); 1486f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 1496f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org DEBUG(dbgs() << "Start X86FixupLEAs\n";); 1506f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org // Process all basic blocks. 1516f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org for (MachineFunction::iterator I = Func.begin(), E = Func.end(); I != E; ++I) 1526f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org processBasicBlock(Func, I); 1536f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org DEBUG(dbgs() << "End X86FixupLEAs\n";); 1546f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 1556f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org return true; 1566f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org} 1576f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 1586f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.orgFixupLEAPass::RegUsageState FixupLEAPass::usesRegister(MachineOperand& p, 1596f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineBasicBlock::iterator I) { 1606f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org RegUsageState RegUsage = RU_NotUsed; 1616f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineInstr* MI = I; 1626f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 1636f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org for (unsigned int i = 0; i < MI->getNumOperands(); ++i) { 1646f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org MachineOperand& opnd = MI->getOperand(i); 1656f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org if (opnd.isReg() && opnd.getReg() == p.getReg()){ 1666f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org if (opnd.isDef()) 1676f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org return RU_Write; 1686f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org RegUsage = RU_Read; 1696f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org } 1706f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org } 1716f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org return RegUsage; 1726f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org} 1736f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org 1746f31ac30b9092fd02a8c97e5216cf53f3e4fae4jshin@chromium.org/// getPreviousInstr - Given a reference to an instruction in a basic 175/// block, return a reference to the previous instruction in the block, 176/// wrapping around to the last instruction of the block if the block 177/// branches to itself. 178static inline bool getPreviousInstr(MachineBasicBlock::iterator& I, 179 MachineFunction::iterator MFI) { 180 if (I == MFI->begin()) { 181 if (MFI->isPredecessor(MFI)) { 182 I = --MFI->end(); 183 return true; 184 } 185 else 186 return false; 187 } 188 --I; 189 return true; 190} 191 192MachineBasicBlock::iterator FixupLEAPass::searchBackwards(MachineOperand& p, 193 MachineBasicBlock::iterator& I, 194 MachineFunction::iterator MFI) { 195 int InstrDistance = 1; 196 MachineBasicBlock::iterator CurInst; 197 static const int INSTR_DISTANCE_THRESHOLD = 5; 198 199 CurInst = I; 200 bool Found; 201 Found = getPreviousInstr(CurInst, MFI); 202 while( Found && I != CurInst) { 203 if (CurInst->isCall() || CurInst->isInlineAsm()) 204 break; 205 if (InstrDistance > INSTR_DISTANCE_THRESHOLD) 206 break; // too far back to make a difference 207 if (usesRegister(p, CurInst) == RU_Write){ 208 return CurInst; 209 } 210 InstrDistance += TII->getInstrLatency(TM->getInstrItineraryData(), CurInst); 211 Found = getPreviousInstr(CurInst, MFI); 212 } 213 return 0; 214} 215 216void FixupLEAPass::processInstruction(MachineBasicBlock::iterator& I, 217 MachineFunction::iterator MFI) { 218 // Process a load, store, or LEA instruction. 219 MachineInstr *MI = I; 220 int opcode = MI->getOpcode(); 221 const MCInstrDesc& Desc = MI->getDesc(); 222 int AddrOffset = X86II::getMemoryOperandNo(Desc.TSFlags, opcode); 223 if (AddrOffset >= 0) { 224 AddrOffset += X86II::getOperandBias(Desc); 225 MachineOperand& p = MI->getOperand(AddrOffset + X86::AddrBaseReg); 226 if (p.isReg() && p.getReg() != X86::ESP) { 227 seekLEAFixup(p, I, MFI); 228 } 229 MachineOperand& q = MI->getOperand(AddrOffset + X86::AddrIndexReg); 230 if (q.isReg() && q.getReg() != X86::ESP) { 231 seekLEAFixup(q, I, MFI); 232 } 233 } 234} 235 236void FixupLEAPass::seekLEAFixup(MachineOperand& p, 237 MachineBasicBlock::iterator& I, 238 MachineFunction::iterator MFI) { 239 MachineBasicBlock::iterator MBI = searchBackwards(p, I, MFI); 240 if (MBI) { 241 MachineInstr* NewMI = postRAConvertToLEA(MFI, MBI); 242 if (NewMI) { 243 ++NumLEAs; 244 DEBUG(dbgs() << "Candidate to replace:"; MBI->dump();); 245 // now to replace with an equivalent LEA... 246 DEBUG(dbgs() << "Replaced by: "; NewMI->dump();); 247 MFI->erase(MBI); 248 MachineBasicBlock::iterator J = 249 static_cast<MachineBasicBlock::iterator> (NewMI); 250 processInstruction(J, MFI); 251 } 252 } 253} 254 255bool FixupLEAPass::processBasicBlock(MachineFunction &MF, 256 MachineFunction::iterator MFI) { 257 258 for (MachineBasicBlock::iterator I = MFI->begin(); I != MFI->end(); ++I) 259 processInstruction(I, MFI); 260 return false; 261} 262