X86Subtarget.h revision 27f92be8b7e83d3fe612ecf28393a9ce8334898a 
1//=====---- X86Subtarget.h - Define Subtarget for the X86 -----*- C++ -*--====//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by Nate Begeman and is distributed under the
6// University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the X86 specific subclass of TargetSubtarget.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef X86SUBTARGET_H
15#define X86SUBTARGET_H
16
17#include "llvm/Target/TargetSubtarget.h"
18
19#include <string>
20
21namespace llvm {
22class Module;
23class GlobalValue;
24class TargetMachine;
25
26namespace PICStyle {
27enum Style {
28  Stub, GOT, RIPRel, WinPIC, None
29};
30}
31
32class X86Subtarget : public TargetSubtarget {
33public:
34  enum AsmWriterFlavorTy {
35    // Note: This numbering has to match the GCC assembler dialects for inline
36    // asm alternatives to work right.
37    ATT = 0, Intel = 1, Unset
38  };
39protected:
40  enum X86SSEEnum {
41    NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3
42  };
43
44  enum X863DNowEnum {
45    NoThreeDNow, ThreeDNow, ThreeDNowA
46  };
47
48  /// AsmFlavor - Which x86 asm dialect to use.
49  ///
50  AsmWriterFlavorTy AsmFlavor;
51
52  /// PICStyle - Which PIC style to use
53  ///
54  PICStyle::Style PICStyle;
55
56  /// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, or none supported.
57  ///
58  X86SSEEnum X86SSELevel;
59
60  /// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
61  ///
62  X863DNowEnum X863DNowLevel;
63
64  /// HasX86_64 - True if the processor supports X86-64 instructions.
65  ///
66  bool HasX86_64;
67
68  /// stackAlignment - The minimum alignment known to hold of the stack frame on
69  /// entry to the function and which must be maintained by every function.
70  unsigned stackAlignment;
71
72  /// Min. memset / memcpy size that is turned into rep/movs, rep/stos ops.
73  ///
74  unsigned MinRepStrSizeThreshold;
75
76private:
77  /// Is64Bit - True if the processor supports 64-bit instructions and module
78  /// pointer size is 64 bit.
79  bool Is64Bit;
80
81  /// HasLow4GUserAddress - True if the low 4G user-space address is available.
82  ///
83  bool HasLow4GUserAddress;
84
85public:
86  enum {
87    isELF, isCygwin, isDarwin, isWindows, isMingw
88  } TargetType;
89
90  /// This constructor initializes the data members to match that
91  /// of the specified module.
92  ///
93  X86Subtarget(const Module &M, const std::string &FS, bool is64Bit);
94
95  /// getStackAlignment - Returns the minimum alignment known to hold of the
96  /// stack frame on entry to the function and which must be maintained by every
97  /// function for this subtarget.
98  unsigned getStackAlignment() const { return stackAlignment; }
99
100  /// getMinRepStrSizeThreshold - Returns the minimum memset / memcpy size
101  /// required to turn the operation into a X86 rep/movs or rep/stos
102  /// instruction. This is only used if the src / dst alignment is not DWORD
103  /// aligned.
104  unsigned getMinRepStrSizeThreshold() const { return MinRepStrSizeThreshold; }
105
106  /// ParseSubtargetFeatures - Parses features string setting specified
107  /// subtarget options.  Definition of function is auto generated by tblgen.
108  void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
109
110  /// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID
111  /// instruction.
112  void AutoDetectSubtargetFeatures();
113
114  bool is64Bit() const { return Is64Bit; }
115
116  /// hasLow4GUserSpaceAddress - True if lower 4G user-space address is
117  /// available.
118  bool hasLow4GUserSpaceAddress() const { return HasLow4GUserAddress; }
119
120  PICStyle::Style getPICStyle() const { return PICStyle; }
121  void setPICStyle(PICStyle::Style Style)  { PICStyle = Style; }
122
123  bool hasMMX() const { return X86SSELevel >= MMX; }
124  bool hasSSE1() const { return X86SSELevel >= SSE1; }
125  bool hasSSE2() const { return X86SSELevel >= SSE2; }
126  bool hasSSE3() const { return X86SSELevel >= SSE3; }
127  bool hasSSSE3() const { return X86SSELevel >= SSSE3; }
128  bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
129  bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
130
131  unsigned getAsmFlavor() const {
132    return AsmFlavor != Unset ? unsigned(AsmFlavor) : 0;
133  }
134
135  bool isFlavorAtt() const { return AsmFlavor == ATT; }
136  bool isFlavorIntel() const { return AsmFlavor == Intel; }
137
138  bool isTargetDarwin() const { return TargetType == isDarwin; }
139  bool isTargetELF() const { return TargetType == isELF; }
140  bool isTargetWindows() const { return TargetType == isWindows; }
141  bool isTargetMingw() const { return TargetType == isMingw; }
142  bool isTargetCygMing() const { return (TargetType == isMingw ||
143                                         TargetType == isCygwin); }
144  bool isTargetCygwin() const { return TargetType == isCygwin; }
145
146  std::string getDataLayout() const { return
147    is64Bit() ? std::string("e-p:64:64-f64:32:64-i64:32:64-f80:128:128") :
148    isTargetDarwin() ? std::string("e-p:32:32-f64:32:64-i64:32:64-f80:128:128") :
149    std::string("e-p:32:32-f64:32:64-i64:32:64-f80:32:32"); }
150
151  bool isPICStyleSet() const { return PICStyle != PICStyle::None; }
152  bool isPICStyleGOT() const { return PICStyle == PICStyle::GOT; }
153  bool isPICStyleStub() const { return PICStyle == PICStyle::Stub; }
154  bool isPICStyleRIPRel() const { return PICStyle == PICStyle::RIPRel; }
155  bool isPICStyleWinPIC() const { return PICStyle == PICStyle:: WinPIC; }
156
157  /// True if accessing the GV requires an extra load. For Windows, dllimported
158  /// symbols are indirect, loading the value at address GV rather then the
159  /// value of GV itself. This means that the GlobalAddress must be in the base
160  /// or index register of the address, not the GV offset field.
161  bool GVRequiresExtraLoad(const GlobalValue* GV, const TargetMachine& TM,
162                           bool isDirectCall) const;
163
164};
165
166namespace X86 {
167  /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in
168  /// the specified arguments.  If we can't run cpuid on the host, return true.
169  bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX,
170                       unsigned *rECX, unsigned *rEDX);
171}
172
173} // End llvm namespace
174
175#endif
176