1; Test 32-bit floating-point addition.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4
5declare float @foo()
6
7; Check register addition.
8define float @f1(float %f1, float %f2) {
9; CHECK-LABEL: f1:
10; CHECK: aebr %f0, %f2
11; CHECK: br %r14
12  %res = fadd float %f1, %f2
13  ret float %res
14}
15
16; Check the low end of the AEB range.
17define float @f2(float %f1, float *%ptr) {
18; CHECK-LABEL: f2:
19; CHECK: aeb %f0, 0(%r2)
20; CHECK: br %r14
21  %f2 = load float *%ptr
22  %res = fadd float %f1, %f2
23  ret float %res
24}
25
26; Check the high end of the aligned AEB range.
27define float @f3(float %f1, float *%base) {
28; CHECK-LABEL: f3:
29; CHECK: aeb %f0, 4092(%r2)
30; CHECK: br %r14
31  %ptr = getelementptr float *%base, i64 1023
32  %f2 = load float *%ptr
33  %res = fadd float %f1, %f2
34  ret float %res
35}
36
37; Check the next word up, which needs separate address logic.
38; Other sequences besides this one would be OK.
39define float @f4(float %f1, float *%base) {
40; CHECK-LABEL: f4:
41; CHECK: aghi %r2, 4096
42; CHECK: aeb %f0, 0(%r2)
43; CHECK: br %r14
44  %ptr = getelementptr float *%base, i64 1024
45  %f2 = load float *%ptr
46  %res = fadd float %f1, %f2
47  ret float %res
48}
49
50; Check negative displacements, which also need separate address logic.
51define float @f5(float %f1, float *%base) {
52; CHECK-LABEL: f5:
53; CHECK: aghi %r2, -4
54; CHECK: aeb %f0, 0(%r2)
55; CHECK: br %r14
56  %ptr = getelementptr float *%base, i64 -1
57  %f2 = load float *%ptr
58  %res = fadd float %f1, %f2
59  ret float %res
60}
61
62; Check that AEB allows indices.
63define float @f6(float %f1, float *%base, i64 %index) {
64; CHECK-LABEL: f6:
65; CHECK: sllg %r1, %r3, 2
66; CHECK: aeb %f0, 400(%r1,%r2)
67; CHECK: br %r14
68  %ptr1 = getelementptr float *%base, i64 %index
69  %ptr2 = getelementptr float *%ptr1, i64 100
70  %f2 = load float *%ptr2
71  %res = fadd float %f1, %f2
72  ret float %res
73}
74
75; Check that additions of spilled values can use AEB rather than AEBR.
76define float @f7(float *%ptr0) {
77; CHECK-LABEL: f7:
78; CHECK: brasl %r14, foo@PLT
79; CHECK: aeb %f0, 16{{[04]}}(%r15)
80; CHECK: br %r14
81  %ptr1 = getelementptr float *%ptr0, i64 2
82  %ptr2 = getelementptr float *%ptr0, i64 4
83  %ptr3 = getelementptr float *%ptr0, i64 6
84  %ptr4 = getelementptr float *%ptr0, i64 8
85  %ptr5 = getelementptr float *%ptr0, i64 10
86  %ptr6 = getelementptr float *%ptr0, i64 12
87  %ptr7 = getelementptr float *%ptr0, i64 14
88  %ptr8 = getelementptr float *%ptr0, i64 16
89  %ptr9 = getelementptr float *%ptr0, i64 18
90  %ptr10 = getelementptr float *%ptr0, i64 20
91
92  %val0 = load float *%ptr0
93  %val1 = load float *%ptr1
94  %val2 = load float *%ptr2
95  %val3 = load float *%ptr3
96  %val4 = load float *%ptr4
97  %val5 = load float *%ptr5
98  %val6 = load float *%ptr6
99  %val7 = load float *%ptr7
100  %val8 = load float *%ptr8
101  %val9 = load float *%ptr9
102  %val10 = load float *%ptr10
103
104  %ret = call float @foo()
105
106  %add0 = fadd float %ret, %val0
107  %add1 = fadd float %add0, %val1
108  %add2 = fadd float %add1, %val2
109  %add3 = fadd float %add2, %val3
110  %add4 = fadd float %add3, %val4
111  %add5 = fadd float %add4, %val5
112  %add6 = fadd float %add5, %val6
113  %add7 = fadd float %add6, %val7
114  %add8 = fadd float %add7, %val8
115  %add9 = fadd float %add8, %val9
116  %add10 = fadd float %add9, %val10
117
118  ret float %add10
119}
120