brw_structs.h revision b010814e9c7ed30cbdd60a49d81a6ea774c8c3a3
1/* 2 Copyright (C) Intel Corp. 2006. All Rights Reserved. 3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to 4 develop this 3D driver. 5 6 Permission is hereby granted, free of charge, to any person obtaining 7 a copy of this software and associated documentation files (the 8 "Software"), to deal in the Software without restriction, including 9 without limitation the rights to use, copy, modify, merge, publish, 10 distribute, sublicense, and/or sell copies of the Software, and to 11 permit persons to whom the Software is furnished to do so, subject to 12 the following conditions: 13 14 The above copyright notice and this permission notice (including the 15 next paragraph) shall be included in all copies or substantial 16 portions of the Software. 17 18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 26 **********************************************************************/ 27 /* 28 * Authors: 29 * Keith Whitwell <keith@tungstengraphics.com> 30 */ 31 32 33#ifndef BRW_STRUCTS_H 34#define BRW_STRUCTS_H 35 36 37/** Number of general purpose registers (VS, WM, etc) */ 38#define BRW_MAX_GRF 128 39 40/** Number of message register file registers */ 41#define BRW_MAX_MRF 16 42 43 44/* Command packets: 45 */ 46struct header 47{ 48 GLuint length:16; 49 GLuint opcode:16; 50}; 51 52 53union header_union 54{ 55 struct header bits; 56 GLuint dword; 57}; 58 59struct brw_3d_control 60{ 61 struct 62 { 63 GLuint length:8; 64 GLuint notify_enable:1; 65 GLuint pad:3; 66 GLuint wc_flush_enable:1; 67 GLuint depth_stall_enable:1; 68 GLuint operation:2; 69 GLuint opcode:16; 70 } header; 71 72 struct 73 { 74 GLuint pad:2; 75 GLuint dest_addr_type:1; 76 GLuint dest_addr:29; 77 } dest; 78 79 GLuint dword2; 80 GLuint dword3; 81}; 82 83 84struct brw_3d_primitive 85{ 86 struct 87 { 88 GLuint length:8; 89 GLuint pad:2; 90 GLuint topology:5; 91 GLuint indexed:1; 92 GLuint opcode:16; 93 } header; 94 95 GLuint verts_per_instance; 96 GLuint start_vert_location; 97 GLuint instance_count; 98 GLuint start_instance_location; 99 GLuint base_vert_location; 100}; 101 102/* These seem to be passed around as function args, so it works out 103 * better to keep them as #defines: 104 */ 105#define BRW_FLUSH_READ_CACHE 0x1 106#define BRW_FLUSH_STATE_CACHE 0x2 107#define BRW_INHIBIT_FLUSH_RENDER_CACHE 0x4 108#define BRW_FLUSH_SNAPSHOT_COUNTERS 0x8 109 110struct brw_mi_flush 111{ 112 GLuint flags:4; 113 GLuint pad:12; 114 GLuint opcode:16; 115}; 116 117struct brw_vf_statistics 118{ 119 GLuint statistics_enable:1; 120 GLuint pad:15; 121 GLuint opcode:16; 122}; 123 124 125 126struct brw_binding_table_pointers 127{ 128 struct header header; 129 GLuint vs; 130 GLuint gs; 131 GLuint clp; 132 GLuint sf; 133 GLuint wm; 134}; 135 136 137struct brw_blend_constant_color 138{ 139 struct header header; 140 GLfloat blend_constant_color[4]; 141}; 142 143 144struct brw_depthbuffer 145{ 146 union header_union header; 147 148 union { 149 struct { 150 GLuint pitch:18; 151 GLuint format:3; 152 GLuint pad:2; 153 GLuint software_tiled_rendering_mode:2; 154 GLuint depth_offset_disable:1; 155 GLuint tile_walk:1; 156 GLuint tiled_surface:1; 157 GLuint pad2:1; 158 GLuint surface_type:3; 159 } bits; 160 GLuint dword; 161 } dword1; 162 163 GLuint dword2_base_addr; 164 165 union { 166 struct { 167 GLuint pad:1; 168 GLuint mipmap_layout:1; 169 GLuint lod:4; 170 GLuint width:13; 171 GLuint height:13; 172 } bits; 173 GLuint dword; 174 } dword3; 175 176 union { 177 struct { 178 GLuint pad:10; 179 GLuint min_array_element:11; 180 GLuint depth:11; 181 } bits; 182 GLuint dword; 183 } dword4; 184}; 185 186struct brw_depthbuffer_g4x 187{ 188 union header_union header; 189 190 union { 191 struct { 192 GLuint pitch:18; 193 GLuint format:3; 194 GLuint pad:2; 195 GLuint software_tiled_rendering_mode:2; 196 GLuint depth_offset_disable:1; 197 GLuint tile_walk:1; 198 GLuint tiled_surface:1; 199 GLuint pad2:1; 200 GLuint surface_type:3; 201 } bits; 202 GLuint dword; 203 } dword1; 204 205 GLuint dword2_base_addr; 206 207 union { 208 struct { 209 GLuint pad:1; 210 GLuint mipmap_layout:1; 211 GLuint lod:4; 212 GLuint width:13; 213 GLuint height:13; 214 } bits; 215 GLuint dword; 216 } dword3; 217 218 union { 219 struct { 220 GLuint pad:10; 221 GLuint min_array_element:11; 222 GLuint depth:11; 223 } bits; 224 GLuint dword; 225 } dword4; 226 227 union { 228 struct { 229 GLuint xoffset:16; 230 GLuint yoffset:16; 231 } bits; 232 GLuint dword; 233 } dword5; /* NEW in Integrated Graphics Device */ 234}; 235 236struct brw_drawrect 237{ 238 struct header header; 239 GLuint xmin:16; 240 GLuint ymin:16; 241 GLuint xmax:16; 242 GLuint ymax:16; 243 GLuint xorg:16; 244 GLuint yorg:16; 245}; 246 247 248 249 250struct brw_global_depth_offset_clamp 251{ 252 struct header header; 253 GLfloat depth_offset_clamp; 254}; 255 256struct brw_indexbuffer 257{ 258 union { 259 struct 260 { 261 GLuint length:8; 262 GLuint index_format:2; 263 GLuint cut_index_enable:1; 264 GLuint pad:5; 265 GLuint opcode:16; 266 } bits; 267 GLuint dword; 268 269 } header; 270 271 GLuint buffer_start; 272 GLuint buffer_end; 273}; 274 275/* NEW in Integrated Graphics Device */ 276struct brw_aa_line_parameters 277{ 278 struct header header; 279 280 struct { 281 GLuint aa_coverage_scope:8; 282 GLuint pad0:8; 283 GLuint aa_coverage_bias:8; 284 GLuint pad1:8; 285 } bits0; 286 287 struct { 288 GLuint aa_coverage_endcap_slope:8; 289 GLuint pad0:8; 290 GLuint aa_coverage_endcap_bias:8; 291 GLuint pad1:8; 292 } bits1; 293}; 294 295struct brw_line_stipple 296{ 297 struct header header; 298 299 struct 300 { 301 GLuint pattern:16; 302 GLuint pad:16; 303 } bits0; 304 305 struct 306 { 307 GLuint repeat_count:9; 308 GLuint pad:7; 309 GLuint inverse_repeat_count:16; 310 } bits1; 311}; 312 313 314struct brw_pipelined_state_pointers 315{ 316 struct header header; 317 318 struct { 319 GLuint pad:5; 320 GLuint offset:27; /* Offset from GENERAL_STATE_BASE */ 321 } vs; 322 323 struct 324 { 325 GLuint enable:1; 326 GLuint pad:4; 327 GLuint offset:27; /* Offset from GENERAL_STATE_BASE */ 328 } gs; 329 330 struct 331 { 332 GLuint enable:1; 333 GLuint pad:4; 334 GLuint offset:27; /* Offset from GENERAL_STATE_BASE */ 335 } clp; 336 337 struct 338 { 339 GLuint pad:5; 340 GLuint offset:27; /* Offset from GENERAL_STATE_BASE */ 341 } sf; 342 343 struct 344 { 345 GLuint pad:5; 346 GLuint offset:27; /* Offset from GENERAL_STATE_BASE */ 347 } wm; 348 349 struct 350 { 351 GLuint pad:5; 352 GLuint offset:27; /* Offset from GENERAL_STATE_BASE. KW: check me! */ 353 } cc; 354}; 355 356 357struct brw_polygon_stipple_offset 358{ 359 struct header header; 360 361 struct { 362 GLuint y_offset:5; 363 GLuint pad:3; 364 GLuint x_offset:5; 365 GLuint pad0:19; 366 } bits0; 367}; 368 369 370 371struct brw_polygon_stipple 372{ 373 struct header header; 374 GLuint stipple[32]; 375}; 376 377 378 379struct brw_pipeline_select 380{ 381 struct 382 { 383 GLuint pipeline_select:1; 384 GLuint pad:15; 385 GLuint opcode:16; 386 } header; 387}; 388 389 390struct brw_pipe_control 391{ 392 struct 393 { 394 GLuint length:8; 395 GLuint notify_enable:1; 396 GLuint texture_cache_flush_enable:1; 397 GLuint indirect_state_pointers_disable:1; 398 GLuint instruction_state_cache_flush_enable:1; 399 GLuint write_cache_flush_enable:1; 400 GLuint depth_stall_enable:1; 401 GLuint post_sync_operation:2; 402 403 GLuint opcode:16; 404 } header; 405 406 struct 407 { 408 GLuint pad:2; 409 GLuint dest_addr_type:1; 410 GLuint dest_addr:29; 411 } bits1; 412 413 GLuint data0; 414 GLuint data1; 415}; 416 417 418struct brw_urb_fence 419{ 420 struct 421 { 422 GLuint length:8; 423 GLuint vs_realloc:1; 424 GLuint gs_realloc:1; 425 GLuint clp_realloc:1; 426 GLuint sf_realloc:1; 427 GLuint vfe_realloc:1; 428 GLuint cs_realloc:1; 429 GLuint pad:2; 430 GLuint opcode:16; 431 } header; 432 433 struct 434 { 435 GLuint vs_fence:10; 436 GLuint gs_fence:10; 437 GLuint clp_fence:10; 438 GLuint pad:2; 439 } bits0; 440 441 struct 442 { 443 GLuint sf_fence:10; 444 GLuint vf_fence:10; 445 GLuint cs_fence:10; 446 GLuint pad:2; 447 } bits1; 448}; 449 450struct brw_cs_urb_state 451{ 452 struct header header; 453 454 struct 455 { 456 GLuint nr_urb_entries:3; 457 GLuint pad:1; 458 GLuint urb_entry_size:5; 459 GLuint pad0:23; 460 } bits0; 461}; 462 463struct brw_constant_buffer 464{ 465 struct 466 { 467 GLuint length:8; 468 GLuint valid:1; 469 GLuint pad:7; 470 GLuint opcode:16; 471 } header; 472 473 struct 474 { 475 GLuint buffer_length:6; 476 GLuint buffer_address:26; 477 } bits0; 478}; 479 480struct brw_state_base_address 481{ 482 struct header header; 483 484 struct 485 { 486 GLuint modify_enable:1; 487 GLuint pad:4; 488 GLuint general_state_address:27; 489 } bits0; 490 491 struct 492 { 493 GLuint modify_enable:1; 494 GLuint pad:4; 495 GLuint surface_state_address:27; 496 } bits1; 497 498 struct 499 { 500 GLuint modify_enable:1; 501 GLuint pad:4; 502 GLuint indirect_object_state_address:27; 503 } bits2; 504 505 struct 506 { 507 GLuint modify_enable:1; 508 GLuint pad:11; 509 GLuint general_state_upper_bound:20; 510 } bits3; 511 512 struct 513 { 514 GLuint modify_enable:1; 515 GLuint pad:11; 516 GLuint indirect_object_state_upper_bound:20; 517 } bits4; 518}; 519 520struct brw_state_prefetch 521{ 522 struct header header; 523 524 struct 525 { 526 GLuint prefetch_count:3; 527 GLuint pad:3; 528 GLuint prefetch_pointer:26; 529 } bits0; 530}; 531 532struct brw_system_instruction_pointer 533{ 534 struct header header; 535 536 struct 537 { 538 GLuint pad:4; 539 GLuint system_instruction_pointer:28; 540 } bits0; 541}; 542 543 544 545 546/* State structs for the various fixed function units: 547 */ 548 549 550struct thread0 551{ 552 GLuint pad0:1; 553 GLuint grf_reg_count:3; 554 GLuint pad1:2; 555 GLuint kernel_start_pointer:26; /* Offset from GENERAL_STATE_BASE */ 556}; 557 558struct thread1 559{ 560 GLuint ext_halt_exception_enable:1; 561 GLuint sw_exception_enable:1; 562 GLuint mask_stack_exception_enable:1; 563 GLuint timeout_exception_enable:1; 564 GLuint illegal_op_exception_enable:1; 565 GLuint pad0:3; 566 GLuint depth_coef_urb_read_offset:6; /* WM only */ 567 GLuint pad1:2; 568 GLuint floating_point_mode:1; 569 GLuint thread_priority:1; 570 GLuint binding_table_entry_count:8; 571 GLuint pad3:5; 572 GLuint single_program_flow:1; 573}; 574 575struct thread2 576{ 577 GLuint per_thread_scratch_space:4; 578 GLuint pad0:6; 579 GLuint scratch_space_base_pointer:22; 580}; 581 582 583struct thread3 584{ 585 GLuint dispatch_grf_start_reg:4; 586 GLuint urb_entry_read_offset:6; 587 GLuint pad0:1; 588 GLuint urb_entry_read_length:6; 589 GLuint pad1:1; 590 GLuint const_urb_entry_read_offset:6; 591 GLuint pad2:1; 592 GLuint const_urb_entry_read_length:6; 593 GLuint pad3:1; 594}; 595 596 597 598struct brw_clip_unit_state 599{ 600 struct thread0 thread0; 601 struct 602 { 603 GLuint pad0:7; 604 GLuint sw_exception_enable:1; 605 GLuint pad1:3; 606 GLuint mask_stack_exception_enable:1; 607 GLuint pad2:1; 608 GLuint illegal_op_exception_enable:1; 609 GLuint pad3:2; 610 GLuint floating_point_mode:1; 611 GLuint thread_priority:1; 612 GLuint binding_table_entry_count:8; 613 GLuint pad4:5; 614 GLuint single_program_flow:1; 615 } thread1; 616 617 struct thread2 thread2; 618 struct thread3 thread3; 619 620 struct 621 { 622 GLuint pad0:9; 623 GLuint gs_output_stats:1; /* not always */ 624 GLuint stats_enable:1; 625 GLuint nr_urb_entries:7; 626 GLuint pad1:1; 627 GLuint urb_entry_allocation_size:5; 628 GLuint pad2:1; 629 GLuint max_threads:5; /* may be less */ 630 GLuint pad3:2; 631 } thread4; 632 633 struct 634 { 635 GLuint pad0:13; 636 GLuint clip_mode:3; 637 GLuint userclip_enable_flags:8; 638 GLuint userclip_must_clip:1; 639 GLuint negative_w_clip_test:1; 640 GLuint guard_band_enable:1; 641 GLuint viewport_z_clip_enable:1; 642 GLuint viewport_xy_clip_enable:1; 643 GLuint vertex_position_space:1; 644 GLuint api_mode:1; 645 GLuint pad2:1; 646 } clip5; 647 648 struct 649 { 650 GLuint pad0:5; 651 GLuint clipper_viewport_state_ptr:27; 652 } clip6; 653 654 655 GLfloat viewport_xmin; 656 GLfloat viewport_xmax; 657 GLfloat viewport_ymin; 658 GLfloat viewport_ymax; 659}; 660 661 662 663struct brw_cc_unit_state 664{ 665 struct 666 { 667 GLuint pad0:3; 668 GLuint bf_stencil_pass_depth_pass_op:3; 669 GLuint bf_stencil_pass_depth_fail_op:3; 670 GLuint bf_stencil_fail_op:3; 671 GLuint bf_stencil_func:3; 672 GLuint bf_stencil_enable:1; 673 GLuint pad1:2; 674 GLuint stencil_write_enable:1; 675 GLuint stencil_pass_depth_pass_op:3; 676 GLuint stencil_pass_depth_fail_op:3; 677 GLuint stencil_fail_op:3; 678 GLuint stencil_func:3; 679 GLuint stencil_enable:1; 680 } cc0; 681 682 683 struct 684 { 685 GLuint bf_stencil_ref:8; 686 GLuint stencil_write_mask:8; 687 GLuint stencil_test_mask:8; 688 GLuint stencil_ref:8; 689 } cc1; 690 691 692 struct 693 { 694 GLuint logicop_enable:1; 695 GLuint pad0:10; 696 GLuint depth_write_enable:1; 697 GLuint depth_test_function:3; 698 GLuint depth_test:1; 699 GLuint bf_stencil_write_mask:8; 700 GLuint bf_stencil_test_mask:8; 701 } cc2; 702 703 704 struct 705 { 706 GLuint pad0:8; 707 GLuint alpha_test_func:3; 708 GLuint alpha_test:1; 709 GLuint blend_enable:1; 710 GLuint ia_blend_enable:1; 711 GLuint pad1:1; 712 GLuint alpha_test_format:1; 713 GLuint pad2:16; 714 } cc3; 715 716 struct 717 { 718 GLuint pad0:5; 719 GLuint cc_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */ 720 } cc4; 721 722 struct 723 { 724 GLuint pad0:2; 725 GLuint ia_dest_blend_factor:5; 726 GLuint ia_src_blend_factor:5; 727 GLuint ia_blend_function:3; 728 GLuint statistics_enable:1; 729 GLuint logicop_func:4; 730 GLuint pad1:11; 731 GLuint dither_enable:1; 732 } cc5; 733 734 struct 735 { 736 GLuint clamp_post_alpha_blend:1; 737 GLuint clamp_pre_alpha_blend:1; 738 GLuint clamp_range:2; 739 GLuint pad0:11; 740 GLuint y_dither_offset:2; 741 GLuint x_dither_offset:2; 742 GLuint dest_blend_factor:5; 743 GLuint src_blend_factor:5; 744 GLuint blend_function:3; 745 } cc6; 746 747 struct { 748 union { 749 GLfloat f; 750 GLubyte ub[4]; 751 } alpha_ref; 752 } cc7; 753}; 754 755 756 757struct brw_sf_unit_state 758{ 759 struct thread0 thread0; 760 struct thread1 thread1; 761 struct thread2 thread2; 762 struct thread3 thread3; 763 764 struct 765 { 766 GLuint pad0:10; 767 GLuint stats_enable:1; 768 GLuint nr_urb_entries:7; 769 GLuint pad1:1; 770 GLuint urb_entry_allocation_size:5; 771 GLuint pad2:1; 772 GLuint max_threads:6; 773 GLuint pad3:1; 774 } thread4; 775 776 struct 777 { 778 GLuint front_winding:1; 779 GLuint viewport_transform:1; 780 GLuint pad0:3; 781 GLuint sf_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */ 782 } sf5; 783 784 struct 785 { 786 GLuint pad0:9; 787 GLuint dest_org_vbias:4; 788 GLuint dest_org_hbias:4; 789 GLuint scissor:1; 790 GLuint disable_2x2_trifilter:1; 791 GLuint disable_zero_pix_trifilter:1; 792 GLuint point_rast_rule:2; 793 GLuint line_endcap_aa_region_width:2; 794 GLuint line_width:4; 795 GLuint fast_scissor_disable:1; 796 GLuint cull_mode:2; 797 GLuint aa_enable:1; 798 } sf6; 799 800 struct 801 { 802 GLuint point_size:11; 803 GLuint use_point_size_state:1; 804 GLuint subpixel_precision:1; 805 GLuint sprite_point:1; 806 GLuint pad0:10; 807 GLuint aa_line_distance_mode:1; 808 GLuint trifan_pv:2; 809 GLuint linestrip_pv:2; 810 GLuint tristrip_pv:2; 811 GLuint line_last_pixel_enable:1; 812 } sf7; 813 814}; 815 816 817struct brw_gs_unit_state 818{ 819 struct thread0 thread0; 820 struct thread1 thread1; 821 struct thread2 thread2; 822 struct thread3 thread3; 823 824 struct 825 { 826 GLuint pad0:8; 827 GLuint rendering_enable:1; /* for IGDNG */ 828 GLuint pad4:1; 829 GLuint stats_enable:1; 830 GLuint nr_urb_entries:7; 831 GLuint pad1:1; 832 GLuint urb_entry_allocation_size:5; 833 GLuint pad2:1; 834 GLuint max_threads:5; 835 GLuint pad3:2; 836 } thread4; 837 838 struct 839 { 840 GLuint sampler_count:3; 841 GLuint pad0:2; 842 GLuint sampler_state_pointer:27; 843 } gs5; 844 845 846 struct 847 { 848 GLuint max_vp_index:4; 849 GLuint pad0:12; 850 GLuint svbi_post_inc_value:10; 851 GLuint pad1:1; 852 GLuint svbi_post_inc_enable:1; 853 GLuint svbi_payload:1; 854 GLuint discard_adjaceny:1; 855 GLuint reorder_enable:1; 856 GLuint pad2:1; 857 } gs6; 858}; 859 860 861struct brw_vs_unit_state 862{ 863 struct thread0 thread0; 864 struct thread1 thread1; 865 struct thread2 thread2; 866 struct thread3 thread3; 867 868 struct 869 { 870 GLuint pad0:10; 871 GLuint stats_enable:1; 872 GLuint nr_urb_entries:7; 873 GLuint pad1:1; 874 GLuint urb_entry_allocation_size:5; 875 GLuint pad2:1; 876 GLuint max_threads:6; 877 GLuint pad3:1; 878 } thread4; 879 880 struct 881 { 882 GLuint sampler_count:3; 883 GLuint pad0:2; 884 GLuint sampler_state_pointer:27; 885 } vs5; 886 887 struct 888 { 889 GLuint vs_enable:1; 890 GLuint vert_cache_disable:1; 891 GLuint pad0:30; 892 } vs6; 893}; 894 895 896struct brw_wm_unit_state 897{ 898 struct thread0 thread0; 899 struct thread1 thread1; 900 struct thread2 thread2; 901 struct thread3 thread3; 902 903 struct { 904 GLuint stats_enable:1; 905 GLuint depth_buffer_clear:1; 906 GLuint sampler_count:3; 907 GLuint sampler_state_pointer:27; 908 } wm4; 909 910 struct 911 { 912 GLuint enable_8_pix:1; 913 GLuint enable_16_pix:1; 914 GLuint enable_32_pix:1; 915 GLuint enable_con_32_pix:1; 916 GLuint enable_con_64_pix:1; 917 GLuint pad0:5; 918 GLuint legacy_global_depth_bias:1; 919 GLuint line_stipple:1; 920 GLuint depth_offset:1; 921 GLuint polygon_stipple:1; 922 GLuint line_aa_region_width:2; 923 GLuint line_endcap_aa_region_width:2; 924 GLuint early_depth_test:1; 925 GLuint thread_dispatch_enable:1; 926 GLuint program_uses_depth:1; 927 GLuint program_computes_depth:1; 928 GLuint program_uses_killpixel:1; 929 GLuint legacy_line_rast: 1; 930 GLuint transposed_urb_read_enable:1; 931 GLuint max_threads:7; 932 } wm5; 933 934 GLfloat global_depth_offset_constant; 935 GLfloat global_depth_offset_scale; 936 937 /* for IGDNG only */ 938 struct { 939 GLuint pad0:1; 940 GLuint grf_reg_count_1:3; 941 GLuint pad1:2; 942 GLuint kernel_start_pointer_1:26; 943 } wm8; 944 945 struct { 946 GLuint pad0:1; 947 GLuint grf_reg_count_2:3; 948 GLuint pad1:2; 949 GLuint kernel_start_pointer_2:26; 950 } wm9; 951 952 struct { 953 GLuint pad0:1; 954 GLuint grf_reg_count_3:3; 955 GLuint pad1:2; 956 GLuint kernel_start_pointer_3:26; 957 } wm10; 958}; 959 960struct brw_sampler_default_color { 961 GLfloat color[4]; 962}; 963 964struct brw_sampler_state 965{ 966 967 struct 968 { 969 GLuint shadow_function:3; 970 GLuint lod_bias:11; 971 GLuint min_filter:3; 972 GLuint mag_filter:3; 973 GLuint mip_filter:2; 974 GLuint base_level:5; 975 GLuint pad:1; 976 GLuint lod_preclamp:1; 977 GLuint default_color_mode:1; 978 GLuint pad0:1; 979 GLuint disable:1; 980 } ss0; 981 982 struct 983 { 984 GLuint r_wrap_mode:3; 985 GLuint t_wrap_mode:3; 986 GLuint s_wrap_mode:3; 987 GLuint pad:3; 988 GLuint max_lod:10; 989 GLuint min_lod:10; 990 } ss1; 991 992 993 struct 994 { 995 GLuint pad:5; 996 GLuint default_color_pointer:27; 997 } ss2; 998 999 struct 1000 { 1001 GLuint pad:19; 1002 GLuint max_aniso:3; 1003 GLuint chroma_key_mode:1; 1004 GLuint chroma_key_index:2; 1005 GLuint chroma_key_enable:1; 1006 GLuint monochrome_filter_width:3; 1007 GLuint monochrome_filter_height:3; 1008 } ss3; 1009}; 1010 1011 1012struct brw_clipper_viewport 1013{ 1014 GLfloat xmin; 1015 GLfloat xmax; 1016 GLfloat ymin; 1017 GLfloat ymax; 1018}; 1019 1020struct brw_cc_viewport 1021{ 1022 GLfloat min_depth; 1023 GLfloat max_depth; 1024}; 1025 1026struct brw_sf_viewport 1027{ 1028 struct { 1029 GLfloat m00; 1030 GLfloat m11; 1031 GLfloat m22; 1032 GLfloat m30; 1033 GLfloat m31; 1034 GLfloat m32; 1035 } viewport; 1036 1037 /* scissor coordinates are inclusive */ 1038 struct { 1039 GLshort xmin; 1040 GLshort ymin; 1041 GLshort xmax; 1042 GLshort ymax; 1043 } scissor; 1044}; 1045 1046/* Documented in the subsystem/shared-functions/sampler chapter... 1047 */ 1048struct brw_surface_state 1049{ 1050 struct { 1051 GLuint cube_pos_z:1; 1052 GLuint cube_neg_z:1; 1053 GLuint cube_pos_y:1; 1054 GLuint cube_neg_y:1; 1055 GLuint cube_pos_x:1; 1056 GLuint cube_neg_x:1; 1057 GLuint pad:4; 1058 GLuint mipmap_layout_mode:1; 1059 GLuint vert_line_stride_ofs:1; 1060 GLuint vert_line_stride:1; 1061 GLuint color_blend:1; 1062 GLuint writedisable_blue:1; 1063 GLuint writedisable_green:1; 1064 GLuint writedisable_red:1; 1065 GLuint writedisable_alpha:1; 1066 GLuint surface_format:9; /**< BRW_SURFACEFORMAT_x */ 1067 GLuint data_return_format:1; 1068 GLuint pad0:1; 1069 GLuint surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ 1070 } ss0; 1071 1072 struct { 1073 GLuint base_addr; 1074 } ss1; 1075 1076 struct { 1077 GLuint pad:2; 1078 GLuint mip_count:4; 1079 GLuint width:13; 1080 GLuint height:13; 1081 } ss2; 1082 1083 struct { 1084 GLuint tile_walk:1; 1085 GLuint tiled_surface:1; 1086 GLuint pad:1; 1087 GLuint pitch:18; 1088 GLuint depth:11; 1089 } ss3; 1090 1091 struct { 1092 GLuint multisample_position_palette_index:3; 1093 GLuint pad1:1; 1094 GLuint num_multisamples:3; 1095 GLuint pad0:1; 1096 GLuint render_target_view_extent:9; 1097 GLuint min_array_elt:11; 1098 GLuint min_lod:4; 1099 } ss4; 1100 1101 struct { 1102 GLuint pad1:16; 1103 GLuint llc_mapping:1; 1104 GLuint mlc_mapping:1; 1105 GLuint gfdt:1; 1106 GLuint gfdt_src:1; 1107 GLuint y_offset:4; 1108 GLuint pad0:1; 1109 GLuint x_offset:7; 1110 } ss5; /* New in G4X */ 1111 1112}; 1113 1114 1115 1116struct brw_vertex_buffer_state 1117{ 1118 struct { 1119 GLuint pitch:11; 1120 GLuint pad:15; 1121 GLuint access_type:1; 1122 GLuint vb_index:5; 1123 } vb0; 1124 1125 GLuint start_addr; 1126 GLuint max_index; 1127#if 1 1128 GLuint instance_data_step_rate; /* not included for sequential/random vertices? */ 1129#endif 1130}; 1131 1132#define BRW_VBP_MAX 17 1133 1134struct brw_vb_array_state { 1135 struct header header; 1136 struct brw_vertex_buffer_state vb[BRW_VBP_MAX]; 1137}; 1138 1139 1140struct brw_vertex_element_state 1141{ 1142 struct 1143 { 1144 GLuint src_offset:11; 1145 GLuint pad:5; 1146 GLuint src_format:9; 1147 GLuint pad0:1; 1148 GLuint valid:1; 1149 GLuint vertex_buffer_index:5; 1150 } ve0; 1151 1152 struct 1153 { 1154 GLuint dst_offset:8; 1155 GLuint pad:8; 1156 GLuint vfcomponent3:4; 1157 GLuint vfcomponent2:4; 1158 GLuint vfcomponent1:4; 1159 GLuint vfcomponent0:4; 1160 } ve1; 1161}; 1162 1163#define BRW_VEP_MAX 18 1164 1165struct brw_vertex_element_packet { 1166 struct header header; 1167 struct brw_vertex_element_state ve[BRW_VEP_MAX]; /* note: less than _TNL_ATTRIB_MAX */ 1168}; 1169 1170 1171struct brw_urb_immediate { 1172 GLuint opcode:4; 1173 GLuint offset:6; 1174 GLuint swizzle_control:2; 1175 GLuint pad:1; 1176 GLuint allocate:1; 1177 GLuint used:1; 1178 GLuint complete:1; 1179 GLuint response_length:4; 1180 GLuint msg_length:4; 1181 GLuint msg_target:4; 1182 GLuint pad1:3; 1183 GLuint end_of_thread:1; 1184}; 1185 1186/* Instruction format for the execution units: 1187 */ 1188 1189struct brw_instruction 1190{ 1191 struct 1192 { 1193 GLuint opcode:7; 1194 GLuint pad:1; 1195 GLuint access_mode:1; 1196 GLuint mask_control:1; 1197 GLuint dependency_control:2; 1198 GLuint compression_control:2; 1199 GLuint thread_control:2; 1200 GLuint predicate_control:4; 1201 GLuint predicate_inverse:1; 1202 GLuint execution_size:3; 1203 GLuint destreg__conditionalmod:4; /* destreg - send, conditionalmod - others */ 1204 GLuint pad0:2; 1205 GLuint debug_control:1; 1206 GLuint saturate:1; 1207 } header; 1208 1209 union { 1210 struct 1211 { 1212 GLuint dest_reg_file:2; 1213 GLuint dest_reg_type:3; 1214 GLuint src0_reg_file:2; 1215 GLuint src0_reg_type:3; 1216 GLuint src1_reg_file:2; 1217 GLuint src1_reg_type:3; 1218 GLuint pad:1; 1219 GLuint dest_subreg_nr:5; 1220 GLuint dest_reg_nr:8; 1221 GLuint dest_horiz_stride:2; 1222 GLuint dest_address_mode:1; 1223 } da1; 1224 1225 struct 1226 { 1227 GLuint dest_reg_file:2; 1228 GLuint dest_reg_type:3; 1229 GLuint src0_reg_file:2; 1230 GLuint src0_reg_type:3; 1231 GLuint src1_reg_file:2; /* 0x00000c00 */ 1232 GLuint src1_reg_type:3; /* 0x00007000 */ 1233 GLuint pad:1; 1234 GLint dest_indirect_offset:10; /* offset against the deref'd address reg */ 1235 GLuint dest_subreg_nr:3; /* subnr for the address reg a0.x */ 1236 GLuint dest_horiz_stride:2; 1237 GLuint dest_address_mode:1; 1238 } ia1; 1239 1240 struct 1241 { 1242 GLuint dest_reg_file:2; 1243 GLuint dest_reg_type:3; 1244 GLuint src0_reg_file:2; 1245 GLuint src0_reg_type:3; 1246 GLuint src1_reg_file:2; 1247 GLuint src1_reg_type:3; 1248 GLuint pad:1; 1249 GLuint dest_writemask:4; 1250 GLuint dest_subreg_nr:1; 1251 GLuint dest_reg_nr:8; 1252 GLuint pad1:2; 1253 GLuint dest_address_mode:1; 1254 } da16; 1255 1256 struct 1257 { 1258 GLuint dest_reg_file:2; 1259 GLuint dest_reg_type:3; 1260 GLuint src0_reg_file:2; 1261 GLuint src0_reg_type:3; 1262 GLuint pad0:6; 1263 GLuint dest_writemask:4; 1264 GLint dest_indirect_offset:6; 1265 GLuint dest_subreg_nr:3; 1266 GLuint pad1:2; 1267 GLuint dest_address_mode:1; 1268 } ia16; 1269 } bits1; 1270 1271 1272 union { 1273 struct 1274 { 1275 GLuint src0_subreg_nr:5; 1276 GLuint src0_reg_nr:8; 1277 GLuint src0_abs:1; 1278 GLuint src0_negate:1; 1279 GLuint src0_address_mode:1; 1280 GLuint src0_horiz_stride:2; 1281 GLuint src0_width:3; 1282 GLuint src0_vert_stride:4; 1283 GLuint flag_reg_nr:1; 1284 GLuint pad:6; 1285 } da1; 1286 1287 struct 1288 { 1289 GLint src0_indirect_offset:10; 1290 GLuint src0_subreg_nr:3; 1291 GLuint src0_abs:1; 1292 GLuint src0_negate:1; 1293 GLuint src0_address_mode:1; 1294 GLuint src0_horiz_stride:2; 1295 GLuint src0_width:3; 1296 GLuint src0_vert_stride:4; 1297 GLuint flag_reg_nr:1; 1298 GLuint pad:6; 1299 } ia1; 1300 1301 struct 1302 { 1303 GLuint src0_swz_x:2; 1304 GLuint src0_swz_y:2; 1305 GLuint src0_subreg_nr:1; 1306 GLuint src0_reg_nr:8; 1307 GLuint src0_abs:1; 1308 GLuint src0_negate:1; 1309 GLuint src0_address_mode:1; 1310 GLuint src0_swz_z:2; 1311 GLuint src0_swz_w:2; 1312 GLuint pad0:1; 1313 GLuint src0_vert_stride:4; 1314 GLuint flag_reg_nr:1; 1315 GLuint pad1:6; 1316 } da16; 1317 1318 struct 1319 { 1320 GLuint src0_swz_x:2; 1321 GLuint src0_swz_y:2; 1322 GLint src0_indirect_offset:6; 1323 GLuint src0_subreg_nr:3; 1324 GLuint src0_abs:1; 1325 GLuint src0_negate:1; 1326 GLuint src0_address_mode:1; 1327 GLuint src0_swz_z:2; 1328 GLuint src0_swz_w:2; 1329 GLuint pad0:1; 1330 GLuint src0_vert_stride:4; 1331 GLuint flag_reg_nr:1; 1332 GLuint pad1:6; 1333 } ia16; 1334 1335 struct 1336 { 1337 GLuint pad:26; 1338 GLuint end_of_thread:1; 1339 GLuint pad1:1; 1340 GLuint sfid:4; 1341 } send_igdng; /* for IGDNG only */ 1342 1343 } bits2; 1344 1345 union 1346 { 1347 struct 1348 { 1349 GLuint src1_subreg_nr:5; 1350 GLuint src1_reg_nr:8; 1351 GLuint src1_abs:1; 1352 GLuint src1_negate:1; 1353 GLuint src1_address_mode:1; 1354 GLuint src1_horiz_stride:2; 1355 GLuint src1_width:3; 1356 GLuint src1_vert_stride:4; 1357 GLuint pad0:7; 1358 } da1; 1359 1360 struct 1361 { 1362 GLuint src1_swz_x:2; 1363 GLuint src1_swz_y:2; 1364 GLuint src1_subreg_nr:1; 1365 GLuint src1_reg_nr:8; 1366 GLuint src1_abs:1; 1367 GLuint src1_negate:1; 1368 GLuint src1_address_mode:1; 1369 GLuint src1_swz_z:2; 1370 GLuint src1_swz_w:2; 1371 GLuint pad1:1; 1372 GLuint src1_vert_stride:4; 1373 GLuint pad2:7; 1374 } da16; 1375 1376 struct 1377 { 1378 GLint src1_indirect_offset:10; 1379 GLuint src1_subreg_nr:3; 1380 GLuint src1_abs:1; 1381 GLuint src1_negate:1; 1382 GLuint src1_address_mode:1; 1383 GLuint src1_horiz_stride:2; 1384 GLuint src1_width:3; 1385 GLuint src1_vert_stride:4; 1386 GLuint flag_reg_nr:1; 1387 GLuint pad1:6; 1388 } ia1; 1389 1390 struct 1391 { 1392 GLuint src1_swz_x:2; 1393 GLuint src1_swz_y:2; 1394 GLint src1_indirect_offset:6; 1395 GLuint src1_subreg_nr:3; 1396 GLuint src1_abs:1; 1397 GLuint src1_negate:1; 1398 GLuint pad0:1; 1399 GLuint src1_swz_z:2; 1400 GLuint src1_swz_w:2; 1401 GLuint pad1:1; 1402 GLuint src1_vert_stride:4; 1403 GLuint flag_reg_nr:1; 1404 GLuint pad2:6; 1405 } ia16; 1406 1407 1408 struct 1409 { 1410 GLint jump_count:16; /* note: signed */ 1411 GLuint pop_count:4; 1412 GLuint pad0:12; 1413 } if_else; 1414 1415 struct { 1416 GLuint function:4; 1417 GLuint int_type:1; 1418 GLuint precision:1; 1419 GLuint saturate:1; 1420 GLuint data_type:1; 1421 GLuint pad0:8; 1422 GLuint response_length:4; 1423 GLuint msg_length:4; 1424 GLuint msg_target:4; 1425 GLuint pad1:3; 1426 GLuint end_of_thread:1; 1427 } math; 1428 1429 struct { 1430 GLuint function:4; 1431 GLuint int_type:1; 1432 GLuint precision:1; 1433 GLuint saturate:1; 1434 GLuint data_type:1; 1435 GLuint snapshot:1; 1436 GLuint pad0:10; 1437 GLuint header_present:1; 1438 GLuint response_length:5; 1439 GLuint msg_length:4; 1440 GLuint pad1:2; 1441 GLuint end_of_thread:1; 1442 } math_igdng; 1443 1444 struct { 1445 GLuint binding_table_index:8; 1446 GLuint sampler:4; 1447 GLuint return_format:2; 1448 GLuint msg_type:2; 1449 GLuint response_length:4; 1450 GLuint msg_length:4; 1451 GLuint msg_target:4; 1452 GLuint pad1:3; 1453 GLuint end_of_thread:1; 1454 } sampler; 1455 1456 struct { 1457 GLuint binding_table_index:8; 1458 GLuint sampler:4; 1459 GLuint msg_type:4; 1460 GLuint response_length:4; 1461 GLuint msg_length:4; 1462 GLuint msg_target:4; 1463 GLuint pad1:3; 1464 GLuint end_of_thread:1; 1465 } sampler_g4x; 1466 1467 struct { 1468 GLuint binding_table_index:8; 1469 GLuint sampler:4; 1470 GLuint msg_type:4; 1471 GLuint simd_mode:2; 1472 GLuint pad0:1; 1473 GLuint header_present:1; 1474 GLuint response_length:5; 1475 GLuint msg_length:4; 1476 GLuint pad1:2; 1477 GLuint end_of_thread:1; 1478 } sampler_igdng; 1479 1480 struct brw_urb_immediate urb; 1481 1482 struct { 1483 GLuint opcode:4; 1484 GLuint offset:6; 1485 GLuint swizzle_control:2; 1486 GLuint pad:1; 1487 GLuint allocate:1; 1488 GLuint used:1; 1489 GLuint complete:1; 1490 GLuint pad0:3; 1491 GLuint header_present:1; 1492 GLuint response_length:5; 1493 GLuint msg_length:4; 1494 GLuint pad1:2; 1495 GLuint end_of_thread:1; 1496 } urb_igdng; 1497 1498 struct { 1499 GLuint binding_table_index:8; 1500 GLuint msg_control:4; 1501 GLuint msg_type:2; 1502 GLuint target_cache:2; 1503 GLuint response_length:4; 1504 GLuint msg_length:4; 1505 GLuint msg_target:4; 1506 GLuint pad1:3; 1507 GLuint end_of_thread:1; 1508 } dp_read; 1509 1510 struct { 1511 GLuint binding_table_index:8; 1512 GLuint msg_control:3; 1513 GLuint msg_type:3; 1514 GLuint target_cache:2; 1515 GLuint pad0:3; 1516 GLuint header_present:1; 1517 GLuint response_length:5; 1518 GLuint msg_length:4; 1519 GLuint pad1:2; 1520 GLuint end_of_thread:1; 1521 } dp_read_igdng; 1522 1523 struct { 1524 GLuint binding_table_index:8; 1525 GLuint msg_control:3; 1526 GLuint pixel_scoreboard_clear:1; 1527 GLuint msg_type:3; 1528 GLuint send_commit_msg:1; 1529 GLuint response_length:4; 1530 GLuint msg_length:4; 1531 GLuint msg_target:4; 1532 GLuint pad1:3; 1533 GLuint end_of_thread:1; 1534 } dp_write; 1535 1536 struct { 1537 GLuint binding_table_index:8; 1538 GLuint msg_control:3; 1539 GLuint pixel_scoreboard_clear:1; 1540 GLuint msg_type:3; 1541 GLuint send_commit_msg:1; 1542 GLuint pad0:3; 1543 GLuint header_present:1; 1544 GLuint response_length:5; 1545 GLuint msg_length:4; 1546 GLuint pad1:2; 1547 GLuint end_of_thread:1; 1548 } dp_write_igdng; 1549 1550 struct { 1551 GLuint pad:16; 1552 GLuint response_length:4; 1553 GLuint msg_length:4; 1554 GLuint msg_target:4; 1555 GLuint pad1:3; 1556 GLuint end_of_thread:1; 1557 } generic; 1558 1559 struct { 1560 GLuint pad:19; 1561 GLuint header_present:1; 1562 GLuint response_length:5; 1563 GLuint msg_length:4; 1564 GLuint pad1:2; 1565 GLuint end_of_thread:1; 1566 } generic_igdng; 1567 1568 GLint d; 1569 GLuint ud; 1570 float f; 1571 } bits3; 1572}; 1573 1574 1575#endif 1576