intel_context.h revision f9439e4a4696b8bc5fcdf3ac664f5e8d446f6621
1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28#ifndef INTELCONTEXT_INC 29#define INTELCONTEXT_INC 30 31 32 33#include "main/mtypes.h" 34#include "main/mm.h" 35#include "texmem.h" 36#include "dri_metaops.h" 37#include "drm.h" 38#include "intel_bufmgr.h" 39 40#include "intel_screen.h" 41#include "intel_tex_obj.h" 42#include "i915_drm.h" 43#include "tnl/t_vertex.h" 44 45#define TAG(x) intel##x 46#include "tnl_dd/t_dd_vertex.h" 47#undef TAG 48 49#define DV_PF_555 (1<<8) 50#define DV_PF_565 (2<<8) 51#define DV_PF_8888 (3<<8) 52#define DV_PF_4444 (8<<8) 53#define DV_PF_1555 (9<<8) 54 55struct intel_region; 56struct intel_context; 57 58typedef void (*intel_tri_func) (struct intel_context *, intelVertex *, 59 intelVertex *, intelVertex *); 60typedef void (*intel_line_func) (struct intel_context *, intelVertex *, 61 intelVertex *); 62typedef void (*intel_point_func) (struct intel_context *, intelVertex *); 63 64/** 65 * Bits for intel->Fallback field 66 */ 67/*@{*/ 68#define INTEL_FALLBACK_DRAW_BUFFER 0x1 69#define INTEL_FALLBACK_READ_BUFFER 0x2 70#define INTEL_FALLBACK_DEPTH_BUFFER 0x4 71#define INTEL_FALLBACK_STENCIL_BUFFER 0x8 72#define INTEL_FALLBACK_USER 0x10 73#define INTEL_FALLBACK_RENDERMODE 0x20 74#define INTEL_FALLBACK_TEXTURE 0x40 75#define INTEL_FALLBACK_DRIVER 0x1000 /**< first for drivers */ 76/*@}*/ 77 78extern void intelFallback(struct intel_context *intel, GLbitfield bit, 79 GLboolean mode); 80#define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode ) 81 82 83#define INTEL_WRITE_PART 0x1 84#define INTEL_WRITE_FULL 0x2 85#define INTEL_READ 0x4 86 87#define INTEL_MAX_FIXUP 64 88 89struct intel_sync_object { 90 struct gl_sync_object Base; 91 92 /** Batch associated with this sync object */ 93 drm_intel_bo *bo; 94}; 95 96/** 97 * intel_context is derived from Mesa's context class: GLcontext. 98 */ 99struct intel_context 100{ 101 GLcontext ctx; /**< base class, must be first field */ 102 103 struct 104 { 105 void (*destroy) (struct intel_context * intel); 106 void (*emit_state) (struct intel_context * intel); 107 void (*finish_batch) (struct intel_context * intel); 108 void (*new_batch) (struct intel_context * intel); 109 void (*emit_invarient_state) (struct intel_context * intel); 110 void (*update_texture_state) (struct intel_context * intel); 111 112 void (*render_start) (struct intel_context * intel); 113 void (*render_prevalidate) (struct intel_context * intel); 114 void (*set_draw_region) (struct intel_context * intel, 115 struct intel_region * draw_regions[], 116 struct intel_region * depth_region, 117 GLuint num_regions); 118 119 void (*reduced_primitive_state) (struct intel_context * intel, 120 GLenum rprim); 121 122 GLboolean (*check_vertex_size) (struct intel_context * intel, 123 GLuint expected); 124 void (*invalidate_state) (struct intel_context *intel, 125 GLuint new_state); 126 127 void (*assert_not_dirty) (struct intel_context *intel); 128 129 void (*debug_batch)(struct intel_context *intel); 130 } vtbl; 131 132 struct dri_metaops meta; 133 134 GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */ 135 GLuint NewGLState; 136 137 dri_bufmgr *bufmgr; 138 unsigned int maxBatchSize; 139 140 /** 141 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965. 142 */ 143 int gen; 144 GLboolean needs_ff_sync; 145 GLboolean is_ironlake; 146 GLboolean is_g4x; 147 GLboolean is_945; 148 GLboolean has_luminance_srgb; 149 150 int urb_size; 151 152 struct intel_batchbuffer *batch; 153 drm_intel_bo *first_post_swapbuffers_batch; 154 GLboolean no_batch_wrap; 155 GLboolean using_dri2_swapbuffers; 156 157 struct 158 { 159 GLuint id; 160 uint32_t primitive; /**< Current hardware primitive type */ 161 void (*flush) (struct intel_context *); 162 GLubyte *start_ptr; /**< for i8xx */ 163 dri_bo *vb_bo; 164 uint8_t *vb; 165 unsigned int start_offset; /**< Byte offset of primitive sequence */ 166 unsigned int current_offset; /**< Byte offset of next vertex */ 167 unsigned int count; /**< Number of vertices in current primitive */ 168 } prim; 169 170 GLuint stats_wm; 171 GLboolean locked; 172 char *prevLockFile; 173 int prevLockLine; 174 175 /* Offsets of fields within the current vertex: 176 */ 177 GLuint coloroffset; 178 GLuint specoffset; 179 GLuint wpos_offset; 180 GLuint wpos_size; 181 182 struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX]; 183 GLuint vertex_attr_count; 184 185 GLfloat polygon_offset_scale; /* dependent on depth_scale, bpp */ 186 187 GLboolean hw_stencil; 188 GLboolean hw_stipple; 189 GLboolean depth_buffer_is_float; 190 GLboolean no_rast; 191 GLboolean no_hw; 192 GLboolean always_flush_batch; 193 GLboolean always_flush_cache; 194 195 /* 0 - nonconformant, best performance; 196 * 1 - fallback to sw for known conformance bugs 197 * 2 - always fallback to sw 198 */ 199 GLuint conformance_mode; 200 201 /* State for intelvb.c and inteltris.c. 202 */ 203 GLuint RenderIndex; 204 GLmatrix ViewportMatrix; 205 GLenum render_primitive; 206 GLenum reduced_primitive; 207 GLuint vertex_size; 208 GLubyte *verts; /* points to tnl->clipspace.vertex_buf */ 209 210 /* Fallback rasterization functions 211 */ 212 intel_point_func draw_point; 213 intel_line_func draw_line; 214 intel_tri_func draw_tri; 215 216 /** 217 * Set if rendering has occured to the drawable's front buffer. 218 * 219 * This is used in the DRI2 case to detect that glFlush should also copy 220 * the contents of the fake front buffer to the real front buffer. 221 */ 222 GLboolean front_buffer_dirty; 223 224 /** 225 * Track whether front-buffer rendering is currently enabled 226 * 227 * A separate flag is used to track this in order to support MRT more 228 * easily. 229 */ 230 GLboolean is_front_buffer_rendering; 231 /** 232 * Track whether front-buffer is the current read target. 233 * 234 * This is closely associated with is_front_buffer_rendering, but may 235 * be set separately. The DRI2 fake front buffer must be referenced 236 * either way. 237 */ 238 GLboolean is_front_buffer_reading; 239 240 GLboolean use_texture_tiling; 241 GLboolean use_early_z; 242 243 int driFd; 244 245 __DRIcontext *driContext; 246 __DRIdrawable *driDrawable; 247 __DRIdrawable *driReadDrawable; 248 __DRIscreen *driScreen; 249 intelScreenPrivate *intelScreen; 250 251 /** 252 * Configuration cache 253 */ 254 driOptionCache optionCache; 255}; 256 257extern char *__progname; 258 259 260#define SUBPIXEL_X 0.125 261#define SUBPIXEL_Y 0.125 262 263#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) 264#define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1)) 265#define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0) 266 267static INLINE uint32_t 268U_FIXED(float value, uint32_t frac_bits) 269{ 270 value *= (1 << frac_bits); 271 return value < 0 ? 0 : value; 272} 273 274static INLINE uint32_t 275S_FIXED(float value, uint32_t frac_bits) 276{ 277 return value * (1 << frac_bits); 278} 279 280#define INTEL_FIREVERTICES(intel) \ 281do { \ 282 if ((intel)->prim.flush) \ 283 (intel)->prim.flush(intel); \ 284} while (0) 285 286/* ================================================================ 287 * From linux kernel i386 header files, copes with odd sizes better 288 * than COPY_DWORDS would: 289 * XXX Put this in src/mesa/main/imports.h ??? 290 */ 291#if defined(i386) || defined(__i386__) 292static INLINE void * __memcpy(void * to, const void * from, size_t n) 293{ 294 int d0, d1, d2; 295 __asm__ __volatile__( 296 "rep ; movsl\n\t" 297 "testb $2,%b4\n\t" 298 "je 1f\n\t" 299 "movsw\n" 300 "1:\ttestb $1,%b4\n\t" 301 "je 2f\n\t" 302 "movsb\n" 303 "2:" 304 : "=&c" (d0), "=&D" (d1), "=&S" (d2) 305 :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from) 306 : "memory"); 307 return (to); 308} 309#else 310#define __memcpy(a,b,c) memcpy(a,b,c) 311#endif 312 313 314/* ================================================================ 315 * Debugging: 316 */ 317extern int INTEL_DEBUG; 318 319#define DEBUG_TEXTURE 0x1 320#define DEBUG_STATE 0x2 321#define DEBUG_IOCTL 0x4 322#define DEBUG_BLIT 0x8 323#define DEBUG_MIPTREE 0x10 324#define DEBUG_FALLBACKS 0x20 325#define DEBUG_VERBOSE 0x40 326#define DEBUG_BATCH 0x80 327#define DEBUG_PIXEL 0x100 328#define DEBUG_BUFMGR 0x200 329#define DEBUG_REGION 0x400 330#define DEBUG_FBO 0x800 331#define DEBUG_LOCK 0x1000 332#define DEBUG_SYNC 0x2000 333#define DEBUG_PRIMS 0x4000 334#define DEBUG_VERTS 0x8000 335#define DEBUG_DRI 0x10000 336#define DEBUG_DMA 0x20000 337#define DEBUG_SANITY 0x40000 338#define DEBUG_SLEEP 0x80000 339#define DEBUG_STATS 0x100000 340#define DEBUG_TILE 0x200000 341#define DEBUG_SINGLE_THREAD 0x400000 342#define DEBUG_WM 0x800000 343#define DEBUG_URB 0x1000000 344#define DEBUG_VS 0x2000000 345 346#define DBG(...) do { \ 347 if (INTEL_DEBUG & FILE_DEBUG_FLAG) \ 348 _mesa_printf(__VA_ARGS__); \ 349} while(0) 350 351#define PCI_CHIP_845_G 0x2562 352#define PCI_CHIP_I830_M 0x3577 353#define PCI_CHIP_I855_GM 0x3582 354#define PCI_CHIP_I865_G 0x2572 355#define PCI_CHIP_I915_G 0x2582 356#define PCI_CHIP_I915_GM 0x2592 357#define PCI_CHIP_I945_G 0x2772 358#define PCI_CHIP_I945_GM 0x27A2 359#define PCI_CHIP_I945_GME 0x27AE 360#define PCI_CHIP_G33_G 0x29C2 361#define PCI_CHIP_Q35_G 0x29B2 362#define PCI_CHIP_Q33_G 0x29D2 363 364 365/* ================================================================ 366 * intel_context.c: 367 */ 368 369extern GLboolean intelInitContext(struct intel_context *intel, 370 const __GLcontextModes * mesaVis, 371 __DRIcontext * driContextPriv, 372 void *sharedContextPrivate, 373 struct dd_function_table *functions); 374 375extern void intelFinish(GLcontext * ctx); 376extern void intelFlush(GLcontext * ctx); 377extern void intel_flush(GLcontext * ctx, GLboolean needs_mi_flush); 378 379extern void intelInitDriverFunctions(struct dd_function_table *functions); 380 381void intel_init_syncobj_functions(struct dd_function_table *functions); 382 383 384/* ================================================================ 385 * intel_state.c: 386 */ 387extern void intelInitStateFuncs(struct dd_function_table *functions); 388 389#define COMPAREFUNC_ALWAYS 0 390#define COMPAREFUNC_NEVER 0x1 391#define COMPAREFUNC_LESS 0x2 392#define COMPAREFUNC_EQUAL 0x3 393#define COMPAREFUNC_LEQUAL 0x4 394#define COMPAREFUNC_GREATER 0x5 395#define COMPAREFUNC_NOTEQUAL 0x6 396#define COMPAREFUNC_GEQUAL 0x7 397 398#define STENCILOP_KEEP 0 399#define STENCILOP_ZERO 0x1 400#define STENCILOP_REPLACE 0x2 401#define STENCILOP_INCRSAT 0x3 402#define STENCILOP_DECRSAT 0x4 403#define STENCILOP_INCR 0x5 404#define STENCILOP_DECR 0x6 405#define STENCILOP_INVERT 0x7 406 407#define LOGICOP_CLEAR 0 408#define LOGICOP_NOR 0x1 409#define LOGICOP_AND_INV 0x2 410#define LOGICOP_COPY_INV 0x3 411#define LOGICOP_AND_RVRSE 0x4 412#define LOGICOP_INV 0x5 413#define LOGICOP_XOR 0x6 414#define LOGICOP_NAND 0x7 415#define LOGICOP_AND 0x8 416#define LOGICOP_EQUIV 0x9 417#define LOGICOP_NOOP 0xa 418#define LOGICOP_OR_INV 0xb 419#define LOGICOP_COPY 0xc 420#define LOGICOP_OR_RVRSE 0xd 421#define LOGICOP_OR 0xe 422#define LOGICOP_SET 0xf 423 424#define BLENDFACT_ZERO 0x01 425#define BLENDFACT_ONE 0x02 426#define BLENDFACT_SRC_COLR 0x03 427#define BLENDFACT_INV_SRC_COLR 0x04 428#define BLENDFACT_SRC_ALPHA 0x05 429#define BLENDFACT_INV_SRC_ALPHA 0x06 430#define BLENDFACT_DST_ALPHA 0x07 431#define BLENDFACT_INV_DST_ALPHA 0x08 432#define BLENDFACT_DST_COLR 0x09 433#define BLENDFACT_INV_DST_COLR 0x0a 434#define BLENDFACT_SRC_ALPHA_SATURATE 0x0b 435#define BLENDFACT_CONST_COLOR 0x0c 436#define BLENDFACT_INV_CONST_COLOR 0x0d 437#define BLENDFACT_CONST_ALPHA 0x0e 438#define BLENDFACT_INV_CONST_ALPHA 0x0f 439#define BLENDFACT_MASK 0x0f 440 441enum { 442 DRI_CONF_BO_REUSE_DISABLED, 443 DRI_CONF_BO_REUSE_ALL 444}; 445 446extern int intel_translate_shadow_compare_func(GLenum func); 447extern int intel_translate_compare_func(GLenum func); 448extern int intel_translate_stencil_op(GLenum op); 449extern int intel_translate_blend_factor(GLenum factor); 450extern int intel_translate_logic_op(GLenum opcode); 451 452void intel_viewport(GLcontext * ctx, GLint x, GLint y, 453 GLsizei width, GLsizei height); 454 455void intel_update_renderbuffers(__DRIcontext *context, 456 __DRIdrawable *drawable); 457 458void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region, 459 uint32_t buffer_id); 460 461/*====================================================================== 462 * Inline conversion functions. 463 * These are better-typed than the macros used previously: 464 */ 465static INLINE struct intel_context * 466intel_context(GLcontext * ctx) 467{ 468 return (struct intel_context *) ctx; 469} 470 471static INLINE GLboolean 472is_power_of_two(uint32_t value) 473{ 474 return (value & (value - 1)) == 0; 475} 476 477static INLINE void 478intel_bo_map_gtt_preferred(struct intel_context *intel, 479 drm_intel_bo *bo, 480 GLboolean write) 481{ 482 if (intel->intelScreen->kernel_exec_fencing) 483 drm_intel_gem_bo_map_gtt(bo); 484 else 485 drm_intel_bo_map(bo, write); 486} 487 488static INLINE void 489intel_bo_unmap_gtt_preferred(struct intel_context *intel, 490 drm_intel_bo *bo) 491{ 492 if (intel->intelScreen->kernel_exec_fencing) 493 drm_intel_gem_bo_unmap_gtt(bo); 494 else 495 drm_intel_bo_unmap(bo); 496} 497 498#endif 499