radeon_context.h revision 692ca82116485a9c6191e5265c5b369d5b4f82f3
15df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/************************************************************************** 25df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 35df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulCopyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and 45df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul VA Linux Systems Inc., Fremont, California. 54d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFaddenCopyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. 64d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 74d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFaddenThe Weather Channel (TM) funded Tungsten Graphics to develop the 84d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFaddeninitial release of the Radeon 8500 driver under the XFree86 license. 94d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFaddenThis notice must be preserved. 105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulAll Rights Reserved. 125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulPermission is hereby granted, free of charge, to any person obtaining 145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paula copy of this software and associated documentation files (the 155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul"Software"), to deal in the Software without restriction, including 165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulwithout limitation the rights to use, copy, modify, merge, publish, 175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Pauldistribute, sublicense, and/or sell copies of the Software, and to 185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulpermit persons to whom the Software is furnished to do so, subject to 195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulthe following conditions: 205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulThe above copyright notice and this permission notice (including the 225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulnext paragraph) shall be included in all copies or substantial 235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulportions of the Software. 245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulIN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulLIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul**************************************************************************/ 345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* 365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Authors: 375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Gareth Hughes <gareth@valinux.com> 385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Keith Whitwell <keith@tungstengraphics.com> 394d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden * Kevin E. Martin <martin@valinux.com> 404d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden * Nicolai Haehnle <prefect_@gmx.net> 415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#ifndef __RADEON_CONTEXT_H__ 445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define __RADEON_CONTEXT_H__ 455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 468a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt#include "tnl/t_vertex.h" 475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "dri_util.h" 486ddfdff659196cf4eeb0e5fed70ddd1ced0d16fcJon Smirl#include "drm.h" 496ddfdff659196cf4eeb0e5fed70ddd1ced0d16fcJon Smirl#include "radeon_drm.h" 505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "texmem.h" 515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 52ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/macros.h" 53ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/mtypes.h" 54ecadb51bbcb972a79f3ed79e65a7986b9396e757Brian Paul#include "main/colormac.h" 555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstruct radeon_context; 575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paultypedef struct radeon_context radeonContextRec; 585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paultypedef struct radeon_context *radeonContextPtr; 595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_lock.h" 615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_screen.h" 625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 63692ca82116485a9c6191e5265c5b369d5b4f82f3Dave Airlie#include "common_context.h" 64692ca82116485a9c6191e5265c5b369d5b4f82f3Dave Airlie 65692ca82116485a9c6191e5265c5b369d5b4f82f3Dave Airlie#define R100_TEX_ALL 0x7 665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 674d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFaddentypedef void (*radeon_tri_func) (radeonContextPtr, 685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonVertex *, 694d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden radeonVertex *, radeonVertex *); 705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 714d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFaddentypedef void (*radeon_line_func) (radeonContextPtr, 724d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden radeonVertex *, radeonVertex *); 735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 744d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFaddentypedef void (*radeon_point_func) (radeonContextPtr, radeonVertex *); 755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 7830daa7529331057ecb470efb500152e9c4aa1ae5Roland Scheidegger/* used for both tcl_vtx and vc_frmt tex bits (they are identical) */ 7930daa7529331057ecb470efb500152e9c4aa1ae5Roland Scheidegger#define RADEON_ST_BIT(unit) \ 8030daa7529331057ecb470efb500152e9c4aa1ae5Roland Scheidegger(unit == 0 ? RADEON_CP_VC_FRMT_ST0 : (RADEON_CP_VC_FRMT_ST1 >> 2) << (2 * unit)) 815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 8230daa7529331057ecb470efb500152e9c4aa1ae5Roland Scheidegger#define RADEON_Q_BIT(unit) \ 8330daa7529331057ecb470efb500152e9c4aa1ae5Roland Scheidegger(unit == 0 ? RADEON_CP_VC_FRMT_Q0 : (RADEON_CP_VC_FRMT_Q1 >> 2) << (2 * unit)) 845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstruct radeon_texture_env_state { 864d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden radeonTexObjPtr texobj; 874d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLenum format; 884d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLenum envMode; 895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstruct radeon_texture_state { 924d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_texture_env_state unit[RADEON_MAX_TEXTURE_UNITS]; 935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Trying to keep these relatively short as the variables are becoming 965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * extravagently long. Drop the driver name prefix off the front of 975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * everything - I think we know which driver we're in by now, and keep the 985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * prefix to 3 letters unless absolutely impossible. 995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 1005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_CMD_0 0 1025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_PP_MISC 1 1035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_PP_FOG_COLOR 2 1045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_RE_SOLID_COLOR 3 1055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_RB3D_BLENDCNTL 4 1065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_RB3D_DEPTHOFFSET 5 1075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_RB3D_DEPTHPITCH 6 1085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_RB3D_ZSTENCILCNTL 7 1095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_CMD_1 8 1105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_PP_CNTL 9 1115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_RB3D_CNTL 10 1125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_RB3D_COLOROFFSET 11 1135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_CMD_2 12 1145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_RB3D_COLORPITCH 13 1155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define CTX_STATE_SIZE 14 1165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define SET_CMD_0 0 1185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define SET_SE_CNTL 1 1195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define SET_SE_COORDFMT 2 1205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define SET_CMD_1 3 1215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define SET_SE_CNTL_STATUS 4 1225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define SET_STATE_SIZE 5 1235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIN_CMD_0 0 1255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIN_RE_LINE_PATTERN 1 1265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIN_RE_LINE_STATE 2 1275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIN_CMD_1 3 1285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIN_SE_LINE_WIDTH 4 1295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIN_STATE_SIZE 5 1305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MSK_CMD_0 0 1325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MSK_RB3D_STENCILREFMASK 1 1335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MSK_RB3D_ROPCNTL 2 1345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MSK_RB3D_PLANEMASK 3 1355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MSK_STATE_SIZE 4 1365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VPT_CMD_0 0 1385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VPT_SE_VPORT_XSCALE 1 1395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VPT_SE_VPORT_XOFFSET 2 1405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VPT_SE_VPORT_YSCALE 3 1415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VPT_SE_VPORT_YOFFSET 4 1425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VPT_SE_VPORT_ZSCALE 5 1435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VPT_SE_VPORT_ZOFFSET 6 1445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VPT_STATE_SIZE 7 1455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MSC_CMD_0 0 1475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MSC_RE_MISC 1 1485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MSC_STATE_SIZE 2 1495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX_CMD_0 0 1515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX_PP_TXFILTER 1 1525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX_PP_TXFORMAT 2 1535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX_PP_TXOFFSET 3 1545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX_PP_TXCBLEND 4 1555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX_PP_TXABLEND 5 1565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX_PP_TFACTOR 6 1575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX_CMD_1 7 1585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX_PP_BORDER_COLOR 8 1595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TEX_STATE_SIZE 9 1605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1614d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define TXR_CMD_0 0 /* rectangle textures */ 1624d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define TXR_PP_TEX_SIZE 1 /* 0x1d04, 0x1d0c for NPOT! */ 1634d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define TXR_PP_TEX_PITCH 2 /* 0x1d08, 0x1d10 for NPOT! */ 1645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TXR_STATE_SIZE 3 1655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 166247f3b3e81fffa86c50531070fab573e26ffb452Roland Scheidegger#define CUBE_CMD_0 0 167247f3b3e81fffa86c50531070fab573e26ffb452Roland Scheidegger#define CUBE_PP_CUBIC_FACES 1 168247f3b3e81fffa86c50531070fab573e26ffb452Roland Scheidegger#define CUBE_CMD_1 2 169247f3b3e81fffa86c50531070fab573e26ffb452Roland Scheidegger#define CUBE_PP_CUBIC_OFFSET_0 3 170247f3b3e81fffa86c50531070fab573e26ffb452Roland Scheidegger#define CUBE_PP_CUBIC_OFFSET_1 4 171247f3b3e81fffa86c50531070fab573e26ffb452Roland Scheidegger#define CUBE_PP_CUBIC_OFFSET_2 5 172247f3b3e81fffa86c50531070fab573e26ffb452Roland Scheidegger#define CUBE_PP_CUBIC_OFFSET_3 6 173247f3b3e81fffa86c50531070fab573e26ffb452Roland Scheidegger#define CUBE_PP_CUBIC_OFFSET_4 7 174247f3b3e81fffa86c50531070fab573e26ffb452Roland Scheidegger#define CUBE_STATE_SIZE 8 175247f3b3e81fffa86c50531070fab573e26ffb452Roland Scheidegger 1765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ZBS_CMD_0 0 1775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ZBS_SE_ZBIAS_FACTOR 1 1785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ZBS_SE_ZBIAS_CONSTANT 2 1795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define ZBS_STATE_SIZE 3 1805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TCL_CMD_0 0 1825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TCL_OUTPUT_VTXFMT 1 1835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TCL_OUTPUT_VTXSEL 2 1845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TCL_MATRIX_SELECT_0 3 1855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TCL_MATRIX_SELECT_1 4 1865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TCL_UCP_VERT_BLEND_CTL 5 1875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TCL_TEXTURE_PROC_CTL 6 1885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TCL_LIGHT_MODEL_CTL 7 1895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TCL_PER_LIGHT_CTL_0 8 1905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TCL_PER_LIGHT_CTL_1 9 1915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TCL_PER_LIGHT_CTL_2 10 1925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TCL_PER_LIGHT_CTL_3 11 1935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define TCL_STATE_SIZE 12 1945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1954d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define MTL_CMD_0 0 1964d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define MTL_EMMISSIVE_RED 1 1974d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define MTL_EMMISSIVE_GREEN 2 1984d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define MTL_EMMISSIVE_BLUE 3 1994d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define MTL_EMMISSIVE_ALPHA 4 2005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MTL_AMBIENT_RED 5 2015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MTL_AMBIENT_GREEN 6 2025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MTL_AMBIENT_BLUE 7 2035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MTL_AMBIENT_ALPHA 8 2045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MTL_DIFFUSE_RED 9 2055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MTL_DIFFUSE_GREEN 10 2065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MTL_DIFFUSE_BLUE 11 2075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MTL_DIFFUSE_ALPHA 12 2085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MTL_SPECULAR_RED 13 2095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MTL_SPECULAR_GREEN 14 2105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MTL_SPECULAR_BLUE 15 2115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MTL_SPECULAR_ALPHA 16 2125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MTL_SHININESS 17 2135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MTL_STATE_SIZE 18 2145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VTX_CMD_0 0 2165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VTX_SE_COORD_FMT 1 2175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define VTX_STATE_SIZE 2 2185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MAT_CMD_0 0 2205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MAT_ELT_0 1 2215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define MAT_STATE_SIZE 17 2225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GRD_CMD_0 0 2245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GRD_VERT_GUARD_CLIP_ADJ 1 2255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GRD_VERT_GUARD_DISCARD_ADJ 2 2265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GRD_HORZ_GUARD_CLIP_ADJ 3 2275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GRD_HORZ_GUARD_DISCARD_ADJ 4 2285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GRD_STATE_SIZE 5 2295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* position changes frequently when lighting in modelpos - separate 2315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * out to new state item? 2325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 2335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_CMD_0 0 2345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_AMBIENT_RED 1 2355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_AMBIENT_GREEN 2 2365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_AMBIENT_BLUE 3 2375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_AMBIENT_ALPHA 4 2385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_DIFFUSE_RED 5 2395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_DIFFUSE_GREEN 6 2405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_DIFFUSE_BLUE 7 2415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_DIFFUSE_ALPHA 8 2425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_SPECULAR_RED 9 2435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_SPECULAR_GREEN 10 2445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_SPECULAR_BLUE 11 2455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_SPECULAR_ALPHA 12 2465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_POSITION_X 13 2475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_POSITION_Y 14 2485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_POSITION_Z 15 2495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_POSITION_W 16 2505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_DIRECTION_X 17 2515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_DIRECTION_Y 18 2525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_DIRECTION_Z 19 2535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_DIRECTION_W 20 2545d00e131d8a264498b8d050c3eded093ee5c42f2Michel Dänzer#define LIT_ATTEN_QUADRATIC 21 2555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_ATTEN_LINEAR 22 2565d00e131d8a264498b8d050c3eded093ee5c42f2Michel Dänzer#define LIT_ATTEN_CONST 23 2575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_ATTEN_XXX 24 2585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_CMD_1 25 2595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_SPOT_DCD 26 2605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_SPOT_EXPONENT 27 2615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_SPOT_CUTOFF 28 2625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_SPECULAR_THRESH 29 2634d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define LIT_RANGE_CUTOFF 30 /* ? */ 2645d00e131d8a264498b8d050c3eded093ee5c42f2Michel Dänzer#define LIT_ATTEN_CONST_INV 31 2655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define LIT_STATE_SIZE 32 2665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Fog 2685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 2695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define FOG_CMD_0 0 2705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define FOG_R 1 2715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define FOG_C 2 2725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define FOG_D 3 2735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define FOG_PAD 4 2745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define FOG_STATE_SIZE 5 2755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* UCP 2775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 2785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define UCP_CMD_0 0 2795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define UCP_X 1 2805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define UCP_Y 2 2815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define UCP_Z 3 2825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define UCP_W 4 2835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define UCP_STATE_SIZE 5 2845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* GLT - Global ambient 2865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 2875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GLT_CMD_0 0 2885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GLT_RED 1 2895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GLT_GREEN 2 2905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GLT_BLUE 3 2915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GLT_ALPHA 4 2925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define GLT_STATE_SIZE 5 2935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* EYE 2955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 2965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define EYE_CMD_0 0 2975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define EYE_X 1 2985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define EYE_Y 2 2995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define EYE_Z 3 3005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define EYE_RESCALE_FACTOR 4 3015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define EYE_STATE_SIZE 5 3025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define SHN_CMD_0 0 3045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define SHN_SHININESS 1 3055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define SHN_STATE_SIZE 2 3065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstruct radeon_hw_state { 3084d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Head of the linked list of state atoms. */ 3094d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom atomlist; 3104d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 3114d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Hardware state, stored as cmdbuf commands: 3124d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden * -- Need to doublebuffer for 3134d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden * - eliding noop statechange loops? (except line stipple count) 3144d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 3154d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom ctx; 3164d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom set; 3174d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom lin; 3184d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom msk; 3194d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom vpt; 3204d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom tcl; 3214d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom msc; 3224d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom tex[3]; 3234d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom cube[3]; 3244d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom zbs; 3254d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom mtl; 3264d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom mat[6]; 3274d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom lit[8]; /* includes vec, scl commands */ 3284d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom ucp[6]; 3294d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom eye; /* eye pos */ 3304d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom grd; /* guard band clipping */ 3314d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom fog; 3324d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom glt; 3334d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state_atom txr[3]; /* for NPOT */ 3344d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 3354d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden int max_state_size; /* Number of bytes necessary for a full state emit. */ 3364d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLboolean is_dirty, all_dirty; 3375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 3385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstruct radeon_state { 3404d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Derived state for internal purposes: 3414d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 3424d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_colorbuffer_state color; 3434d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_depthbuffer_state depth; 3444d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_scissor_state scissor; 3454d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_stencilbuffer_state stencil; 3464d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_stipple_state stipple; 3474d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_texture_state texture; 3485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 3495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 350bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl#define GET_START(rvb) (rmesa->radeonScreen->gart_buffer_offset + \ 3515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (rvb)->address - rmesa->dma.buf0_address + \ 3525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul (rvb)->start) 3535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstruct radeon_dri_mirror { 3554d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden __DRIcontextPrivate *context; /* DRI context */ 3564d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden __DRIscreenPrivate *screen; /* DRI screen */ 3573beaff1e3cf227c493badfc55a69381c778b2ff7Ian Romanick 3583beaff1e3cf227c493badfc55a69381c778b2ff7Ian Romanick /** 3593beaff1e3cf227c493badfc55a69381c778b2ff7Ian Romanick * DRI drawable bound to this context for drawing. 3603beaff1e3cf227c493badfc55a69381c778b2ff7Ian Romanick */ 3614d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden __DRIdrawablePrivate *drawable; 3623beaff1e3cf227c493badfc55a69381c778b2ff7Ian Romanick 3633beaff1e3cf227c493badfc55a69381c778b2ff7Ian Romanick /** 3643beaff1e3cf227c493badfc55a69381c778b2ff7Ian Romanick * DRI drawable bound to this context for reading. 3653beaff1e3cf227c493badfc55a69381c778b2ff7Ian Romanick */ 3664d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden __DRIdrawablePrivate *readable; 3675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3684d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden drm_context_t hwContext; 3694d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden drm_hw_lock_t *hwLock; 3704d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden int fd; 3714d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden int drmMinor; 3725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 3735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3744d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define RADEON_CMD_BUF_SZ (8*1024) 3755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstruct radeon_store { 3774d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint statenr; 3784d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint primnr; 3794d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden char cmd_buf[RADEON_CMD_BUF_SZ]; 3804d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden int cmd_used; 3814d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden int elts_start; 3825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 3835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* radeon_tcl.c 3855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 3865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstruct radeon_tcl_info { 3874d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint vertex_format; 3884d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint hw_primitive; 3894d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 3904d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Temporary for cases where incoming vertex data is incompatible 3914d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden * with maos code. 3924d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 3934d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLvector4f ObjClean; 3944d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 3954d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_dma_region *aos_components[8]; 3964d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint nr_aos_components; 3974d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 3984d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint *Elts; 3994d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 4004d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_dma_region indexed_verts; 4014d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_dma_region obj; 4024d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_dma_region rgba; 4034d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_dma_region spec; 4044d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_dma_region fog; 4054d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_dma_region tex[RADEON_MAX_TEXTURE_UNITS]; 4064d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_dma_region norm; 4075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 4085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* radeon_swtcl.c 4105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 4115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstruct radeon_swtcl_info { 4124d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint RenderIndex; 4134d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint vertex_size; 4144d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint vertex_format; 4158a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt 4164d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX]; 4174d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint vertex_attr_count; 4188a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt 4194d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLubyte *verts; 4205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4214d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Fallback rasterization functions 4224d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 4234d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden radeon_point_func draw_point; 4244d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden radeon_line_func draw_line; 4254d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden radeon_tri_func draw_tri; 4265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4274d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint hw_primitive; 4284d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLenum render_primitive; 4294d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint numverts; 4305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4318a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt /** 4328a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt * Offset of the 4UB color data within a hardware (swtcl) vertex. 4338a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt */ 4344d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint coloroffset; 4358a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt 4368a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt /** 4378a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt * Offset of the 3UB specular color data within a hardware (swtcl) vertex. 4388a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt */ 4394d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint specoffset; 4408a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt 4414d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLboolean needproj; 4428a1df968627de01d04f3d692fd81108ba6492c18Eric Anholt 4434d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_dma_region indexed_verts; 4445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 4455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 44830daa7529331057ecb470efb500152e9c4aa1ae5Roland Scheidegger/* A maximum total of 20 elements per vertex: 3 floats for position, 3 44930daa7529331057ecb470efb500152e9c4aa1ae5Roland Scheidegger * floats for normal, 4 floats for color, 4 bytes for secondary color, 45030daa7529331057ecb470efb500152e9c4aa1ae5Roland Scheidegger * 3 floats for each texture unit (9 floats total). 45130daa7529331057ecb470efb500152e9c4aa1ae5Roland Scheidegger * 45230daa7529331057ecb470efb500152e9c4aa1ae5Roland Scheidegger * The position data is never actually stored here, so 3 elements could be 45330daa7529331057ecb470efb500152e9c4aa1ae5Roland Scheidegger * trimmed out of the buffer. This number is only valid for vtxfmt! 45430daa7529331057ecb470efb500152e9c4aa1ae5Roland Scheidegger */ 45530daa7529331057ecb470efb500152e9c4aa1ae5Roland Scheidegger#define RADEON_MAX_VERTEX_SIZE 20 45630daa7529331057ecb470efb500152e9c4aa1ae5Roland Scheidegger 4575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstruct radeon_context { 4584d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLcontext *glCtx; /* Mesa context */ 4594d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 4604d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Driver and hardware state management 4614d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 4624d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_hw_state hw; 4634d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_state state; 4644d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 4654d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Texture object bookkeeping 4664d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 4674d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden unsigned nr_heaps; 4684d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden driTexHeap *texture_heaps[RADEON_NR_TEX_HEAPS]; 4694d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden driTextureObject swapped; 4704d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden int texture_depth; 4714d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden float initialMaxAnisotropy; 4724d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 4734d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Rasterization and vertex state: 4744d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 4754d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint TclFallback; 4764d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint Fallback; 4774d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint NewGLState; 4784d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden DECLARE_RENDERINPUTS(tnl_index_bitset); /* index of bits for last tnl_install_attrs */ 4794d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 4804d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Vertex buffers 4814d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 4824d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_ioctl ioctl; 4834d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_dma dma; 4844d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_store store; 4854d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* A full state emit as of the first state emit in the main store, in case 4864d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden * the context is lost. 4874d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 4884d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_store backup_store; 4894d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 4904d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Page flipping 4914d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 4924d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint doPageFlip; 4934d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 4944d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Busy waiting 4954d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 4964d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint do_usleeps; 4974d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint do_irqs; 4984d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint irqsEmitted; 4994d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden drm_radeon_irq_wait_t iw; 5004d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 5014d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Drawable, cliprect and scissor information 5024d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 5034d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint numClipRects; /* Cliprects for the draw buffer */ 5044d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden drm_clip_rect_t *pClipRects; 5054d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden unsigned int lastStamp; 5064d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLboolean lost_context; 5074d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLboolean save_on_next_emit; 5084d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden radeonScreenPtr radeonScreen; /* Screen private DRI data */ 5094d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden drm_radeon_sarea_t *sarea; /* Private SAREA data */ 5104d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 5114d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* TCL stuff 5124d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 5134d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLmatrix TexGenMatrix[RADEON_MAX_TEXTURE_UNITS]; 5144d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLboolean recheck_texgen[RADEON_MAX_TEXTURE_UNITS]; 5154d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLboolean TexGenNeedNormals[RADEON_MAX_TEXTURE_UNITS]; 5164d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint TexGenEnabled; 5174d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint NeedTexMatrix; 5184d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint TexMatColSwap; 5194d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLmatrix tmpmat[RADEON_MAX_TEXTURE_UNITS]; 5204d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint last_ReallyEnabled; 5214d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 5224d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* VBI 5234d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 5244d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden int64_t swap_ust; 5254d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden int64_t swap_missed_ust; 5264d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 5274d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint swap_count; 5284d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint swap_missed_count; 5294d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 5304d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* radeon_tcl.c 5314d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 5324d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_tcl_info tcl; 5334d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 5344d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* radeon_swtcl.c 5354d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 5364d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_swtcl_info swtcl; 5374d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 5384d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Mirrors of some DRI state 5394d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 5404d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden struct radeon_dri_mirror dri; 5414d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 5424d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Configuration cache 5434d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 5444d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden driOptionCache optionCache; 5454d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 5464d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLboolean using_hyperz; 5474d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLboolean texmicrotile; 5484d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 5494d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden /* Performance counters 5504d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden */ 5514d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint boxes; /* Draw performance boxes */ 5524d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint hardwareWentIdle; 5534d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint c_clears; 5544d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint c_drawWaits; 5554d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint c_textureSwaps; 5564d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint c_textureBytes; 5574d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden GLuint c_vertexBuffers; 5585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 5595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_CONTEXT(ctx) ((radeonContextPtr)(ctx->DriverCtx)) 5615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_OLD_PACKETS 1 5645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5654d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFaddenextern void radeonDestroyContext(__DRIcontextPrivate * driContextPriv); 5664d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFaddenextern GLboolean radeonCreateContext(const __GLcontextModes * glVisual, 5674d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden __DRIcontextPrivate * driContextPriv, 5685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul void *sharedContextPrivate); 5694d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFaddenextern void radeonSwapBuffers(__DRIdrawablePrivate * dPriv); 570f2ad1b60c0da11283b399008f491792790cea294Brian Paulextern void radeonCopySubBuffer(__DRIdrawablePrivate * dPriv, 571f2ad1b60c0da11283b399008f491792790cea294Brian Paul int x, int y, int w, int h); 5724d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFaddenextern GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv, 5734d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden __DRIdrawablePrivate * driDrawPriv, 5744d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden __DRIdrawablePrivate * driReadPriv); 5754d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFaddenextern GLboolean radeonUnbindContext(__DRIcontextPrivate * driContextPriv); 5765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* ================================================================ 5785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Debugging: 5795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 5805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define DO_DEBUG 1 5815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#if DO_DEBUG 5835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulextern int RADEON_DEBUG; 5845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#else 5855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define RADEON_DEBUG 0 5865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#endif 5875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5884d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define DEBUG_TEXTURE 0x0001 5894d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define DEBUG_STATE 0x0002 5904d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define DEBUG_IOCTL 0x0004 5914d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define DEBUG_PRIMS 0x0008 5924d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define DEBUG_VERTS 0x0010 5934d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define DEBUG_FALLBACKS 0x0020 5944d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define DEBUG_VFMT 0x0040 5954d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define DEBUG_CODEGEN 0x0080 5964d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define DEBUG_VERBOSE 0x0100 5974d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define DEBUG_DRI 0x0200 5984d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define DEBUG_DMA 0x0400 5994d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define DEBUG_SANITY 0x0800 6004d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#define DEBUG_SYNC 0x1000 6014d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden 6024d5d4e1f97bf8d5c55ef817f7a28f920accc151bOliver McFadden#endif /* __RADEON_CONTEXT_H__ */ 603