1# Pentium IV HyperThreading possible unit masks
2#
3name:branch_retired type:bitmask default:0x0c
4	0x01 branch not-taken predicted
5	0x02 branch not-taken mispredicted
6	0x04 branch taken predicted
7	0x08 branch taken mispredicted
8name:mispred_branch_retired type:bitmask default:0x01
9	0x01 retired instruction is non-bogus
10# FIXME: 0 count nothing, 0xff count more than 0x01, docs says it's a bitmask:
11# something wrong in documentation ?
12name:bpu_fetch_request type:bitmask default:0x01
13	0x01 trace cache lookup miss
14name:itlb_reference type:bitmask default:0x07
15	0x01 ITLB hit
16	0x02 ITLB miss
17	0x04 uncacheable ITLB hit
18name:memory_cancel type:bitmask default:0x08
19	0x04 replayed because no store request buffer available
20	0x08 conflicts due to 64k aliasing
21name:memory_complete type:bitmask default:0x03
22	0x01 load split completed, excluding UC/WC loads
23	0x02 any split stores completed
24	0x04 uncacheable load split completed
25	0x08 uncacheable store split complete
26name:load_port_replay type:mandatory default:0x02
27	0x02 split load
28name:store_port_replay type:mandatory default:0x02
29	0x02 split store
30name:mob_load_replay type:bitmask default:0x3a
31	0x02 replay cause: unknown store address
32	0x08 replay cause: unknown store data
33	0x10 replay cause: partial overlap between load and store
34	0x20 replay cause: mismatched low 4 bits between load and store addr
35name:bsq_cache_reference type:bitmask default:0x073f
36	0x01 read 2nd level cache hit shared
37	0x02 read 2nd level cache hit exclusive
38	0x04 read 2nd level cache hit modified
39	0x08 read 3rd level cache hit shared
40	0x10 read 3rd level cache hit exclusive
41	0x20 read 3rd level cache hit modified
42	0x100 read 2nd level cache miss
43	0x200 read 3rd level cache miss
44	0x400 writeback lookup from DAC misses 2nd level cache
45name:x87_assist type:bitmask default:0x1f
46	0x01 handle FP stack underflow
47	0x02 handle FP stack overflow
48	0x04 handle x87 output overflow
49	0x08 handle x87 output underflow
50	0x10 handle x87 input assist
51name:machine_clear type:bitmask default:0x01
52	0x01 count a portion of cycles the machine is cleared for any cause
53	0x04 count each time the machine is cleared due to memory ordering issues
54	0x40 count each time the machine is cleared due to self modifying code
55name:global_power_events type:mandatory default:0x01
56	0x01 mandatory
57name:tc_ms_xfer type:mandatory default:0x01
58	0x01 count TC to MS transfers
59name:uop_queue_writes type:bitmask default:0x07
60	0x01 count uops written to queue from TC build mode
61	0x02 count uops written to queue from TC deliver mode
62	0x04 count uops written to queue from microcode ROM
63name:instr_retired type:bitmask default:0x01
64	0x01 count non-bogus instructions which are not tagged
65	0x02 count non-bogus instructions which are tagged
66	0x04 count bogus instructions which are not tagged
67	0x08 count bogus instructions which are tagged
68name:uops_retired type:bitmask default:0x01
69	0x01 count marked uops which are non-bogus
70	0x02 count marked uops which are bogus
71name:uop_type type:bitmask default:0x02
72	0x02 count uops which are load operations
73	0x04 count uops which are store operations
74name:branch_type type:bitmask default:0x1f
75	0x01 count unconditional jumps
76	0x02 count conditional jumps
77	0x04 count call branches
78	0x08 count return branches
79	0x10 count indirect jumps
80