1// Copyright 2013, ARM Limited
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are met:
6//
7//   * Redistributions of source code must retain the above copyright notice,
8//     this list of conditions and the following disclaimer.
9//   * Redistributions in binary form must reproduce the above copyright notice,
10//     this list of conditions and the following disclaimer in the documentation
11//     and/or other materials provided with the distribution.
12//   * Neither the name of ARM Limited nor the names of its contributors may be
13//     used to endorse or promote products derived from this software without
14//     specific prior written permission.
15//
16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27#include <stdlib.h>
28#include "cctest.h"
29
30#include "a64/decoder-a64.h"
31#include "a64/disasm-a64.h"
32
33#define TEST(name)  TEST_(FUZZ_##name)
34
35
36namespace vixl {
37
38
39TEST(decoder) {
40  // Feed noise into the decoder to check that it doesn't crash.
41  // 43 million = ~1% of the instruction space.
42  static const int instruction_count = 43 * 1024 * 1024;
43
44  uint16_t seed[3] = {1, 2, 3};
45  seed48(seed);
46
47  Decoder decoder;
48  Instruction buffer[kInstructionSize];
49
50  for (int i = 0; i < instruction_count; i++) {
51    uint32_t instr = mrand48();
52    buffer->SetInstructionBits(instr);
53    decoder.Decode(buffer);
54  }
55}
56
57TEST(disasm) {
58  // Feed noise into the disassembler to check that it doesn't crash.
59  // 9 million = ~0.2% of the instruction space.
60  static const int instruction_count = 9 * 1024 * 1024;
61
62  uint16_t seed[3] = {42, 43, 44};
63  seed48(seed);
64
65  Decoder decoder;
66  Disassembler disasm;
67  Instruction buffer[kInstructionSize];
68
69  decoder.AppendVisitor(&disasm);
70  for (int i = 0; i < instruction_count; i++) {
71    uint32_t instr = mrand48();
72    buffer->SetInstructionBits(instr);
73    decoder.Decode(buffer);
74  }
75}
76
77#if 0
78// These tests are commented out as they take a long time to run, causing the
79// test script to timeout. After enabling them, they are best run individually
80// using cctest:
81//
82//     cctest_sim FUZZ_decoder_pedantic
83//     cctest_sim FUZZ_disasm_pedantic
84//
85// or cctest_sim_g for debug builds.
86
87TEST(decoder_pedantic) {
88  // Test the entire instruction space.
89  Decoder decoder;
90  Instruction buffer[kInstructionSize];
91
92  for (uint64_t i = 0; i < (UINT64_C(1) << 32); i++) {
93    if ((i & 0xffffff) == 0) {
94      fprintf(stderr, "0x%08" PRIx32 "\n", static_cast<uint32_t>(i));
95    }
96    buffer->SetInstructionBits(static_cast<uint32_t>(i));
97    decoder.Decode(buffer);
98  }
99}
100
101TEST(disasm_pedantic) {
102  // Test the entire instruction space. Warning: takes about 30 minutes on a
103  // high-end CPU.
104  Decoder decoder;
105  PrintDisassembler disasm(stdout);
106  Instruction buffer[kInstructionSize];
107
108  decoder.AppendVisitor(&disasm);
109  for (uint64_t i = 0; i < (UINT64_C(1) << 32); i++) {
110    if ((i & 0xffff) == 0) {
111      fprintf(stderr, "0x%08" PRIx32 "\n", static_cast<uint32_t>(i));
112    }
113    buffer->SetInstructionBits(static_cast<uint32_t>(i));
114    decoder.Decode(buffer);
115  }
116}
117#endif
118
119}   // namespace vixl
120