1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPI_MSM_MDP_H_
20#define _UAPI_MSM_MDP_H_
21#include <linux/types.h>
22#include <linux/fb.h>
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#define MSMFB_IOCTL_MAGIC 'm'
25#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int)
26#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int)
27#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int)
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int)
30#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor)
31#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap)
32#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data)
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs)
35#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs)
36#define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135,   struct mdp_overlay)
37#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int)
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137,   struct msmfb_overlay_data)
40#define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY
41#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138,   struct mdp_page_protection)
42#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139,   struct mdp_page_protection)
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140,   struct mdp_overlay)
45#define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int)
46#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142,   struct msmfb_overlay_blt)
47#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int)
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144,   struct mdp_histogram_start_req)
50#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int)
51#define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int)
52#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147,   struct msmfb_overlay_3d)
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148,   struct msmfb_mixer_info_req)
55#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149,   struct msmfb_overlay_data)
56#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150)
57#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151)
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152)
60#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153,   struct msmfb_data)
61#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154,   struct msmfb_data)
62#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155)
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp)
65#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int)
66#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int)
67#define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync)
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69#define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163)
70#define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164,   struct mdp_display_commit)
71#define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata)
72#define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata)
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74#define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167,   unsigned int)
75#define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int)
76#define MSMFB_OVERLAY_PREPARE _IOWR(MSMFB_IOCTL_MAGIC, 169,   struct mdp_overlay_list)
77#define MSMFB_LPM_ENABLE _IOWR(MSMFB_IOCTL_MAGIC, 170, unsigned int)
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79#define FB_TYPE_3D_PANEL 0x10101010
80#define MDP_IMGTYPE2_START 0x10000
81#define MSMFB_DRIVER_VERSION 0xF9E8D701
82#define MDSS_GET_MAJOR(rev) ((rev) >> 28)
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84#define MDSS_GET_MINOR(rev) (((rev) >> 16) & 0xFFF)
85#define MDSS_GET_STEP(rev) ((rev) & 0xFFFF)
86#define MDSS_GET_MAJOR_MINOR(rev) ((rev) >> 16)
87#define IS_MDSS_MAJOR_MINOR_SAME(rev1, rev2)   (MDSS_GET_MAJOR_MINOR((rev1)) == MDSS_GET_MAJOR_MINOR((rev2)))
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89#define MDSS_MDP_REV(major, minor, step)   ((((major) & 0x000F) << 28) |   (((minor) & 0x0FFF) << 16) |   ((step) & 0xFFFF))
90#define MDSS_MDP_HW_REV_100 MDSS_MDP_REV(1, 0, 0)
91#define MDSS_MDP_HW_REV_101 MDSS_MDP_REV(1, 1, 0)
92#define MDSS_MDP_HW_REV_101_1 MDSS_MDP_REV(1, 1, 1)
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94#define MDSS_MDP_HW_REV_101_2 MDSS_MDP_REV(1, 1, 2)
95#define MDSS_MDP_HW_REV_102 MDSS_MDP_REV(1, 2, 0)
96#define MDSS_MDP_HW_REV_102_1 MDSS_MDP_REV(1, 2, 1)
97#define MDSS_MDP_HW_REV_103 MDSS_MDP_REV(1, 3, 0)
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99#define MDSS_MDP_HW_REV_103_1 MDSS_MDP_REV(1, 3, 1)
100#define MDSS_MDP_HW_REV_105 MDSS_MDP_REV(1, 5, 0)
101#define MDSS_MDP_HW_REV_106 MDSS_MDP_REV(1, 6, 0)
102#define MDSS_MDP_HW_REV_107 MDSS_MDP_REV(1, 7, 0)
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104#define MDSS_MDP_HW_REV_108 MDSS_MDP_REV(1, 8, 0)
105#define MDSS_MDP_HW_REV_200 MDSS_MDP_REV(2, 0, 0)
106enum {
107 NOTIFY_UPDATE_START,
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109 NOTIFY_UPDATE_STOP,
110 NOTIFY_UPDATE_POWER_OFF,
111};
112enum {
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114 NOTIFY_TYPE_NO_UPDATE,
115 NOTIFY_TYPE_SUSPEND,
116 NOTIFY_TYPE_UPDATE,
117 NOTIFY_TYPE_BL_UPDATE,
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119};
120enum {
121 MDP_RGB_565,
122 MDP_XRGB_8888,
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124 MDP_Y_CBCR_H2V2,
125 MDP_Y_CBCR_H2V2_ADRENO,
126 MDP_ARGB_8888,
127 MDP_RGB_888,
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129 MDP_Y_CRCB_H2V2,
130 MDP_YCRYCB_H2V1,
131 MDP_CBYCRY_H2V1,
132 MDP_Y_CRCB_H2V1,
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134 MDP_Y_CBCR_H2V1,
135 MDP_Y_CRCB_H1V2,
136 MDP_Y_CBCR_H1V2,
137 MDP_RGBA_8888,
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139 MDP_BGRA_8888,
140 MDP_RGBX_8888,
141 MDP_Y_CRCB_H2V2_TILE,
142 MDP_Y_CBCR_H2V2_TILE,
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144 MDP_Y_CR_CB_H2V2,
145 MDP_Y_CR_CB_GH2V2,
146 MDP_Y_CB_CR_H2V2,
147 MDP_Y_CRCB_H1V1,
148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149 MDP_Y_CBCR_H1V1,
150 MDP_YCRCB_H1V1,
151 MDP_YCBCR_H1V1,
152 MDP_BGR_565,
153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154 MDP_BGR_888,
155 MDP_Y_CBCR_H2V2_VENUS,
156 MDP_BGRX_8888,
157 MDP_RGBA_8888_TILE,
158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159 MDP_ARGB_8888_TILE,
160 MDP_ABGR_8888_TILE,
161 MDP_BGRA_8888_TILE,
162 MDP_RGBX_8888_TILE,
163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164 MDP_XRGB_8888_TILE,
165 MDP_XBGR_8888_TILE,
166 MDP_BGRX_8888_TILE,
167 MDP_YCBYCR_H2V1,
168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169 MDP_RGB_565_TILE,
170 MDP_BGR_565_TILE,
171 MDP_IMGTYPE_LIMIT,
172 MDP_RGB_BORDERFILL,
173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174 MDP_FB_FORMAT = MDP_IMGTYPE2_START,
175 MDP_IMGTYPE_LIMIT2
176};
177enum {
178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179 PMEM_IMG,
180 FB_IMG,
181};
182enum {
183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184 HSIC_HUE = 0,
185 HSIC_SAT,
186 HSIC_INT,
187 HSIC_CON,
188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
189 NUM_HSIC_PARAM,
190};
191#define MDSS_MDP_ROT_ONLY 0x80
192#define MDSS_MDP_RIGHT_MIXER 0x100
193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
194#define MDSS_MDP_DUAL_PIPE 0x200
195#define MDP_ROT_NOP 0
196#define MDP_FLIP_LR 0x1
197#define MDP_FLIP_UD 0x2
198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
199#define MDP_ROT_90 0x4
200#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR)
201#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR)
202#define MDP_DITHER 0x8
203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
204#define MDP_BLUR 0x10
205#define MDP_BLEND_FG_PREMULT 0x20000
206#define MDP_IS_FG 0x40000
207#define MDP_SOLID_FILL 0x00000020
208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
209#define MDP_VPU_PIPE 0x00000040
210#define MDP_DEINTERLACE 0x80000000
211#define MDP_SHARPENING 0x40000000
212#define MDP_NO_DMA_BARRIER_START 0x20000000
213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
214#define MDP_NO_DMA_BARRIER_END 0x10000000
215#define MDP_NO_BLIT 0x08000000
216#define MDP_BLIT_WITH_DMA_BARRIERS 0x000
217#define MDP_BLIT_WITH_NO_DMA_BARRIERS   (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END)
218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
219#define MDP_BLIT_SRC_GEM 0x04000000
220#define MDP_BLIT_DST_GEM 0x02000000
221#define MDP_BLIT_NON_CACHED 0x01000000
222#define MDP_OV_PIPE_SHARE 0x00800000
223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
224#define MDP_DEINTERLACE_ODD 0x00400000
225#define MDP_OV_PLAY_NOWAIT 0x00200000
226#define MDP_SOURCE_ROTATED_90 0x00100000
227#define MDP_OVERLAY_PP_CFG_EN 0x00080000
228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
229#define MDP_BACKEND_COMPOSITION 0x00040000
230#define MDP_BORDERFILL_SUPPORTED 0x00010000
231#define MDP_SECURE_OVERLAY_SESSION 0x00008000
232#define MDP_SECURE_DISPLAY_OVERLAY_SESSION 0x00002000
233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
234#define MDP_OV_PIPE_FORCE_DMA 0x00004000
235#define MDP_MEMORY_ID_TYPE_FB 0x00001000
236#define MDP_BWC_EN 0x00000400
237#define MDP_DECIMATION_EN 0x00000800
238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
239#define MDP_TRANSP_NOP 0xffffffff
240#define MDP_ALPHA_NOP 0xff
241#define MDP_FB_PAGE_PROTECTION_NONCACHED (0)
242#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1)
243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
244#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2)
245#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3)
246#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4)
247#define MDP_FB_PAGE_PROTECTION_INVALID (5)
248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
249#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5)
250struct mdp_rect {
251 uint32_t x;
252 uint32_t y;
253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
254 uint32_t w;
255 uint32_t h;
256};
257struct mdp_img {
258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
259 uint32_t width;
260 uint32_t height;
261 uint32_t format;
262 uint32_t offset;
263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
264 int memory_id;
265 uint32_t priv;
266};
267#define MDP_CCS_RGB2YUV 0
268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
269#define MDP_CCS_YUV2RGB 1
270#define MDP_CCS_SIZE 9
271#define MDP_BV_SIZE 3
272struct mdp_ccs {
273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
274 int direction;
275 uint16_t ccs[MDP_CCS_SIZE];
276 uint16_t bv[MDP_BV_SIZE];
277};
278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
279struct mdp_csc {
280 int id;
281 uint32_t csc_mv[9];
282 uint32_t csc_pre_bv[3];
283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
284 uint32_t csc_post_bv[3];
285 uint32_t csc_pre_lv[6];
286 uint32_t csc_post_lv[6];
287};
288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
289#define MDP_BLIT_REQ_VERSION 2
290struct color {
291 uint32_t r;
292 uint32_t g;
293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
294 uint32_t b;
295 uint32_t alpha;
296};
297struct mdp_blit_req {
298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
299 struct mdp_img src;
300 struct mdp_img dst;
301 struct mdp_rect src_rect;
302 struct mdp_rect dst_rect;
303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
304 struct color const_color;
305 uint32_t alpha;
306 uint32_t transp_mask;
307 uint32_t flags;
308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
309 int sharpening_strength;
310};
311struct mdp_blit_req_list {
312 uint32_t count;
313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
314 struct mdp_blit_req req[];
315};
316#define MSMFB_DATA_VERSION 2
317struct msmfb_data {
318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
319 uint32_t offset;
320 int memory_id;
321 int id;
322 uint32_t flags;
323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
324 uint32_t priv;
325 uint32_t iova;
326};
327#define MSMFB_NEW_REQUEST -1
328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
329struct msmfb_overlay_data {
330 uint32_t id;
331 struct msmfb_data data;
332 uint32_t version_key;
333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
334 struct msmfb_data plane1_data;
335 struct msmfb_data plane2_data;
336 struct msmfb_data dst_data;
337};
338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
339struct msmfb_img {
340 uint32_t width;
341 uint32_t height;
342 uint32_t format;
343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
344};
345#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1
346struct msmfb_writeback_data {
347 struct msmfb_data buf_info;
348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
349 struct msmfb_img img;
350};
351#define MDP_PP_OPS_ENABLE 0x1
352#define MDP_PP_OPS_READ 0x2
353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
354#define MDP_PP_OPS_WRITE 0x4
355#define MDP_PP_OPS_DISABLE 0x8
356#define MDP_PP_IGC_FLAG_ROM0 0x10
357#define MDP_PP_IGC_FLAG_ROM1 0x20
358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
359#define MDP_PP_PA_HUE_ENABLE 0x10
360#define MDP_PP_PA_SAT_ENABLE 0x20
361#define MDP_PP_PA_VAL_ENABLE 0x40
362#define MDP_PP_PA_CONT_ENABLE 0x80
363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
364#define MDP_PP_PA_SIX_ZONE_ENABLE 0x100
365#define MDP_PP_PA_SKIN_ENABLE 0x200
366#define MDP_PP_PA_SKY_ENABLE 0x400
367#define MDP_PP_PA_FOL_ENABLE 0x800
368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
369#define MDP_PP_PA_HUE_MASK 0x1000
370#define MDP_PP_PA_SAT_MASK 0x2000
371#define MDP_PP_PA_VAL_MASK 0x4000
372#define MDP_PP_PA_CONT_MASK 0x8000
373/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
374#define MDP_PP_PA_SIX_ZONE_HUE_MASK 0x10000
375#define MDP_PP_PA_SIX_ZONE_SAT_MASK 0x20000
376#define MDP_PP_PA_SIX_ZONE_VAL_MASK 0x40000
377#define MDP_PP_PA_MEM_COL_SKIN_MASK 0x80000
378/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
379#define MDP_PP_PA_MEM_COL_SKY_MASK 0x100000
380#define MDP_PP_PA_MEM_COL_FOL_MASK 0x200000
381#define MDP_PP_PA_MEM_PROTECT_EN 0x400000
382#define MDP_PP_PA_SAT_ZERO_EXP_EN 0x800000
383/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
384#define MDSS_PP_DSPP_CFG 0x000
385#define MDSS_PP_SSPP_CFG 0x100
386#define MDSS_PP_LM_CFG 0x200
387#define MDSS_PP_WB_CFG 0x300
388/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
389#define MDSS_PP_ARG_MASK 0x3C00
390#define MDSS_PP_ARG_NUM 4
391#define MDSS_PP_ARG_SHIFT 10
392#define MDSS_PP_LOCATION_MASK 0x0300
393/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
394#define MDSS_PP_LOGICAL_MASK 0x00FF
395#define MDSS_PP_ADD_ARG(var, arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg))))
396#define PP_ARG(x, var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x))))
397#define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK)
398/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
399#define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK)
400struct mdp_qseed_cfg {
401 uint32_t table_num;
402 uint32_t ops;
403/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
404 uint32_t len;
405 uint32_t *data;
406};
407struct mdp_sharp_cfg {
408/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
409 uint32_t flags;
410 uint32_t strength;
411 uint32_t edge_thr;
412 uint32_t smooth_thr;
413/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
414 uint32_t noise_thr;
415};
416struct mdp_qseed_cfg_data {
417 uint32_t block;
418/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
419 struct mdp_qseed_cfg qseed_data;
420};
421#define MDP_OVERLAY_PP_CSC_CFG 0x1
422#define MDP_OVERLAY_PP_QSEED_CFG 0x2
423/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
424#define MDP_OVERLAY_PP_PA_CFG 0x4
425#define MDP_OVERLAY_PP_IGC_CFG 0x8
426#define MDP_OVERLAY_PP_SHARP_CFG 0x10
427#define MDP_OVERLAY_PP_HIST_CFG 0x20
428/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
429#define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40
430#define MDP_OVERLAY_PP_PA_V2_CFG 0x80
431#define MDP_CSC_FLAG_ENABLE 0x1
432#define MDP_CSC_FLAG_YUV_IN 0x2
433/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
434#define MDP_CSC_FLAG_YUV_OUT 0x4
435struct mdp_csc_cfg {
436 uint32_t flags;
437 uint32_t csc_mv[9];
438/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
439 uint32_t csc_pre_bv[3];
440 uint32_t csc_post_bv[3];
441 uint32_t csc_pre_lv[6];
442 uint32_t csc_post_lv[6];
443/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
444};
445struct mdp_csc_cfg_data {
446 uint32_t block;
447 struct mdp_csc_cfg csc_data;
448/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
449};
450struct mdp_pa_cfg {
451 uint32_t flags;
452 uint32_t hue_adj;
453/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
454 uint32_t sat_adj;
455 uint32_t val_adj;
456 uint32_t cont_adj;
457};
458/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
459struct mdp_pa_mem_col_cfg {
460 uint32_t color_adjust_p0;
461 uint32_t color_adjust_p1;
462 uint32_t hue_region;
463/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
464 uint32_t sat_region;
465 uint32_t val_region;
466};
467#define MDP_SIX_ZONE_LUT_SIZE 384
468/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
469struct mdp_pa_v2_data {
470 uint32_t flags;
471 uint32_t global_hue_adj;
472 uint32_t global_sat_adj;
473/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
474 uint32_t global_val_adj;
475 uint32_t global_cont_adj;
476 struct mdp_pa_mem_col_cfg skin_cfg;
477 struct mdp_pa_mem_col_cfg sky_cfg;
478/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
479 struct mdp_pa_mem_col_cfg fol_cfg;
480 uint32_t six_zone_len;
481 uint32_t six_zone_thresh;
482 uint32_t *six_zone_curve_p0;
483/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
484 uint32_t *six_zone_curve_p1;
485};
486struct mdp_igc_lut_data {
487 uint32_t block;
488/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
489 uint32_t len, ops;
490 uint32_t *c0_c1_data;
491 uint32_t *c2_data;
492};
493/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
494struct mdp_histogram_cfg {
495 uint32_t ops;
496 uint32_t block;
497 uint8_t frame_cnt;
498/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
499 uint8_t bit_mask;
500 uint16_t num_bins;
501};
502struct mdp_hist_lut_data {
503/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
504 uint32_t block;
505 uint32_t ops;
506 uint32_t len;
507 uint32_t *data;
508/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
509};
510struct mdp_overlay_pp_params {
511 uint32_t config_ops;
512 struct mdp_csc_cfg csc_cfg;
513/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
514 struct mdp_qseed_cfg qseed_cfg[2];
515 struct mdp_pa_cfg pa_cfg;
516 struct mdp_pa_v2_data pa_v2_cfg;
517 struct mdp_igc_lut_data igc_cfg;
518/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
519 struct mdp_sharp_cfg sharp_cfg;
520 struct mdp_histogram_cfg hist_cfg;
521 struct mdp_hist_lut_data hist_lut_cfg;
522};
523/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
524enum mdss_mdp_blend_op {
525 BLEND_OP_NOT_DEFINED = 0,
526 BLEND_OP_OPAQUE,
527 BLEND_OP_PREMULTIPLIED,
528/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
529 BLEND_OP_COVERAGE,
530 BLEND_OP_MAX,
531};
532#define MAX_PLANES 4
533/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
534struct mdp_scale_data {
535 uint8_t enable_pxl_ext;
536 int init_phase_x[MAX_PLANES];
537 int phase_step_x[MAX_PLANES];
538/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
539 int init_phase_y[MAX_PLANES];
540 int phase_step_y[MAX_PLANES];
541 int num_ext_pxls_left[MAX_PLANES];
542 int num_ext_pxls_right[MAX_PLANES];
543/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
544 int num_ext_pxls_top[MAX_PLANES];
545 int num_ext_pxls_btm[MAX_PLANES];
546 int left_ftch[MAX_PLANES];
547 int left_rpt[MAX_PLANES];
548/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
549 int right_ftch[MAX_PLANES];
550 int right_rpt[MAX_PLANES];
551 int top_rpt[MAX_PLANES];
552 int btm_rpt[MAX_PLANES];
553/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
554 int top_ftch[MAX_PLANES];
555 int btm_ftch[MAX_PLANES];
556 uint32_t roi_w[MAX_PLANES];
557};
558/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
559enum mdp_overlay_pipe_type {
560 PIPE_TYPE_AUTO = 0,
561 PIPE_TYPE_VIG,
562 PIPE_TYPE_RGB,
563/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
564 PIPE_TYPE_DMA,
565 PIPE_TYPE_CURSOR,
566 PIPE_TYPE_MAX,
567};
568/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
569struct mdp_overlay {
570 struct msmfb_img src;
571 struct mdp_rect src_rect;
572 struct mdp_rect dst_rect;
573/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
574 uint32_t z_order;
575 uint32_t is_fg;
576 uint32_t alpha;
577 uint32_t blend_op;
578/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
579 uint32_t transp_mask;
580 uint32_t flags;
581 uint32_t pipe_type;
582 uint32_t id;
583/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
584 uint8_t priority;
585 uint32_t user_data[6];
586 uint32_t bg_color;
587 uint8_t horz_deci;
588/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
589 uint8_t vert_deci;
590 struct mdp_overlay_pp_params overlay_pp_cfg;
591 struct mdp_scale_data scale;
592};
593/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
594struct msmfb_overlay_3d {
595 uint32_t is_3d;
596 uint32_t width;
597 uint32_t height;
598/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
599};
600struct msmfb_overlay_blt {
601 uint32_t enable;
602 uint32_t offset;
603/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
604 uint32_t width;
605 uint32_t height;
606 uint32_t bpp;
607};
608/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
609struct mdp_histogram {
610 uint32_t frame_cnt;
611 uint32_t bin_cnt;
612 uint32_t *r;
613/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
614 uint32_t *g;
615 uint32_t *b;
616};
617#define MISR_CRC_BATCH_SIZE 32
618/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
619enum {
620 DISPLAY_MISR_EDP,
621 DISPLAY_MISR_DSI0,
622 DISPLAY_MISR_DSI1,
623/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
624 DISPLAY_MISR_HDMI,
625 DISPLAY_MISR_LCDC,
626 DISPLAY_MISR_MDP,
627 DISPLAY_MISR_ATV,
628/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
629 DISPLAY_MISR_DSI_CMD,
630 DISPLAY_MISR_MAX
631};
632enum {
633/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
634 MISR_OP_NONE,
635 MISR_OP_SFM,
636 MISR_OP_MFM,
637 MISR_OP_BM,
638/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
639 MISR_OP_MAX
640};
641struct mdp_misr {
642 uint32_t block_id;
643/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
644 uint32_t frame_count;
645 uint32_t crc_op_mode;
646 uint32_t crc_value[MISR_CRC_BATCH_SIZE];
647};
648/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
649enum {
650 MDP_BLOCK_RESERVED = 0,
651 MDP_BLOCK_OVERLAY_0,
652 MDP_BLOCK_OVERLAY_1,
653/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
654 MDP_BLOCK_VG_1,
655 MDP_BLOCK_VG_2,
656 MDP_BLOCK_RGB_1,
657 MDP_BLOCK_RGB_2,
658/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
659 MDP_BLOCK_DMA_P,
660 MDP_BLOCK_DMA_S,
661 MDP_BLOCK_DMA_E,
662 MDP_BLOCK_OVERLAY_2,
663/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
664 MDP_LOGICAL_BLOCK_DISP_0 = 0x10,
665 MDP_LOGICAL_BLOCK_DISP_1,
666 MDP_LOGICAL_BLOCK_DISP_2,
667 MDP_BLOCK_MAX,
668/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
669};
670struct mdp_histogram_start_req {
671 uint32_t block;
672 uint8_t frame_cnt;
673/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
674 uint8_t bit_mask;
675 uint16_t num_bins;
676};
677struct mdp_histogram_data {
678/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
679 uint32_t block;
680 uint32_t bin_cnt;
681 uint32_t *c0;
682 uint32_t *c1;
683/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
684 uint32_t *c2;
685 uint32_t *extra_info;
686};
687struct mdp_pcc_coeff {
688/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
689 uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
690};
691struct mdp_pcc_cfg_data {
692 uint32_t block;
693/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
694 uint32_t ops;
695 struct mdp_pcc_coeff r, g, b;
696};
697#define MDP_GAMUT_TABLE_NUM 8
698/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
699enum {
700 mdp_lut_igc,
701 mdp_lut_pgc,
702 mdp_lut_hist,
703/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
704 mdp_lut_max,
705};
706struct mdp_ar_gc_lut_data {
707 uint32_t x_start;
708/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
709 uint32_t slope;
710 uint32_t offset;
711};
712struct mdp_pgc_lut_data {
713/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
714 uint32_t block;
715 uint32_t flags;
716 uint8_t num_r_stages;
717 uint8_t num_g_stages;
718/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
719 uint8_t num_b_stages;
720 struct mdp_ar_gc_lut_data *r_data;
721 struct mdp_ar_gc_lut_data *g_data;
722 struct mdp_ar_gc_lut_data *b_data;
723/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
724};
725struct mdp_lut_cfg_data {
726 uint32_t lut_type;
727 union {
728/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
729 struct mdp_igc_lut_data igc_lut_data;
730 struct mdp_pgc_lut_data pgc_lut_data;
731 struct mdp_hist_lut_data hist_lut_data;
732 } data;
733/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
734};
735struct mdp_bl_scale_data {
736 uint32_t min_lvl;
737 uint32_t scale;
738/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
739};
740struct mdp_pa_cfg_data {
741 uint32_t block;
742 struct mdp_pa_cfg pa_data;
743/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
744};
745struct mdp_pa_v2_cfg_data {
746 uint32_t block;
747 struct mdp_pa_v2_data pa_v2_data;
748/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
749};
750struct mdp_dither_cfg_data {
751 uint32_t block;
752 uint32_t flags;
753/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
754 uint32_t g_y_depth;
755 uint32_t r_cr_depth;
756 uint32_t b_cb_depth;
757};
758/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
759struct mdp_gamut_cfg_data {
760 uint32_t block;
761 uint32_t flags;
762 uint32_t gamut_first;
763/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
764 uint32_t tbl_size[MDP_GAMUT_TABLE_NUM];
765 uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM];
766 uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM];
767 uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM];
768/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
769};
770struct mdp_calib_config_data {
771 uint32_t ops;
772 uint32_t addr;
773/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
774 uint32_t data;
775};
776struct mdp_calib_config_buffer {
777 uint32_t ops;
778/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
779 uint32_t size;
780 uint32_t *buffer;
781};
782struct mdp_calib_dcm_state {
783/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
784 uint32_t ops;
785 uint32_t dcm_state;
786};
787enum {
788/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
789 DCM_UNINIT,
790 DCM_UNBLANK,
791 DCM_ENTER,
792 DCM_EXIT,
793/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
794 DCM_BLANK,
795 DTM_ENTER,
796 DTM_EXIT,
797};
798/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
799#define MDSS_PP_SPLIT_LEFT_ONLY 0x10000000
800#define MDSS_PP_SPLIT_RIGHT_ONLY 0x20000000
801#define MDSS_PP_SPLIT_MASK 0x30000000
802#define MDSS_MAX_BL_BRIGHTNESS 255
803/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
804#define AD_BL_LIN_LEN 256
805#define AD_BL_ATT_LUT_LEN 33
806#define MDSS_AD_MODE_AUTO_BL 0x0
807#define MDSS_AD_MODE_AUTO_STR 0x1
808/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
809#define MDSS_AD_MODE_TARG_STR 0x3
810#define MDSS_AD_MODE_MAN_STR 0x7
811#define MDSS_AD_MODE_CALIB 0xF
812#define MDP_PP_AD_INIT 0x10
813/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
814#define MDP_PP_AD_CFG 0x20
815struct mdss_ad_init {
816 uint32_t asym_lut[33];
817 uint32_t color_corr_lut[33];
818/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
819 uint8_t i_control[2];
820 uint16_t black_lvl;
821 uint16_t white_lvl;
822 uint8_t var;
823/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
824 uint8_t limit_ampl;
825 uint8_t i_dither;
826 uint8_t slope_max;
827 uint8_t slope_min;
828/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
829 uint8_t dither_ctl;
830 uint8_t format;
831 uint8_t auto_size;
832 uint16_t frame_w;
833/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
834 uint16_t frame_h;
835 uint8_t logo_v;
836 uint8_t logo_h;
837 uint32_t alpha;
838/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
839 uint32_t alpha_base;
840 uint32_t bl_lin_len;
841 uint32_t bl_att_len;
842 uint32_t *bl_lin;
843/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
844 uint32_t *bl_lin_inv;
845 uint32_t *bl_att_lut;
846};
847#define MDSS_AD_BL_CTRL_MODE_EN 1
848/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
849#define MDSS_AD_BL_CTRL_MODE_DIS 0
850struct mdss_ad_cfg {
851 uint32_t mode;
852 uint32_t al_calib_lut[33];
853/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
854 uint16_t backlight_min;
855 uint16_t backlight_max;
856 uint16_t backlight_scale;
857 uint16_t amb_light_min;
858/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
859 uint16_t filter[2];
860 uint16_t calib[4];
861 uint8_t strength_limit;
862 uint8_t t_filter_recursion;
863/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
864 uint16_t stab_itr;
865 uint32_t bl_ctrl_mode;
866};
867struct mdss_ad_init_cfg {
868/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
869 uint32_t ops;
870 union {
871 struct mdss_ad_init init;
872 struct mdss_ad_cfg cfg;
873/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
874 } params;
875};
876struct mdss_ad_input {
877 uint32_t mode;
878/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
879 union {
880 uint32_t amb_light;
881 uint32_t strength;
882 uint32_t calib_bl;
883/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
884 } in;
885 uint32_t output;
886};
887#define MDSS_CALIB_MODE_BL 0x1
888/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
889struct mdss_calib_cfg {
890 uint32_t ops;
891 uint32_t calib_mask;
892};
893/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
894enum {
895 mdp_op_pcc_cfg,
896 mdp_op_csc_cfg,
897 mdp_op_lut_cfg,
898/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
899 mdp_op_qseed_cfg,
900 mdp_bl_scale_cfg,
901 mdp_op_pa_cfg,
902 mdp_op_pa_v2_cfg,
903/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
904 mdp_op_dither_cfg,
905 mdp_op_gamut_cfg,
906 mdp_op_calib_cfg,
907 mdp_op_ad_cfg,
908/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
909 mdp_op_ad_input,
910 mdp_op_calib_mode,
911 mdp_op_calib_buffer,
912 mdp_op_calib_dcm_state,
913/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
914 mdp_op_max,
915};
916enum {
917 WB_FORMAT_NV12,
918/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
919 WB_FORMAT_RGB_565,
920 WB_FORMAT_RGB_888,
921 WB_FORMAT_xRGB_8888,
922 WB_FORMAT_ARGB_8888,
923/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
924 WB_FORMAT_BGRA_8888,
925 WB_FORMAT_BGRX_8888,
926 WB_FORMAT_ARGB_8888_INPUT_ALPHA
927};
928/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
929struct msmfb_mdp_pp {
930 uint32_t op;
931 union {
932 struct mdp_pcc_cfg_data pcc_cfg_data;
933/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
934 struct mdp_csc_cfg_data csc_cfg_data;
935 struct mdp_lut_cfg_data lut_cfg_data;
936 struct mdp_qseed_cfg_data qseed_cfg_data;
937 struct mdp_bl_scale_data bl_scale_data;
938/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
939 struct mdp_pa_cfg_data pa_cfg_data;
940 struct mdp_pa_v2_cfg_data pa_v2_cfg_data;
941 struct mdp_dither_cfg_data dither_cfg_data;
942 struct mdp_gamut_cfg_data gamut_cfg_data;
943/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
944 struct mdp_calib_config_data calib_cfg;
945 struct mdss_ad_init_cfg ad_init_cfg;
946 struct mdss_calib_cfg mdss_calib_cfg;
947 struct mdss_ad_input ad_input;
948/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
949 struct mdp_calib_config_buffer calib_buffer;
950 struct mdp_calib_dcm_state calib_dcm;
951 } data;
952};
953/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
954#define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1
955enum {
956 metadata_op_none,
957 metadata_op_base_blend,
958/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
959 metadata_op_frame_rate,
960 metadata_op_vic,
961 metadata_op_wb_format,
962 metadata_op_wb_secure,
963/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
964 metadata_op_get_caps,
965 metadata_op_crc,
966 metadata_op_get_ion_fd,
967 metadata_op_max
968/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
969};
970struct mdp_blend_cfg {
971 uint32_t is_premultiplied;
972};
973/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
974struct mdp_mixer_cfg {
975 uint32_t writeback_format;
976 uint32_t alpha;
977};
978/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
979struct mdss_hw_caps {
980 uint32_t mdp_rev;
981 uint8_t rgb_pipes;
982 uint8_t vig_pipes;
983/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
984 uint8_t dma_pipes;
985 uint8_t max_smp_cnt;
986 uint8_t smp_per_pipe;
987 uint32_t features;
988/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
989};
990struct msmfb_metadata {
991 uint32_t op;
992 uint32_t flags;
993/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
994 union {
995 struct mdp_misr misr_request;
996 struct mdp_blend_cfg blend_cfg;
997 struct mdp_mixer_cfg mixer_cfg;
998/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
999 uint32_t panel_frame_rate;
1000 uint32_t video_info_code;
1001 struct mdss_hw_caps caps;
1002 uint8_t secure_en;
1003/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1004 int fbmem_ionfd;
1005 } data;
1006};
1007#define MDP_MAX_FENCE_FD 32
1008/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1009#define MDP_BUF_SYNC_FLAG_WAIT 1
1010#define MDP_BUF_SYNC_FLAG_RETIRE_FENCE 0x10
1011struct mdp_buf_sync {
1012 uint32_t flags;
1013/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1014 uint32_t acq_fen_fd_cnt;
1015 uint32_t session_id;
1016 int *acq_fen_fd;
1017 int *rel_fen_fd;
1018/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1019 int *retire_fen_fd;
1020};
1021struct mdp_async_blit_req_list {
1022 struct mdp_buf_sync sync;
1023/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1024 uint32_t count;
1025 struct mdp_blit_req req[];
1026};
1027#define MDP_DISPLAY_COMMIT_OVERLAY 1
1028/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1029struct mdp_display_commit {
1030 uint32_t flags;
1031 uint32_t wait_for_finish;
1032 struct fb_var_screeninfo var;
1033/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1034 struct mdp_rect l_roi;
1035 struct mdp_rect r_roi;
1036};
1037struct mdp_overlay_list {
1038/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1039 uint32_t num_overlays;
1040 struct mdp_overlay **overlay_list;
1041 uint32_t flags;
1042 uint32_t processed_overlays;
1043/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1044};
1045struct mdp_page_protection {
1046 uint32_t page_protection;
1047};
1048/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1049struct mdp_mixer_info {
1050 int pndx;
1051 int pnum;
1052 int ptype;
1053/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1054 int mixer_num;
1055 int z_order;
1056};
1057#define MAX_PIPE_PER_MIXER 7
1058/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1059struct msmfb_mixer_info_req {
1060 int mixer_num;
1061 int cnt;
1062 struct mdp_mixer_info info[MAX_PIPE_PER_MIXER];
1063/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1064};
1065enum {
1066 DISPLAY_SUBSYSTEM_ID,
1067 ROTATOR_SUBSYSTEM_ID,
1068/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1069};
1070enum {
1071 MDP_IOMMU_DOMAIN_CP,
1072 MDP_IOMMU_DOMAIN_NS,
1073/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1074};
1075enum {
1076 MDP_WRITEBACK_MIRROR_OFF,
1077 MDP_WRITEBACK_MIRROR_ON,
1078/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1079 MDP_WRITEBACK_MIRROR_PAUSE,
1080 MDP_WRITEBACK_MIRROR_RESUME,
1081};
1082#endif
1083/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1084