1/* include/linux/msm_mdp.h 2 * 3 * Copyright (C) 2007 Google Incorporated 4 * Copyright (c) 2012-2013 The Linux Foundation. All rights reserved. 5 * 6 * This software is licensed under the terms of the GNU General Public 7 * License version 2, as published by the Free Software Foundation, and 8 * may be copied, distributed, and modified under those terms. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15#ifndef _MSM_MDP_H_ 16#define _MSM_MDP_H_ 17 18#include <linux/types.h> 19#include <linux/fb.h> 20 21#define MSMFB_IOCTL_MAGIC 'm' 22#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int) 23#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int) 24#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int) 25#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int) 26#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor) 27#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap) 28#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data) 29/* new ioctls's for set/get ccs matrix */ 30#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs) 31#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs) 32#define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, \ 33 struct mdp_overlay) 34#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int) 35 36#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, \ 37 struct msmfb_overlay_data) 38#define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY 39 40#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, \ 41 struct mdp_page_protection) 42#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, \ 43 struct mdp_page_protection) 44#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, \ 45 struct mdp_overlay) 46#define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int) 47#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, \ 48 struct msmfb_overlay_blt) 49#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int) 50#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, \ 51 struct mdp_histogram_start_req) 52#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int) 53#define MSMFB_NOTIFY_UPDATE _IOW(MSMFB_IOCTL_MAGIC, 146, unsigned int) 54 55#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, \ 56 struct msmfb_overlay_3d) 57 58#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, \ 59 struct msmfb_mixer_info_req) 60#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, \ 61 struct msmfb_overlay_data) 62#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150) 63#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151) 64#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152) 65#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, \ 66 struct msmfb_data) 67#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, \ 68 struct msmfb_data) 69#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155) 70#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp) 71#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int) 72#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int) 73#define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync) 74#define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164, \ 75 struct mdp_display_commit) 76#define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata) 77 78#define FB_TYPE_3D_PANEL 0x10101010 79#define MDP_IMGTYPE2_START 0x10000 80#define MSMFB_DRIVER_VERSION 0xF9E8D701 81 82enum { 83 NOTIFY_UPDATE_START, 84 NOTIFY_UPDATE_STOP, 85}; 86 87enum { 88 MDP_RGB_565, /* RGB 565 planer */ 89 MDP_XRGB_8888, /* RGB 888 padded */ 90 MDP_Y_CBCR_H2V2, /* Y and CbCr, pseudo planer w/ Cb is in MSB */ 91 MDP_Y_CBCR_H2V2_ADRENO, 92 MDP_ARGB_8888, /* ARGB 888 */ 93 MDP_RGB_888, /* RGB 888 planer */ 94 MDP_Y_CRCB_H2V2, /* Y and CrCb, pseudo planer w/ Cr is in MSB */ 95 MDP_YCRYCB_H2V1, /* YCrYCb interleave */ 96 MDP_Y_CRCB_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ 97 MDP_Y_CBCR_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ 98 MDP_Y_CRCB_H1V2, 99 MDP_Y_CBCR_H1V2, 100 MDP_RGBA_8888, /* ARGB 888 */ 101 MDP_BGRA_8888, /* ABGR 888 */ 102 MDP_RGBX_8888, /* RGBX 888 */ 103 MDP_Y_CRCB_H2V2_TILE, /* Y and CrCb, pseudo planer tile */ 104 MDP_Y_CBCR_H2V2_TILE, /* Y and CbCr, pseudo planer tile */ 105 MDP_Y_CR_CB_H2V2, /* Y, Cr and Cb, planar */ 106 MDP_Y_CR_CB_GH2V2, /* Y, Cr and Cb, planar aligned to Android YV12 */ 107 MDP_Y_CB_CR_H2V2, /* Y, Cb and Cr, planar */ 108 MDP_Y_CRCB_H1V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ 109 MDP_Y_CBCR_H1V1, /* Y and CbCr, pseduo planer w/ Cb is in MSB */ 110 MDP_YCRCB_H1V1, /* YCrCb interleave */ 111 MDP_YCBCR_H1V1, /* YCbCr interleave */ 112 MDP_BGR_565, /* BGR 565 planer */ 113 MDP_IMGTYPE_LIMIT, 114 MDP_RGB_BORDERFILL, /* border fill pipe */ 115 MDP_FB_FORMAT = MDP_IMGTYPE2_START, /* framebuffer format */ 116 MDP_IMGTYPE_LIMIT2 /* Non valid image type after this enum */ 117}; 118 119enum { 120 PMEM_IMG, 121 FB_IMG, 122}; 123 124enum { 125 HSIC_HUE = 0, 126 HSIC_SAT, 127 HSIC_INT, 128 HSIC_CON, 129 NUM_HSIC_PARAM, 130}; 131 132#define MDSS_MDP_ROT_ONLY 0x80 133#define MDSS_MDP_RIGHT_MIXER 0x100 134 135/* mdp_blit_req flag values */ 136#define MDP_ROT_NOP 0 137#define MDP_FLIP_LR 0x1 138#define MDP_FLIP_UD 0x2 139#define MDP_ROT_90 0x4 140#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR) 141#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR) 142#define MDP_DITHER 0x8 143#define MDP_BLUR 0x10 144#define MDP_BLEND_FG_PREMULT 0x20000 145#define MDP_DEINTERLACE 0x80000000 146#define MDP_SHARPENING 0x40000000 147#define MDP_NO_DMA_BARRIER_START 0x20000000 148#define MDP_NO_DMA_BARRIER_END 0x10000000 149#define MDP_NO_BLIT 0x08000000 150#define MDP_BLIT_WITH_DMA_BARRIERS 0x000 151#define MDP_BLIT_WITH_NO_DMA_BARRIERS \ 152 (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) 153#define MDP_BLIT_SRC_GEM 0x04000000 154#define MDP_BLIT_DST_GEM 0x02000000 155#define MDP_BLIT_NON_CACHED 0x01000000 156#define MDP_OV_PIPE_SHARE 0x00800000 157#define MDP_DEINTERLACE_ODD 0x00400000 158#define MDP_OV_PLAY_NOWAIT 0x00200000 159#define MDP_SOURCE_ROTATED_90 0x00100000 160#define MDP_OVERLAY_PP_CFG_EN 0x00080000 161#define MDP_BACKEND_COMPOSITION 0x00040000 162#define MDP_BORDERFILL_SUPPORTED 0x00010000 163#define MDP_SECURE_OVERLAY_SESSION 0x00008000 164#define MDP_MEMORY_ID_TYPE_FB 0x00001000 165 166#define MDP_TRANSP_NOP 0xffffffff 167#define MDP_ALPHA_NOP 0xff 168 169#define MDP_FB_PAGE_PROTECTION_NONCACHED (0) 170#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) 171#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) 172#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) 173#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4) 174/* Sentinel: Don't use! */ 175#define MDP_FB_PAGE_PROTECTION_INVALID (5) 176/* Count of the number of MDP_FB_PAGE_PROTECTION_... values. */ 177#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) 178 179struct mdp_rect { 180 uint32_t x; 181 uint32_t y; 182 uint32_t w; 183 uint32_t h; 184}; 185 186struct mdp_img { 187 uint32_t width; 188 uint32_t height; 189 uint32_t format; 190 uint32_t offset; 191 int memory_id; /* the file descriptor */ 192 uint32_t priv; 193}; 194 195/* 196 * {3x3} + {3} ccs matrix 197 */ 198 199#define MDP_CCS_RGB2YUV 0 200#define MDP_CCS_YUV2RGB 1 201 202#define MDP_CCS_SIZE 9 203#define MDP_BV_SIZE 3 204 205struct mdp_ccs { 206 int direction; /* MDP_CCS_RGB2YUV or YUV2RGB */ 207 uint16_t ccs[MDP_CCS_SIZE]; /* 3x3 color coefficients */ 208 uint16_t bv[MDP_BV_SIZE]; /* 1x3 bias vector */ 209}; 210 211struct mdp_csc { 212 int id; 213 uint32_t csc_mv[9]; 214 uint32_t csc_pre_bv[3]; 215 uint32_t csc_post_bv[3]; 216 uint32_t csc_pre_lv[6]; 217 uint32_t csc_post_lv[6]; 218}; 219 220/* The version of the mdp_blit_req structure so that 221 * user applications can selectively decide which functionality 222 * to include 223 */ 224 225#define MDP_BLIT_REQ_VERSION 2 226 227struct mdp_blit_req { 228 struct mdp_img src; 229 struct mdp_img dst; 230 struct mdp_rect src_rect; 231 struct mdp_rect dst_rect; 232 uint32_t alpha; 233 uint32_t transp_mask; 234 uint32_t flags; 235 int sharpening_strength; /* -127 <--> 127, default 64 */ 236}; 237 238struct mdp_blit_req_list { 239 uint32_t count; 240 struct mdp_blit_req req[]; 241}; 242 243#define MSMFB_DATA_VERSION 2 244 245struct msmfb_data { 246 uint32_t offset; 247 int memory_id; 248 int id; 249 uint32_t flags; 250 uint32_t priv; 251 uint32_t iova; 252}; 253 254#define MSMFB_NEW_REQUEST -1 255 256struct msmfb_overlay_data { 257 uint32_t id; 258 struct msmfb_data data; 259 uint32_t version_key; 260 struct msmfb_data plane1_data; 261 struct msmfb_data plane2_data; 262 struct msmfb_data dst_data; 263}; 264 265struct msmfb_img { 266 uint32_t width; 267 uint32_t height; 268 uint32_t format; 269}; 270 271#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1 272struct msmfb_writeback_data { 273 struct msmfb_data buf_info; 274 struct msmfb_img img; 275}; 276 277#define MDP_PP_OPS_READ 0x2 278#define MDP_PP_OPS_WRITE 0x4 279 280struct mdp_qseed_cfg { 281 uint32_t table_num; 282 uint32_t ops; 283 uint32_t len; 284 uint32_t *data; 285}; 286 287struct mdp_qseed_cfg_data { 288 uint32_t block; 289 struct mdp_qseed_cfg qseed_data; 290}; 291 292#define MDP_OVERLAY_PP_CSC_CFG 0x1 293#define MDP_OVERLAY_PP_QSEED_CFG 0x2 294 295#define MDP_CSC_FLAG_ENABLE 0x1 296#define MDP_CSC_FLAG_YUV_IN 0x2 297#define MDP_CSC_FLAG_YUV_OUT 0x4 298 299struct mdp_csc_cfg { 300 /* flags for enable CSC, toggling RGB,YUV input/output */ 301 uint32_t flags; 302 uint32_t csc_mv[9]; 303 uint32_t csc_pre_bv[3]; 304 uint32_t csc_post_bv[3]; 305 uint32_t csc_pre_lv[6]; 306 uint32_t csc_post_lv[6]; 307}; 308 309struct mdp_csc_cfg_data { 310 uint32_t block; 311 struct mdp_csc_cfg csc_data; 312}; 313 314struct mdp_overlay_pp_params { 315 uint32_t config_ops; 316 struct mdp_csc_cfg csc_cfg; 317 struct mdp_qseed_cfg qseed_cfg[2]; 318}; 319 320struct mdp_overlay { 321 struct msmfb_img src; 322 struct mdp_rect src_rect; 323 struct mdp_rect dst_rect; 324 uint32_t z_order; /* stage number */ 325 uint32_t is_fg; /* control alpha & transp */ 326 uint32_t alpha; 327 uint32_t transp_mask; 328 uint32_t flags; 329 uint32_t id; 330 uint32_t user_data[8]; 331 struct mdp_overlay_pp_params overlay_pp_cfg; 332}; 333 334struct msmfb_overlay_3d { 335 uint32_t is_3d; 336 uint32_t width; 337 uint32_t height; 338}; 339 340 341struct msmfb_overlay_blt { 342 uint32_t enable; 343 uint32_t offset; 344 uint32_t width; 345 uint32_t height; 346 uint32_t bpp; 347}; 348 349struct mdp_histogram { 350 uint32_t frame_cnt; 351 uint32_t bin_cnt; 352 uint32_t *r; 353 uint32_t *g; 354 uint32_t *b; 355}; 356 357 358/* 359 360 mdp_block_type defines the identifiers for pipes in MDP 4.3 and up 361 362 MDP_BLOCK_RESERVED is provided for backward compatibility and is 363 deprecated. It corresponds to DMA_P. So MDP_BLOCK_DMA_P should be used 364 instead. 365 366 MDP_LOGICAL_BLOCK_DISP_0 identifies the display pipe which fb0 uses, 367 same for others. 368 369*/ 370 371enum { 372 MDP_BLOCK_RESERVED = 0, 373 MDP_BLOCK_OVERLAY_0, 374 MDP_BLOCK_OVERLAY_1, 375 MDP_BLOCK_VG_1, 376 MDP_BLOCK_VG_2, 377 MDP_BLOCK_RGB_1, 378 MDP_BLOCK_RGB_2, 379 MDP_BLOCK_DMA_P, 380 MDP_BLOCK_DMA_S, 381 MDP_BLOCK_DMA_E, 382 MDP_BLOCK_OVERLAY_2, 383 MDP_LOGICAL_BLOCK_DISP_0 = 0x1000, 384 MDP_LOGICAL_BLOCK_DISP_1, 385 MDP_LOGICAL_BLOCK_DISP_2, 386 MDP_BLOCK_MAX, 387}; 388 389/* 390 * mdp_histogram_start_req is used to provide the parameters for 391 * histogram start request 392 */ 393 394struct mdp_histogram_start_req { 395 uint32_t block; 396 uint8_t frame_cnt; 397 uint8_t bit_mask; 398 uint8_t num_bins; 399}; 400 401/* 402 * mdp_histogram_data is used to return the histogram data, once 403 * the histogram is done/stopped/cance 404 */ 405 406struct mdp_histogram_data { 407 uint32_t block; 408 uint8_t bin_cnt; 409 uint32_t *c0; 410 uint32_t *c1; 411 uint32_t *c2; 412 uint32_t *extra_info; 413}; 414 415struct mdp_pcc_coeff { 416 uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1; 417}; 418 419struct mdp_pcc_cfg_data { 420 uint32_t block; 421 uint32_t ops; 422 struct mdp_pcc_coeff r, g, b; 423}; 424 425enum { 426 mdp_lut_igc, 427 mdp_lut_pgc, 428 mdp_lut_hist, 429 mdp_lut_max, 430}; 431 432struct mdp_igc_lut_data { 433 uint32_t block; 434 uint32_t len, ops; 435 uint32_t *c0_c1_data; 436 uint32_t *c2_data; 437}; 438 439struct mdp_ar_gc_lut_data { 440 uint32_t x_start; 441 uint32_t slope; 442 uint32_t offset; 443}; 444 445struct mdp_pgc_lut_data { 446 uint32_t block; 447 uint32_t flags; 448 uint8_t num_r_stages; 449 uint8_t num_g_stages; 450 uint8_t num_b_stages; 451 struct mdp_ar_gc_lut_data *r_data; 452 struct mdp_ar_gc_lut_data *g_data; 453 struct mdp_ar_gc_lut_data *b_data; 454}; 455 456 457struct mdp_hist_lut_data { 458 uint32_t block; 459 uint32_t ops; 460 uint32_t len; 461 uint32_t *data; 462}; 463 464struct mdp_lut_cfg_data { 465 uint32_t lut_type; 466 union { 467 struct mdp_igc_lut_data igc_lut_data; 468 struct mdp_pgc_lut_data pgc_lut_data; 469 struct mdp_hist_lut_data hist_lut_data; 470 } data; 471}; 472 473struct mdp_bl_scale_data { 474 uint32_t min_lvl; 475 uint32_t scale; 476}; 477 478enum { 479 mdp_op_pcc_cfg, 480 mdp_op_csc_cfg, 481 mdp_op_lut_cfg, 482 mdp_op_qseed_cfg, 483 mdp_bl_scale_cfg, 484 mdp_op_max, 485}; 486 487struct msmfb_mdp_pp { 488 uint32_t op; 489 union { 490 struct mdp_pcc_cfg_data pcc_cfg_data; 491 struct mdp_csc_cfg_data csc_cfg_data; 492 struct mdp_lut_cfg_data lut_cfg_data; 493 struct mdp_qseed_cfg_data qseed_cfg_data; 494 struct mdp_bl_scale_data bl_scale_data; 495 } data; 496}; 497 498enum { 499 metadata_op_none, 500 metadata_op_base_blend, 501 metadata_op_frame_rate, 502 metadata_op_max 503}; 504 505struct mdp_blend_cfg { 506 uint32_t is_premultiplied; 507}; 508 509struct msmfb_metadata { 510 uint32_t op; 511 uint32_t flags; 512 union { 513 struct mdp_blend_cfg blend_cfg; 514 uint32_t panel_frame_rate; 515 } data; 516}; 517 518#define MDP_MAX_FENCE_FD 10 519#define MDP_BUF_SYNC_FLAG_WAIT 1 520 521struct mdp_buf_sync { 522 uint32_t flags; 523 uint32_t acq_fen_fd_cnt; 524 int *acq_fen_fd; 525 int *rel_fen_fd; 526}; 527 528struct mdp_buf_fence { 529 uint32_t flags; 530 uint32_t acq_fen_fd_cnt; 531 int acq_fen_fd[MDP_MAX_FENCE_FD]; 532 int rel_fen_fd[MDP_MAX_FENCE_FD]; 533}; 534 535#define MDP_DISPLAY_COMMIT_OVERLAY 0x00000001 536 537struct mdp_display_commit { 538 uint32_t flags; 539 uint32_t wait_for_finish; 540 struct fb_var_screeninfo var; 541}; 542 543struct mdp_page_protection { 544 uint32_t page_protection; 545}; 546 547 548struct mdp_mixer_info { 549 int pndx; 550 int pnum; 551 int ptype; 552 int mixer_num; 553 int z_order; 554}; 555 556#define MAX_PIPE_PER_MIXER 4 557 558struct msmfb_mixer_info_req { 559 int mixer_num; 560 int cnt; 561 struct mdp_mixer_info info[MAX_PIPE_PER_MIXER]; 562}; 563 564enum { 565 DISPLAY_SUBSYSTEM_ID, 566 ROTATOR_SUBSYSTEM_ID, 567}; 568 569#ifdef __KERNEL__ 570 571/* get the framebuffer physical address information */ 572int get_fb_phys_info(unsigned long *start, unsigned long *len, int fb_num, 573 int subsys_id); 574struct fb_info *msm_fb_get_writeback_fb(void); 575int msm_fb_writeback_init(struct fb_info *info); 576int msm_fb_writeback_start(struct fb_info *info); 577int msm_fb_writeback_queue_buffer(struct fb_info *info, 578 struct msmfb_data *data); 579int msm_fb_writeback_dequeue_buffer(struct fb_info *info, 580 struct msmfb_data *data); 581int msm_fb_writeback_stop(struct fb_info *info); 582int msm_fb_writeback_terminate(struct fb_info *info); 583#endif 584 585#endif /*_MSM_MDP_H_*/ 586