e4ded41ae2648973d5fed8c6bafaebf917ea7d17 |
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05-Aug-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix movw in x86_64 assembler. Change-Id: Ibceb03fd57adea09643aa77a9399be196fa14709
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f12feb8e0e857f2832545b3f28d31bad5a9d3903 |
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17-Jul-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Stack overflow checks and NPE checks for optimizing. Change-Id: I59e97448bf29778769b79b51ee4ea43f43493d96
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1a43dd78d054dbad8d7af9ba4829ea2f1cb70b53 |
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17-Jul-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Add write barriers to optimizing compiler. Change-Id: I43a40954757f51d49782e70bc28f7c314d6dbe17
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96f89a290eb67d7bf4b1636798fa28df14309cc7 |
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11-Jul-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Add assembly operations with constants in optimizing compiler. Change-Id: I5bcc35ab50d4457186effef5592a75d7f4e5b65f
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c380191f3048db2a3796d65db8e5d5a5e7b08c65 |
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08-Jul-2014 |
Serguei Katkov <serguei.i.katkov@intel.com> |
x86_64: Enable fp-reg promotion Patch introduces 4 register XMM12-15 available for promotion of fp virtual registers. Change-Id: I3f89ad07fc8ae98b70f550eada09be7b693ffb67 Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com> Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
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412f10cfed002ab617c78f2621d68446ca4dd8bd |
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19-Jun-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Support longs in the register allocator for x86_64. Change-Id: I7fb6dfb761bc5cf9e5705682032855a0a70ca867
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5408b6ba5d73ac0890683ebd7ddb4151a8ac2721 |
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04-Jun-2014 |
avignate <aleksey.v.ignatenko@intel.com> |
x86_64: Fix issue in JNI compiler This patch fixed 64 bit conversion issue in Immediate. The issue is inside type conversion of Immediate: explicit Immediate(int64_t value) : value_(value) {}. In case of the following example we'll have unexpected value in Immediate: size_t t = 1; Immediate(-t) will contain value 4294967295 because by conversion rules -t is first transformed to unsigned and then transformed to 64bit (size64_t). The issue can be fixed by using long value as a parameter of Immediate constructor. Added tests for BuildFrame, RemoveFrame, IncreaseFrameSize and DecreaseFrameSize to assembler_x86_64_test. Change-Id: I0652bac83e4266fd4153bc6a4e9d3aae7cc4cb6f Signed-off-by: avignate <aleksey.v.ignatenko@intel.com> Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
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ecb2f9ba57b08ceac4204ddd6a0a88a0524f8741 |
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13-Jun-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Enable the register allocator on x86_64. Also fix an x86_64 assembler bug for movl. Change-Id: I8d17c68cd35ddd1d8df159f2d6173a013a7c3347
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ffddfdf6fec0b9d98a692e27242eecb15af5ead2 |
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03-Jun-2014 |
Tim Murray <timmurray@google.com> |
DO NOT MERGE Merge ART from AOSP to lmp-preview-dev. Change-Id: I0f578733a4b8756fd780d4a052ad69b746f687a9
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cf4035a4c41ccfcc3e89a0cee25f5218a11b0705 |
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29-May-2014 |
Andreas Gampe <agampe@google.com> |
ART: Use StackReference in Quick Stack Frame The method reference at the bottom of a quick frame is a stack reference and not a native pointer. This is important for 64b architectures, where the notions do not coincide. Change key methods to have StackReference<mirror::ArtMethod>* parameter instead of mirror::ArtMethod**. Make changes to invoke stubs for 64b archs, change the frame setup for JNI code (both generic JNI and compilers), tie up loose ends. Tested on x86 and x86-64 with host tests. On x86-64, tests succeed with jni compiler activated. x86-64 QCG was not tested. Tested on ARM32 with device tests. Fix ARM64 not saving x19 (used for wSUSPEND) on upcalls. Tested on ARM64 in interpreter-only + generic-jni mode. Fix ARM64 JNI Compiler to work with the CL. Tested on ARM64 in interpreter-only + jni compiler. Change-Id: I77931a0cbadd04d163b3eb8d6f6a6f8740578f13
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eb8167a4f4d27fce0530f6724ab8032610cd146b |
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08-May-2014 |
Mathieu Chartier <mathieuc@google.com> |
Add Handle/HandleScope and delete SirtRef. Delete SirtRef and replaced it with Handle. Handles are value types which wrap around StackReference*. Renamed StackIndirectReferenceTable to HandleScope. Added a scoped handle wrapper which wraps around an Object** and restores it in its destructor. Renamed Handle::get -> Get. Bug: 8473721 Change-Id: Idbfebd4f35af629f0f43931b7c5184b334822c7a
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5a4fa82ab42af6e728a60e3261963aa243c3e2cd |
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01-Apr-2014 |
Andreas Gampe <agampe@google.com> |
x86_64 Assembler Test Infrastructure, fix x86_64 assembler Some infrastructure to do real assembler testing. Need to extend to other assemblers, and a lot more tests. Fix some of the cases of the x86_64 assembler. Change-Id: I15b5f3a094af469130db68a95a66602cf30d8fc4
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fba52f1b4bf753790c1d98265c4b0fabb54c7536 |
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15-Apr-2014 |
Vladimir Kostyukov <vladimir.kostyukov@intel.com> |
ART: Fixes an issue with REX prefix for instructions with no ModRM byte There are instructions (such as push, pop, mov) in the x86 ISA that encode first operands in their opcodes (opcode + reg). In order to enable an extended 64bit registers (R9-R15) a special prefix REX.B should be emitted before such instructions. This patch fixes the issue when REX.R prefix was emitted before instructions with no MorRM byte. So, the REX-prefix was simply ignored by CPU for those instructions whose operands are encoded in their opcodes. This patch makes the jni_compiler_test passed with JNI compiler enabled for x86_64 target. Change-Id: Ib84da1cf9f8ff96bd7afd4e0fc53078f3231f8ec Signed-off-by: Vladimir Kostyukov <vladimir.kostyukov@intel.com>
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790a6b7312979513710c366b411ba6791ddf78c2 |
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01-Apr-2014 |
Ian Rogers <irogers@google.com> |
Calling convention support for cross 64/32 compilation. Add REX support for x86-64 operands. Change-Id: I093ae26fb8c111d54b8c72166f054984564c04c6
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dd7624d2b9e599d57762d12031b10b89defc9807 |
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15-Mar-2014 |
Ian Rogers <irogers@google.com> |
Allow mixing of thread offsets between 32 and 64bit architectures. Begin a more full implementation x86-64 REX prefixes. Doesn't implement 64bit thread offset support for the JNI compiler. Change-Id: If9af2f08a1833c21ddb4b4077f9b03add1a05147
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fca82208f7128fcda09b6a4743199308332558a2 |
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21-Mar-2014 |
Dmitry Petrochenko <dmitry.petrochenko@intel.com> |
x86_64: JNI compiler Passed all tests from jni_compiler_test and art/test on host with jni_copiler. Incoming argument spill is enabled, entry_spills refactored. Now each entry spill contains data type size (4 or 8) and offset which should be used for spill. Assembler REX support implemented in opcodes used in JNI compiler. Please note, JNI compiler is not enabled by default yet (see compiler_driver.cc:1875). Change-Id: I5fd19cca72122b197aec07c3708b1e80c324be44 Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
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