36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
|
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a. Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/PowerPC/PPC.h
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a68f58ab2bec6a024afae498e4082ddd8b01f178 |
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08-Jul-2013 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
[PowerPC] Always use "assembler dialect" 1 A setting in MCAsmInfo defines the "assembler dialect" to use. This is used by common code to choose between alternatives in a multi-alternative GNU inline asm statement like the following: __asm__ ("{sfe|subfe} %0,%1,%2" : "=r" (out) : "r" (in1), "r" (in2)); The meaning of these dialects is platform specific, and GCC defines those for PowerPC to use dialect 0 for old-style (POWER) mnemonics and 1 for new-style (PowerPC) mnemonics, like in the example above. To be compatible with inline asm used with GCC, LLVM ought to do the same. Specifically, this means we should always use assembler dialect 1 since old-style mnemonics really aren't supported on any current platform. However, the current LLVM back-end uses: AssemblerDialect = 1; // New-Style mnemonics. in PPCMCAsmInfoDarwin, and AssemblerDialect = 0; // Old-Style mnemonics. in PPCLinuxMCAsmInfo. The Linux setting really isn't correct, we should be using new-style mnemonics everywhere. This is changed by this commit. Unfortunately, the setting of this variable is overloaded in the back-end to decide whether or not we are on a Darwin target. This is done in PPCInstPrinter (the "SyntaxVariant" is initialized from the MCAsmInfo AssemblerDialect setting), and also in PPCMCExpr. Setting AssemblerDialect to 1 for both Darwin and Linux no longer allows us to make this distinction. Instead, this patch uses the MCSubtargetInfo passed to createPPCMCInstPrinter to distinguish Darwin targets, and ignores the SyntaxVariant parameter. As to PPCMCExpr, this patch adds an explicit isDarwin argument that needs to be passed in by the caller when creating a target MCExpr. (To do so this patch implicitly also reverts commit 184441.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185858 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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23a72c8f7e46618ff8dbdbba4e8c1a2c4e44e3df |
|
05-Jul-2013 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
[PowerPC] Support @tls in the asm parser This adds support for the last missing construct to parse TLS-related assembler code: add 3, 4, symbol@tls The ADD8TLS currently hard-codes the @tls into the assembler string. This cannot be handled by the asm parser, since @tls is parsed as a symbol variant. This patch changes ADD8TLS to have the @tls suffix printed as symbol variant on output too, which allows us to remove the isCodeGenOnly marker from ADD8TLS. This in turn means that we can add a AsmOperand to accept @tls marked symbols on input. As a side effect, this means that the fixup_ppc_tlsreg fixup type is no longer necessary and can be merged into fixup_ppc_nofixup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185692 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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92cfa61c50d01307d658753f8d47f4e8555a6fa9 |
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21-Jun-2013 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
[PowerPC] Rename some more VK_PPC_ enums This renames more VK_PPC_ enums, to make them more closely reflect the @modifier string they represent. This also prepares for adding a bunch of new VK_PPC_ enums in upcoming patches. For consistency, some MO_ flags related to VK_PPC_ enums are likewise renamed. No change in behaviour. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184547 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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ea18f0cc4d3595ed55b53faf08ead1fc3d5abfa3 |
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20-Jun-2013 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
[PowerPC] Remove unused parameter The isDarwin parameter to the llvm::LowerPPCMachineInstrToMCInst routine is now no longer needed; remove it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184441 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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e50c8c1f81a38f0ecebafa5dc60a163814a9713a |
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20-May-2013 |
Hal Finkel <hfinkel@anl.gov> |
Add a PPCCTRLoops verification pass When asserts are enabled, this adds a verification pass for PPC counter-loop formation. Unfortunately, without sacrificing code quality, there is no better way of forming counter-based loops except at the (late) IR level. This means that we need to recognize, at the IR level, anything which might turn into a function call (or indirect branch). Because this is currently a finite set of things, and because SelectionDAG lowering is basic-block local, this can be done. Nevertheless, it is fragile, and failure results in a miscompile. This verification pass checks that all (reachable) counter-based branches are dominated by a loop mtctr instruction, and that no instructions in between clobber the counter register. If these conditions are not satisfied, then an ICE will be triggered. In short, this is to help us sleep better at night. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182295 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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b1fd3cd78f8acd21dbf514b75fef991827c343b6 |
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15-May-2013 |
Hal Finkel <hfinkel@anl.gov> |
Implement PPC counter loops as a late IR-level pass The old PPCCTRLoops pass, like the Hexagon pass version from which it was derived, could only handle some simple loops in canonical form. We cannot directly adapt the new Hexagon hardware loops pass, however, because the Hexagon pass contains a fundamental assumption that non-constant-trip-count loops will contain a guard, and this is not always true (the result being that incorrect negative counts can be generated). With this commit, we replace the pass with a late IR-level pass which makes use of SE to calculate the backedge-taken counts and safely generate the loop-count expressions (including any necessary max() parts). This IR level pass inserts custom intrinsics that are lowered into the desired decrement-and-branch instructions. The most fragile part of this new implementation is that interfering uses of the counter register must be detected on the IR level (and, on PPC, this also includes any indirect branches in addition to function calls). Also, to make all of this work, we need a variant of the mtctr instruction that is marked as having side effects. Without this, machine-code level CSE, DCE, etc. illegally transform the resulting code. Hopefully, this can be improved in the future. This new pass is smaller than the original (and much smaller than the new Hexagon hardware loops pass), and can handle many additional cases correctly. In addition, the preheader-creation code has been copied from LoopSimplify, and after we decide on where it belongs, this code will be refactored so that it can be explicitly shared (making this implementation even smaller). The new test-case files ctrloop-{le,lt,ne}.ll have been adapted from tests for the new Hexagon pass. There are a few classes of loops that this pass does not transform (noted by FIXMEs in the files), but these deficiencies can be addressed within the SE infrastructure (thus helping many other passes as well). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181927 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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5ee67e8e76dfcaffa5e776ef3d5eeb80807a627b |
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08-Apr-2013 |
Hal Finkel <hfinkel@anl.gov> |
Generate PPC early conditional returns PowerPC has a conditional branch to the link register (return) instruction: BCLR. This should be used any time when we'd otherwise have a conditional branch to a return. This adds a small pass, PPCEarlyReturn, which runs just prior to the branch selection pass (and, importantly, after block placement) to generate these conditional returns when possible. It will also eliminate unconditional branches to returns (these happen rarely; most of the time these have already been tail duplicated by the time PPCEarlyReturn is invoked). This is a nice optimization for small functions that do not maintain a stack frame. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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aa6047d23d8ed55abd8545f5cbe82cd13cbd756a |
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26-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
PPC: Use HWEncoding and TRI->getEncodingValue As pointed out by Jakob, we don't need to maintain a separate register-numbering table. Instead we should let TableGen generate the table for us from the information (already present) in PPCRegisterInfo.td. TRI->getEncodingValue is now used to access register-encoding values. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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06ab2c828a5605abec36eb0d6749940fa6eb7391 |
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21-Feb-2013 |
Bill Schmidt <wschmidt@linux.vnet.ibm.com> |
Relocation enablement for PPC DAG postprocessing pass git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175693 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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a8b289b70d5ef416608bb71a874b8b4fe80158e1 |
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26-Jan-2013 |
Hal Finkel <hfinkel@anl.gov> |
Initial implementation of PPCTargetTransformInfo This provides a place to add customized operation cost information and control some other target-specific IR-level transformations. The only non-trivial logic in this checkin assigns a higher cost to unaligned loads and stores (covered by the included test case). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173520 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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dfebc4cc4c267f797e823b781d73586cc6fc49c5 |
|
13-Dec-2012 |
Bill Schmidt <wschmidt@linux.vnet.ibm.com> |
This is just a clean-up patch that simplifies the initial-exec TLS logic by avoiding use of machine operand flags. No change in observable behavior, so no new test cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170141 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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d7802bf0ddcac16ee910105922492aee86a53e1b |
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04-Dec-2012 |
Bill Schmidt <wschmidt@linux.vnet.ibm.com> |
This patch introduces initial-exec model support for thread-local storage on 64-bit PowerPC ELF. The patch includes code to handle external assembly and MC output with the integrated assembler. It intentionally does not support the "old" JIT. For the initial-exec TLS model, the ABI requires the following to calculate the address of external thread-local variable x: Code sequence Relocation Symbol ld 9,x@got@tprel(2) R_PPC64_GOT_TPREL16_DS x add 9,9,x@tls R_PPC64_TLS x The register 9 is arbitrary here. The linker will replace x@got@tprel with the offset relative to the thread pointer to the generated GOT entry for symbol x. It will replace x@tls with the thread-pointer register (13). The two test cases verify correct assembly output and relocation output as just described. PowerPC-specific selection node variants are added for the two instructions above: LD_GOT_TPREL and ADD_TLS. These are inserted when an initial-exec global variable is encountered by PPCTargetLowering::LowerGlobalTLSAddress(), and later lowered to machine instructions LDgotTPREL and ADD8TLS. LDgotTPREL is a pseudo that uses the same LDrs support added for medium code model's LDtocL, with a different relocation type. The rest of the processing is straightforward. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169281 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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99f823f94374917174f96a7689955b8463db6816 |
|
08-Jun-2012 |
Hal Finkel <hfinkel@anl.gov> |
Add the PPCCTRLoops pass: a PPC machine-code-level optimization pass to form CTR-based loop branching code. This pass is derived from the Hexagon HardwareLoops pass. The only significant enhancement over the Hexagon pass is that PPCCTRLoops will also attempt to delete the replaced add and compare operations if they are no longer otherwise used. Also, invalid preheader DebugLoc is not used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158204 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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fd42ed676e37c29364f53f848320b7cb706111e0 |
|
04-Jun-2012 |
Roman Divacky <rdivacky@freebsd.org> |
Implement local-exec TLS on PowerPC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157935 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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79aa3417eb6f58d668aadfedf075240a41d35a26 |
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17-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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54134708f5debe1631f9ea9b232f78758a2151e4 |
|
25-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Code clean up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135954 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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966aeb5788c242cfaca35c56c0ddc0ff778d4376 |
|
25-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Refactor PPC target to separate MC routines from Target routines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135942 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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c60f9b752381baa6c4b80c0739034660f1748c84 |
|
14-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Next round of MC refactoring. This patch factor MC table instantiations, MC registeration and creation code into XXXMCDesc libraries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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59ee62d2418df8db499eca1ae17f5900dc2dcbba |
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11-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo and MCSubtargetInfo. - Added methods to update subtarget features (used when targets automatically detect subtarget features or switch modes). - Teach X86Subtarget to update MCSubtargetInfo features bits since the MCSubtargetInfo layer can be shared with other modules. - These fixes .code 16 / .code 32 support since mode switch is updated in MCSubtargetInfo so MC code emitter can do the right thing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134884 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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22fee2dff4c43b551aefa44a96ca74fcade6bfac |
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28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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73f50d9bc3bd46cc0abeba9bb0d46977ba1aea42 |
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27-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc into XXXGenRegisterInfo.inc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133922 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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a1000742d28f33dd8dd9858e64282e7749c0bd64 |
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09-Jun-2011 |
Roman Divacky <rdivacky@freebsd.org> |
Fix emission of PPC64 assembler on non-darwin platforms by splitting VK_PPC_{HA,LO}16 into darwin and gas variants. Darwin wants {ha,lo}16(symbol) while gnu as wants symbol@{ha,l}. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132802 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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b46443a686c29a1aa8f881c48c35d3f61a35f7ac |
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15-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
Wire up primitive support in the assembler backend for writing .o files directly on the mac. This is very early, doesn't support relocations and has a terrible hack to avoid .machine from being printed, but despite that it generates an bitwise-identical-to-cctools .o file for stuff like this: define i32 @test() nounwind { ret i32 42 } I don't plan to continue pushing this forward, but if anyone else was interested in doing it, it should be really straight-forward. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119136 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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5ffe38ef6ae3427b39b2d866ab8d1a73f9f69e56 |
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15-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
Implement a basic MCCodeEmitter for PPC. This doesn't handle fixups yet, and doesn't handle actually encoding operand values, but this is enough for llc -show-mc-encoding to show the base instruction encoding information, e.g.: mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6] stw r0, 8(r1) ; encoding: [0x90,0x00,0x00,0x00] stwu r1, -64(r1) ; encoding: [0x94,0x00,0x00,0x00] Ltmp0: lhz r4, 4(r3) ; encoding: [0xa0,0x00,0x00,0x00] cmplwi cr0, r4, 8 ; encoding: [0x28,0x00,0x00,0x00] beq cr0, LBB0_2 ; encoding: [0x40,0x00,0x00,0x00] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119116 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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6d2ff122af017a24b6e94d4f98f40a3edc0bb62d |
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15-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
convert the operand bits into bitfields since they are all combinable in different ways. Add $non_lazy_ptr support, and proper lowering for global values. Now all the ppc regression tests pass with the new instruction printer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119106 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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1e61e69d401045c54b15815f15a0fdb3ca56a9b5 |
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15-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
add targetoperand flags for jump tables, constant pool and block address nodes to indicate when ha16/lo16 modifiers should be used. This lets us pass PowerPC/indirectbr.ll. The one annoying thing about this patch is that the MCSymbolExpr isn't expressive enough to represent ha16(label1-label2) which we need on PowerPC. I have a terrible hack in the meantime, but this will have to be revisited at some point. Last major conversion item left is global variable references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119105 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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b908258d59745ab9f150c66f94541951cf9c9211 |
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15-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
implement support for the MO_DARWIN_STUB TargetOperand flag, and have isel apply to to call operands as required. This allows us to get $stub suffixes on label references on ppc/tiger with the new instprinter, fixing two tests. Only 2 to go. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119093 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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a7217c824d512d6a80fbe97b82f4c2e15ec2a338 |
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14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
switch PPC to a simplified MCInstLowering model. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119074 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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8d63ba8260d26a256a082089e8fe8fcd38b5b949 |
|
14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
fix PPC.h to not pull in TargetMachine.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119072 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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55fed86353fb39924378dc0e5d29cb273f5e2138 |
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02-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
tidy some targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95146 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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5335bce43dbf72ac364bd59a431f7b50f0e413f3 |
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02-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
remove dead code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95141 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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0c795d61878156817cedbac51ec2921f2634c1a5 |
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25-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Add new helpers for registering targets. - Less boilerplate == good. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77052 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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4cb1e13769856716261a4d315f8202bd918502c3 |
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19-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Put Target definitions inside Target specific header, and llvm namespace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76344 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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51b198af83cb0080c2709b04c129a3d774c07765 |
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15-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Reapply TargetRegistry refactoring commits. --- Reverse-merging r75799 into '.': U test/Analysis/PointerTracking U include/llvm/Target/TargetMachineRegistry.h U include/llvm/Target/TargetMachine.h U include/llvm/Target/TargetRegistry.h U include/llvm/Target/TargetSelect.h U tools/lto/LTOCodeGenerator.cpp U tools/lto/LTOModule.cpp U tools/llc/llc.cpp U lib/Target/PowerPC/PPCTargetMachine.h U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp U lib/Target/PowerPC/PPCTargetMachine.cpp U lib/Target/PowerPC/PPC.h U lib/Target/ARM/ARMTargetMachine.cpp U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp U lib/Target/ARM/ARMTargetMachine.h U lib/Target/ARM/ARM.h U lib/Target/XCore/XCoreTargetMachine.cpp U lib/Target/XCore/XCoreTargetMachine.h U lib/Target/PIC16/PIC16TargetMachine.cpp U lib/Target/PIC16/PIC16TargetMachine.h U lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp U lib/Target/Alpha/AlphaTargetMachine.cpp U lib/Target/Alpha/AlphaTargetMachine.h U lib/Target/X86/X86TargetMachine.h U lib/Target/X86/X86.h U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h U lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h U lib/Target/X86/X86TargetMachine.cpp U lib/Target/MSP430/MSP430TargetMachine.cpp U lib/Target/MSP430/MSP430TargetMachine.h U lib/Target/CppBackend/CPPTargetMachine.h U lib/Target/CppBackend/CPPBackend.cpp U lib/Target/CBackend/CTargetMachine.h U lib/Target/CBackend/CBackend.cpp U lib/Target/TargetMachine.cpp U lib/Target/IA64/IA64TargetMachine.cpp U lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp U lib/Target/IA64/IA64TargetMachine.h U lib/Target/IA64/IA64.h U lib/Target/MSIL/MSILWriter.cpp U lib/Target/CellSPU/SPUTargetMachine.h U lib/Target/CellSPU/SPU.h U lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp U lib/Target/CellSPU/SPUTargetMachine.cpp U lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp U lib/Target/Mips/MipsTargetMachine.cpp U lib/Target/Mips/MipsTargetMachine.h U lib/Target/Mips/Mips.h U lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp U lib/Target/Sparc/SparcTargetMachine.cpp U lib/Target/Sparc/SparcTargetMachine.h U lib/ExecutionEngine/JIT/TargetSelect.cpp U lib/Support/TargetRegistry.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75820 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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2286f8dc4cec0625f7d7a14e2570926cf8599646 |
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15-Jul-2009 |
Stuart Hastings <stuart@apple.com> |
Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build. Will revert 75770 in the llvm-gcc trunk. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75799 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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4246790aa84a530b0378d917023584c2c7adb4a9 |
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15-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Register Target's TargetMachine and AsmPrinter in the new registry. - This abuses TargetMachineRegistry's constructor for now, this will get cleaned up in time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75762 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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71847813bc419f7a0667468136a07429c6d9f164 |
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14-Jul-2009 |
David Greene <greened@obbligato.org> |
Have asm printers use formatted_raw_ostream directly to avoid a dynamic_cast<>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75670 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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ac57e6e498abccb117e0d61c2fa0f733845e50cb |
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06-Jul-2009 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add the Object Code Emitter class. Original patch by Aaron Gray, I did some cleanup, removed some #includes and moved Object Code Emitter out-of-line. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74813 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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5bcc8bd0c60cfe583ee47852950aad9e532c932e |
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01-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Remove unused AsmPrinter OptLevel argument, and propogate. - This more or less amounts to a revert of r65379. I'm curious to know what happened that caused this variable to become unused. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74579 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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a3f99f90338d89354384ca25f53ca4450a1a9d18 |
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30-May-2009 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
First patch in the direction of splitting MachineCodeEmitter in two subclasses: JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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98a366d547772010e94609e4584489b3e5ce0043 |
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30-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Instead of passing in an unsigned value for the optimization level, use an enum, which better identifies what the optimization is doing. And is more flexible for future uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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be8cc2a3dedeb7685f07e68cdc4b9502eb97eb2b |
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29-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Second attempt: Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'll change the JIT with a follow-up patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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c69d56f1154342a57c9bdd4c17a10333e3520127 |
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28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
r70270 isn't ready yet. Back this out. Sorry for the noise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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2e9d5f912a9841d3685ba0241abe1131943fed29 |
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28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'm not 100% sure if it's necessary to change it there... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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42bf74be1402df7409efbea089310d4c276fde37 |
|
25-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67668 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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57f0db833dc30404f1f5d28b23df326e520698ec |
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24-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Overhaul my earlier submission due to feedback. It's a large patch, but most of them are generic changes. - Use the "fast" flag that's already being passed into the asm printers instead of shoving it into the DwarfWriter. - Instead of calling "MI->getParent()->getParent()" for every MI, set the machine function when calling "runOnMachineFunction" in the asm printers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65379 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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d68a07650cdb2e18f18f362ba533459aa10e01b6 |
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05-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Tidy up #includes, deleting a bunch of unnecessary #includes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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cb3718832375a581c5ea23f15918f3ea447a446c |
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21-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Use raw_ostream throughout the AsmPrinter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55092 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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bfae83139dcb4fffd50b939e1b1224b0126f04d4 |
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11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Use PassManagerBase instead of FunctionPassManager for functions that merely add passes. This allows them to be used with either FunctionPassManager or PassManager, or even with a custom new kind of pass manager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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4ee451de366474b9c228b4e5fa573795a715216d |
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29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Remove attribution from file headers, per discussion on llvmdev. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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eb1ac3385096dd6f45a1548f3492f21648f55b4c |
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08-Feb-2007 |
Bill Wendling <isanbard@gmail.com> |
Moved the MachOWriter and ELFWriter out of the Target/* files. Placed the definition of it into the CodeGen library. This is so that a backend doesn't necessarily add in these writers if it doesn't use them (like in the lli program). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34034 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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df4ed6350b2a51f71c0980e86c9078f4046ea706 |
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17-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
start using PPC predicates more consistently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31833 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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6fc40079f374cfeeb63808fd96ea670ae036f809 |
|
04-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
encode BLR predicate info for the JIT git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31450 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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af53a87052f41664ff5962731d0b64e3b51a5501 |
|
04-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Go through all kinds of trouble to mark 'blr' as having a predicate operand that takes a register and condition code. Print these pieces of BLR the right way, even though it is currently set to 'always'. Next up: get the JIT encoding right, then enhance branch folding to produce predicated blr for simple examples. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31449 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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4da1c82f724adba2832f79b3b49fc96c1467076d |
|
20-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
The DarwinAsmPrinter need not check for isDarwin. createPPCAsmPrinterPass should create the right asmprinter subclass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30542 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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563321a2582851c653d0863e8e0bba3d483734f9 |
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06-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Separate target specific asm properties from the asm printers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30126 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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1911fd4f85aebcd4d7b8f27313c5a363eebf49cb |
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04-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Completely rearchitect the interface between targets and the pass manager. This pass: 1. Splits TargetMachine into TargetMachine (generic targets, can be implemented any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by things using libcodegen and other support). 2. Instead of having each target fully populate the passmgr for file or JIT output, move all this to common code, and give targets hooks they can implement. 3. Commonalize the target population stuff between file emission and JIT emission. 4. All (native code) codegen stuff now happens in a FunctionPassManager, which paves the way for "fast -O0" stuff in the CFE later, and now LLC could lazily stream .bc files from disk to use less memory. 5. There are now many fewer #includes and the targets don't depend on the scalar xforms or libanalysis anymore (but codegen does). 6. Changing common code generator pass ordering stuff no longer requires touching all targets. 7. The JIT now has the option of "-fast" codegen or normal optimized codegen, which is now orthogonal to the fact that JIT'ing is being done. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30081 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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eb883af3903286ac20f5bbf549c555c9ef961e14 |
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23-Aug-2006 |
Nate Begeman <natebegeman@mac.com> |
Initial checkin of the Mach-O emitter. There's plenty of fixmes, but it does emit linkable .o files in very simple cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29850 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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ba4733d901b1c2b994f66707657342b8c81c92bc |
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15-Jul-2006 |
Chris Lattner <sabre@nondot.org> |
Remove what little AIX support we have. It has never been tested and isn't complete. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29156 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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af89fa609bce1004c9ea9737d9fdb32f4224ef1c |
|
16-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Remove the -darwin and -aix llc options, inferring darwinism and aixism from the target triple & subtarget info. woo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28835 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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c4c6257c1a154279bf10e9498d46d6c1793dbaa7 |
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14-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added getTargetLowering() to TargetMachine. Refactored targets to support this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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4c1aa866578f7a358407a22fe55b454f52a24325 |
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22-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
- Added option -relocation-model to set relocation model. Valid values include static, pic, dynamic-no-pic, and default. PPC and x86 default is dynamic-no-pic for Darwin, pic for others. - Removed options -enable-pic and -ppc-static. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26315 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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d2ee218b499fcd364aae7da031819b738f009cd1 |
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18-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Moved PICEnabled to include/llvm/Target/TargetOptions.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26272 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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05f1fe8d448013531f86a24b5173fe57330291ef |
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12-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Goodbye PPC pattern isel. You have served us well, but it is now time for you to ride off into the sunset. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25236 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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1d05cb47a94bb5639b690519c6027447791e06f7 |
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17-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
add an option to generate completely non-pic code, corresponding to what gcc -static produces on PPC. This is used for building kexts and other things. With this, materializing the address of a global looks like: lis r2, ha16(L_H$non_lazy_ptr) la r3, lo16(L_H$non_lazy_ptr)(r2) we're still emitting stubs for functions, which is wrong. That is next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24399 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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1d9d7427c4a4e3c7bdcfd1f725447f355e509c20 |
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18-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is purely mechanical. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23778 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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4c7b43b43fdf943c7298718e15ab5d6dfe345be7 |
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15-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23738 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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73bfa7152481620d60bf63d5397dfe35bbc9c098 |
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19-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Remove the X86 and PowerPC Simple instruction selectors; their time has passed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22886 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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d1c4626e147b8c9ee6dfe8bbec05f3a2dc27af9d |
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17-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
add prototype, remove dead proto git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22835 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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3c304a3ba18a040d3c3dbd15ab69da5543cdbd54 |
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06-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Consolidate the GPOpt stuff to all use the Subtarget, instead of still depending on the command line option. Now the command line option just sets the subtarget as appropriate. G5 opts will now default to on on G5-enabled nightly testers among other machines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22688 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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3d72d148871918cfdd930919cb11767a8c2bb7e6 |
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04-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Use the new subtarget support to automatically choose the correct ABI and asm printer for PowerPC if one is not specified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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2497e6391f8df05926fe17b5cf08dad61c4797d2 |
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21-Jul-2005 |
Nate Begeman <natebegeman@mac.com> |
Support building non-PIC Remove the LoadHiAddr pseudo-instruction. Optimization of stores to and loads from statics. Force JIT to use new non-PIC codepaths. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22494 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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a3fd400fa87f2d7f23b2c54195bf283cbec1758a |
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19-Jul-2005 |
Nate Begeman <natebegeman@mac.com> |
Integrate SelectFPExpr into SelectExpr. This gets PPC32 closer to being automatically generated from a target description. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22470 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0 |
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22-Apr-2005 |
Misha Brukman <brukman+llvm@gmail.com> |
Remove trailing whitespace git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21425 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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f8b02949e3d13e9b7cd38e029fcbf3e799366aa7 |
|
16-Apr-2005 |
Nate Begeman <natebegeman@mac.com> |
Make pattern isel default for ppc Add new ppc beta option related to using condition registers Make pattern isel control flag (-enable-pattern-isel) global and tristate 0 == off 1 == on 2 == target default git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21309 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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d3e6b94020ac6ed827fb1dfe1f4abe9ff39e4ec7 |
|
05-Apr-2005 |
Nate Begeman <natebegeman@mac.com> |
Remove 64 bit simple ISel, it never worked correctly Add initial (buggy) implementation of 64 bit pattern ISel git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21096 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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a9795f81e91c02d8824c70533c2ab944b13c14e6 |
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24-Mar-2005 |
Nate Begeman <natebegeman@mac.com> |
Addition of the PPC32 Pattern ISel. While it is far from complete, it will be brought up to parity with the current simple ISel in the coming days. Currently, -pattern-isel is required to trigger it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20805 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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fc256599b3b64af0ad09c416e12a3479e6534ce6 |
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14-Nov-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Fix build on Linux/PowerPC64 using SuSE GCC (#undef PPC) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17744 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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ed42853be1ef530890043da7c8966dc6678cf9bf |
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04-Sep-2004 |
Nate Begeman <natebegeman@mac.com> |
All PPC instructions are now auto-printed 32 and 64 bit AsmWriters unified Darwin and AIX specific features of AsmWriter split out git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16163 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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08dde0ba85f7f7e70293fd9075a0df99c32de29b |
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17-Aug-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Consistently name passed with 32 or 64 in their name git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15855 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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ca068e861b7f1184d31f6c8f26f88feb076badf1 |
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15-Aug-2004 |
Nate Begeman <natebegeman@mac.com> |
Replace PowerPCPEI.cpp with target independant PrologEpilogInserter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15746 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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ca9309f22e626db9019de371cf7b61a7e35d08e2 |
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12-Aug-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
64-bit instruction selector and AIX-specific 64-bit asm printer git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15669 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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7a4fe9be7ee67dafa8d172d16bc6799e599ad495 |
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11-Aug-2004 |
Nate Begeman <natebegeman@mac.com> |
Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15662 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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0145881cb985b2165bbd1aded733e0183c50e63a |
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11-Aug-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15636 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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7103fba019a8c6e2436d6d5d0e708b98cb5b3f83 |
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10-Aug-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
CodePrinter -> AsmPrinter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15599 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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3ea934668b77f5126e8de0648b8d21a128971e11 |
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06-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Changes commited for Nate Begeman: Use a PowerPC specific prolog epilog inserter to control where spilled callee save regs are placed on the stack. Get rid of implicit return address stack slot, save return address reg (LR) in appropriate slot Improve code generated for functions that don't have calls or access globals Note from Chris: PowerPCPEI will eventually be eliminated, once the functionality is merged into CodeGen/PrologEpilogInserter.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15536 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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999d9cfde515a6735b376071090b89efb25cf8e6 |
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27-Jul-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Add PowerPCBranchSelector to discover which are `long' branches. Contributed by Nate Begeman. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15280 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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5dfe3a9c3bd9091f9adecc909665d52bdd4edd8c |
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21-Jun-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Initial revision git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14283 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/PPC.h
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