32118cfe37495738ed5931c6b1a71b8ee2ad189c |
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06-Dec-2011 |
Eric Anholt <eric@anholt.net> |
i965: Don't make consumers of brw_DO()/brw_WHILE() track loop start. This is a similar cleanup to what we did for brw_IF(), brw_ELSE(), brw_ENDIF() handling. Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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2252e5e3f1e8caece5c73df82f3ddf306baa2c91 |
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02-Dec-2011 |
Paul Berry <stereotype441@gmail.com> |
i965: Clean up misleading defines for DWORD 2 of URB_WRITE header. R02_PRIM_END and R02_PRIM_START don't actually refer to bits in DWORD 2 of R0 (as the name, and comments in the code, would seem to indicate). Actually they refer to bits in DWORD 2 of the header for URB_WRITE messages. This patch renames the defines to reflect what they actually mean. It also addes a define URB_WRITE_PRIM_TYPE_SHIFT, which previously was just hardcoded in .c files. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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2e5a1a254ed81b1d3efa6064f48183eefac784d0 |
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07-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Convert from GLboolean to 'bool' from stdbool.h. I initially produced the patch using this bash command: for file in {intel,i915,i965}/*.{c,cpp,h}; do [ ! -h $file ] && sed -i 's/GLboolean/bool/g' $file && sed -i 's/GL_TRUE/true/g' $file && sed -i 's/GL_FALSE/false/g' $file; done Then I manually added #include <stdbool.h> to fix compilation errors, and converted a few functions back to GLboolean that were used in core Mesa's function pointer table to avoid "incompatible pointer" warnings. Finally, I cleaned up some whitespace issues introduced by the change. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Acked-by: Chad Versace <chad@chad-versace.us> Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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2ef1fa6b3c8d52e059bf6ccf519c45604962b27c |
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01-Sep-2011 |
Paul Berry <stereotype441@gmail.com> |
i965: clip: Convert computations to ..._to_offset() for clarity. This patch replaces some ad-hoc computations using ATTR_SIZE and the offset[] array to use the VUE map functions brw_vert_result_to_offset() and brw_vue_slot_to_offset(). Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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54a62f8806df29d79f1e630bae6d1f45fb15c69f |
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25-Aug-2011 |
Paul Berry <stereotype441@gmail.com> |
i965: clip: Add a function to determine whether a vert_result is in use. Previously we would examine the offset[] array (since an offset of 0 meant "not in use"). This paves the way for removing the offset[] array. Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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62b0c8561e2d259e4dc1f27346bf2f36c3b098c8 |
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25-Aug-2011 |
Paul Berry <stereotype441@gmail.com> |
i965: clip: Move hpos_offest and ndc_offset into local functions. The offsets within the VUE of HPOS and NDC are needed only in a few auxiliary clipping functions. This patch moves computation of those offsets into the functions that need them, and does the computation using the VUE map. Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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eae5b5c44e58ad2937600991a5569518d3023f68 |
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25-Aug-2011 |
Paul Berry <stereotype441@gmail.com> |
i965: clip: rename header_position_offset to the more correct ndc_offset. Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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5936d96d33e767aa99f6afa92f2a6582ff04df23 |
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16-May-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Move IF stack handling into the EU abstraction layer/brw_compile. This hides the IF stack and back-patching of IF/ELSE instructions from each of the code generators, greatly simplifying the interface. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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ec2b92f98c2e7f161521b447cc1d9a36bce3707c |
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11-Jun-2010 |
Brian Paul <brianp@vmware.com> |
mesa: rename src/mesa/shader/ to src/mesa/program/
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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634ec5c2abf05a9a8c27d9199ded5d1ad91e538a |
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23-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
i965: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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3e2b6a204966b962c9881e90fe3f0b74cf84d8c4 |
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30-Jul-2009 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: Postpone ff_sync message in CLIP kernel on IGDNG In addition, it guarantees ff_sync message is issued
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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2995bf0d68f1b28ba68b81e9dc79e3ab52bc2795 |
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13-Jul-2009 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: add support for new chipsets 1. new PCI ids 2. fix some 3D commands on new chipset 3. fix send instruction on new chipset 4. new VUE vertex header 5. ff_sync message (added by Zou Nan Hai <nanhai.zou@intel.com>) 6. the offset in JMPI is in unit of 64bits on new chipset 7. new cube map layout
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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ecadb51bbcb972a79f3ed79e65a7986b9396e757 |
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18-Sep-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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a35002c1673a1a37ec79b237dda7e8f6b9c9962a |
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22-Aug-2008 |
Krzysztof Czurylo <krzysztof.czurylo@intel.com> |
965: Fix incorrect backface culling Fix incorrect backface culling for OGL tunnel in wireframe and point mode.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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184cf464f4183a664fa0358fe118735e6fd98afe |
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28-Mar-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: depth offset on glPolygonMode(GL_LINE/GL_POINT)
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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9f344b3e7d6e23674dd4747faec253f103563b36 |
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09-Aug-2006 |
Eric Anholt <anholt@FreeBSD.org> |
Add Intel i965G/Q DRI driver. This driver comes from Tungsten Graphics, with a few further modifications by Intel.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
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