Lines Matching defs:EmitRex64
109 EmitRex64(dst);
114 EmitRex64(dst);
131 // 0x89 is movq r/m64 <- r64, with op1 in r/m and op2 in reg: so reverse EmitRex64
132 EmitRex64(src, dst);
148 EmitRex64(dst, src);
164 EmitRex64(src, dst);
295 EmitRex64(dst, src);
827 EmitRex64(dst, src);
866 EmitRex64(reg0, reg1);
875 EmitRex64(reg);
882 EmitRex64(reg);
955 EmitRex64(reg);
979 EmitRex64(reg);
1009 EmitRex64(dst, src);
1018 EmitRex64(dst);
1085 EmitRex64(reg);
1092 EmitRex64(dst);
1100 // 0x01 is addq r/m64 <- r/m64 + r64, with op1 in r/m and op2 in reg: so reverse EmitRex64
1101 EmitRex64(src, dst);
1140 EmitRex64(reg);
1147 EmitRex64(dst, src);
1155 EmitRex64(reg);
1592 EmitRex64(reg);
1685 void X86_64Assembler::EmitRex64(CpuRegister reg) {
1689 void X86_64Assembler::EmitRex64(CpuRegister dst, CpuRegister src) {
1693 void X86_64Assembler::EmitRex64(CpuRegister dst, const Operand& operand) {