/external/llvm/lib/Target/Mips/ |
H A D | Mips16ISelLowering.cpp | 421 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, 500 RegsToPass.push_front(std::make_pair(V0Reg, Callee)); 507 RegsToPass.push_front(std::make_pair((unsigned)Mips::T9, Callee)); 512 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal, 420 getOpndList(SmallVectorImpl<SDValue> &Ops, std::deque< std::pair<unsigned, SDValue> > &RegsToPass, bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const argument
|
H A D | MipsSEISelLowering.cpp | 1186 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, 1190 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal, 1185 getOpndList(SmallVectorImpl<SDValue> &Ops, std::deque< std::pair<unsigned, SDValue> > &RegsToPass, bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const argument
|
H A D | MipsISelLowering.cpp | 2334 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, 2345 RegsToPass.push_back(std::make_pair(GPReg, getGlobalReg(CLI.DAG, Ty))); 2354 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 2355 Chain = CLI.DAG.getCopyToReg(Chain, CLI.DL, RegsToPass[i].first, 2356 RegsToPass[i].second, InFlag); 2362 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) 2363 Ops.push_back(CLI.DAG.getRegister(RegsToPass[i].first, 2364 RegsToPass[i].second.getValueType())); 2451 std::deque< std::pair<unsigned, SDValue> > RegsToPass; local 2469 passByValArg(Chain, DL, RegsToPass, MemOpChain 2333 getOpndList(SmallVectorImpl<SDValue> &Ops, std::deque< std::pair<unsigned, SDValue> > &RegsToPass, bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const argument 3577 passByValArg(SDValue Chain, SDLoc DL, std::deque< std::pair<unsigned, SDValue> > &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr, MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, const MipsCC &CC, const ByValArgInfo &ByVal, const ISD::ArgFlagsTy &Flags, bool isLittle) const argument [all...] |
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 597 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; local 622 // Arguments that can be passed on register must be kept at RegsToPass 625 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 665 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 666 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, 667 RegsToPass[i].second, InFlag); 687 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) 688 Ops.push_back(DAG.getRegister(RegsToPass[i].first, 689 RegsToPass[i].second.getValueType()));
|
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 463 SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass; local 515 // Arguments that can be passed on register must be kept at RegsToPass 518 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 539 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 540 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, 541 RegsToPass[i].second, InFlag); 557 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 558 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, 559 RegsToPass[i].second, InFlag); 589 for (unsigned i = 0, e = RegsToPass [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1143 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; local 1167 // RegsToPass vector 1169 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 1191 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 1192 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, 1193 RegsToPass[i].second, InFlag); 1216 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) 1217 Ops.push_back(DAG.getRegister(RegsToPass[i].first, 1218 RegsToPass[i].second.getValueType()));
|
/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 738 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local 819 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Hi)); 823 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Lo)); 854 // RegsToPass vector 857 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 861 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 886 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 887 unsigned Reg = toCallerWindow(RegsToPass[i].first); 888 Chain = DAG.getCopyToReg(Chain, dl, Reg, RegsToPass[i].second, InFlag); 912 for (unsigned i = 0, e = RegsToPass [all...] |
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 838 SmallVector<std::pair<unsigned, SDValue>, 9> RegsToPass; local 858 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); 900 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) { 901 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first, 902 RegsToPass[I].second, Glue); 913 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) 914 Ops.push_back(DAG.getRegister(RegsToPass[I].first, 915 RegsToPass[I].second.getValueType()));
|
/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 2672 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local 2726 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 2738 RegsToPass.push_back(std::make_pair(ShadowReg, Arg)); 2757 RegsToPass.push_back(std::make_pair(unsigned(X86::EBX), 2796 RegsToPass.push_back(std::make_pair(unsigned(X86::AL), 2864 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 2865 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, 2866 RegsToPass[i].second, InFlag); 2970 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) 2971 Ops.push_back(DAG.getRegister(RegsToPass[ [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 2241 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local 2287 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 2357 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 2358 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first, 2359 RegsToPass[i].second, InFlag); 2416 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) 2417 Ops.push_back(DAG.getRegister(RegsToPass[i].first, 2418 RegsToPass[i].second.getValueType()));
|
/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1351 RegsToPassVector &RegsToPass, 1360 RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd.getValue(id))); 1363 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1-id))); 1441 RegsToPassVector RegsToPass; local 1480 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, 1485 PassF64ArgInRegs(dl, DAG, Chain, Op1, RegsToPass, 1494 PassF64ArgInRegs(dl, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i], 1505 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 1530 RegsToPass.push_back(std::make_pair(j, Load)); 1573 for (unsigned i = 0, e = RegsToPass 1349 PassF64ArgInRegs(SDLoc dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg, RegsToPassVector &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, SDValue &StackPtr, SmallVectorImpl<SDValue> &MemOpChains, ISD::ArgFlagsTy Flags) const argument [all...] |
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 3333 SmallVectorImpl<std::pair<unsigned, SDValue> > &RegsToPass, 3501 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) 3502 Ops.push_back(DAG.getRegister(RegsToPass[i].first, 3503 RegsToPass[i].second.getValueType())); 3568 &RegsToPass, 3577 isTailCall, RegsToPass, Ops, NodeTys, 3812 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local 3867 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 3894 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 3895 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[ 3331 PrepareCall(SelectionDAG &DAG, SDValue &Callee, SDValue &InFlag, SDValue &Chain, SDLoc dl, int SPDiff, bool isTailCall, SmallVectorImpl<std::pair<unsigned, SDValue> > &RegsToPass, SmallVectorImpl<SDValue> &Ops, std::vector<EVT> &NodeTys, const PPCSubtarget &Subtarget) argument 3564 FinishCall(CallingConv::ID CallConv, SDLoc dl, bool isTailCall, bool isVarArg, SelectionDAG &DAG, SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue InFlag, SDValue Chain, SDValue &Callee, int SPDiff, unsigned NumBytes, const SmallVectorImpl<ISD::InputArg> &Ins, SmallVectorImpl<SDValue> &InVals) const argument 4052 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local 4490 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local [all...] |