Searched defs:reg_or_opcode (Results 1 - 4 of 4) sorted by relevance

/art/disassembler/
H A Ddisassembler_x86.cc718 uint8_t reg_or_opcode = (instr[1] >> 3) & 7; local
719 switch (reg_or_opcode) {
1092 uint8_t reg_or_opcode = (modrm >> 3) & 7; local
1162 opcode << modrm_opcodes[reg_or_opcode];
1176 DumpReg(args, rex, reg_or_opcode, byte_operand, prefix[2], dst_reg_file);
1187 DumpReg(args, rex, reg_or_opcode, byte_operand, prefix[2], src_reg_file);
/art/compiler/dex/quick/x86/
H A Dassemble_x86.cc983 void X86Mir2Lir::EmitModrmThread(uint8_t reg_or_opcode) { argument
986 uint8_t modrm = (0 << 6) | (reg_or_opcode << 3) | rs_rX86_SP.GetRegNum();
991 uint8_t modrm = (0 << 6) | (reg_or_opcode << 3) | rs_rBP.GetRegNum();
996 void X86Mir2Lir::EmitModrmDisp(uint8_t reg_or_opcode, uint8_t base, int32_t disp) { argument
997 DCHECK_LT(reg_or_opcode, 8);
999 uint8_t modrm = (ModrmForDisp(base, disp) << 6) | (reg_or_opcode << 3) | base;
1008 void X86Mir2Lir::EmitModrmSibDisp(uint8_t reg_or_opcode, uint8_t base, uint8_t index, argument
1010 DCHECK_LT(RegStorage::RegNum(reg_or_opcode), 8);
1011 uint8_t modrm = (ModrmForDisp(base, disp) << 6) | RegStorage::RegNum(reg_or_opcode) << 3 |
/art/compiler/utils/x86/
H A Dassembler_x86.cc1324 void X86Assembler::EmitOperand(int reg_or_opcode, const Operand& operand) { argument
1325 CHECK_GE(reg_or_opcode, 0);
1326 CHECK_LT(reg_or_opcode, 8);
1331 EmitUint8(operand.encoding_[0] + (reg_or_opcode << 3));
1344 void X86Assembler::EmitComplex(int reg_or_opcode, argument
1347 CHECK_GE(reg_or_opcode, 0);
1348 CHECK_LT(reg_or_opcode, 8);
1352 EmitOperand(reg_or_opcode, operand);
1356 EmitUint8(0x05 + (reg_or_opcode << 3));
1360 EmitOperand(reg_or_opcode, operan
1385 EmitGenericShift(int reg_or_opcode, Register reg, const Immediate& imm) argument
1401 EmitGenericShift(int reg_or_opcode, Register operand, Register shifter) argument
[all...]
/art/compiler/utils/x86_64/
H A Dassembler_x86_64.cc1520 void X86_64Assembler::EmitOperand(uint8_t reg_or_opcode, const Operand& operand) { argument
1521 CHECK_GE(reg_or_opcode, 0);
1522 CHECK_LT(reg_or_opcode, 8);
1527 EmitUint8(operand.encoding_[0] + (reg_or_opcode << 3));
1544 void X86_64Assembler::EmitComplex(uint8_t reg_or_opcode, argument
1547 CHECK_GE(reg_or_opcode, 0);
1548 CHECK_LT(reg_or_opcode, 8);
1552 EmitOperand(reg_or_opcode, operand);
1556 EmitUint8(0x05 + (reg_or_opcode << 3));
1560 EmitOperand(reg_or_opcode, operan
1585 EmitGenericShift(bool wide, int reg_or_opcode, CpuRegister reg, const Immediate& imm) argument
1605 EmitGenericShift(int reg_or_opcode, CpuRegister operand, CpuRegister shifter) argument
[all...]

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