Searched refs:AsX86_64 (Results 1 - 5 of 5) sorted by relevance

/art/compiler/optimizing/
H A Dcode_generator_x86_64.cc32 x86_64::X86_64ManagedRegister Location::AsX86_64() const { function in class:art::Location
33 return reg().AsX86_64();
280 __ movq(destination.AsX86_64().AsCpuRegister(), source.AsX86_64().AsCpuRegister());
282 __ movl(destination.AsX86_64().AsCpuRegister(), Address(CpuRegister(RSP), source.GetStackIndex()));
285 __ movq(destination.AsX86_64().AsCpuRegister(), Address(CpuRegister(RSP), source.GetStackIndex()));
289 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), source.AsX86_64().AsCpuRegister());
298 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), source.AsX86_64().AsCpuRegister());
313 __ movl(location.AsX86_64().AsCpuRegister(), imm);
320 __ movq(location.AsX86_64()
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H A Dlocations.h173 x86_64::X86_64ManagedRegister AsX86_64() const;
/art/compiler/utils/x86_64/
H A Dassembler_x86_64.cc1725 x86_64::X86_64ManagedRegister spill = spill_regs.at(i).AsX86_64();
1739 x86_64::X86_64ManagedRegister spill = spill_regs.at(i).AsX86_64();
1748 movl(Address(CpuRegister(RSP), 0), method_reg.AsX86_64().AsCpuRegister());
1752 if (spill.AsX86_64().IsCpuRegister()) {
1755 spill.AsX86_64().AsCpuRegister());
1758 movl(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsCpuRegister());
1762 movsd(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsXmmRegister());
1765 movss(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsXmmRegister());
1778 x86_64::X86_64ManagedRegister spill = spill_regs.at(i).AsX86_64();
1788 x86_64::X86_64ManagedRegister spill = spill_regs.at(i).AsX86_64();
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H A Dmanaged_register_x86_64.h203 inline x86_64::X86_64ManagedRegister ManagedRegister::AsX86_64() const { function in class:art::ManagedRegister
/art/compiler/utils/
H A Dmanaged_register.h58 x86_64::X86_64ManagedRegister AsX86_64() const;

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