| /art/runtime/ |
| H A D | stack_map.h | 44 region_.Store<uint8_t>(kDepthOffset, depth);
52 region_.Store<uint32_t>(kFixedSize + depth * SingleEntrySize(), index);
99 region_.Store<LocationKind>(entry, kind);
100 region_.Store<int32_t>(entry + sizeof(LocationKind), value);
145 region_.Store<uint32_t>(kDexPcOffset, dex_pc);
153 return region_.Store<T>(kNativePcOffset, native_pc);
161 return region_.Store<uint32_t>(kDexRegisterMapOffsetOffset, offset);
169 return region_.Store<uint32_t>(kInlineDescriptorOffsetOffset, offset);
177 region_.Store<uint32_t>(kRegisterMaskOffset, mask);
239 region_.Store<uint32_
[all...] |
| H A D | memory_region.h | 51 template<typename T> void Store(uintptr_t offset, T value) const { function in class:art::MemoryRegion
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| /art/compiler/jni/quick/ |
| H A D | jni_compiler.cc | 238 __ Store(saved_cookie_offset, main_jni_conv->IntReturnRegister(), 4);
338 __ Store(return_save_location, main_jni_conv->ReturnRegister(), main_jni_conv->SizeOfReturnValue());
524 __ Store(out_off, in_reg, param_size);
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| /art/compiler/utils/ |
| H A D | assembler.h | 191 template<typename T> void Store(size_t position, T value) { function in class:art::AssemblerBuffer
382 // Store routines
383 virtual void Store(FrameOffset offs, ManagedRegister src, size_t size) = 0;
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| /art/compiler/utils/arm64/ |
| H A D | assembler_arm64.h | 113 // Store routines.
114 void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
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| H A D | assembler_arm64.cc | 122 void Arm64Assembler::Store(FrameOffset offs, ManagedRegister m_src, size_t size) { function in class:art::arm64::Arm64Assembler
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| /art/compiler/utils/x86/ |
| H A D | assembler_x86.cc | 1317 buffer_.Store<int32_t>(position, bound - (position + 4));
1452 void X86Assembler::Store(FrameOffset offs, ManagedRegister msrc, size_t size) { function in class:art::x86::X86Assembler
1666 Store(fr_offs, scratch, 4);
1684 Store(dest, scratch, 4);
1686 Store(FrameOffset(dest.Int32Value() + 4), scratch, 4);
1689 Store(dest, scratch, size);
1778 Store(out_off, scratch, 4);
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| H A D | assembler_x86.h | 474 // Store routines
475 void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
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| /art/compiler/utils/x86_64/ |
| H A D | assembler_x86_64.cc | 1513 buffer_.Store<int32_t>(position, bound - (position + 4));
1806 void X86_64Assembler::Store(FrameOffset offs, ManagedRegister msrc, size_t size) { function in class:art::x86_64::X86_64Assembler
2025 Store(fr_offs, scratch, 8);
2043 Store(dest, scratch, 4);
2045 Store(FrameOffset(dest.Int32Value() + 4), scratch, 4);
2048 Store(dest, scratch, size);
2143 Store(out_off, scratch, 8);
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| H A D | assembler_x86_64.h | 516 // Store routines
517 void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
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| /art/compiler/utils/mips/ |
| H A D | assembler_mips.h | 170 // Store routines
171 void Store(FrameOffset offs, ManagedRegister msrc, size_t size) OVERRIDE;
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| H A D | assembler_mips.cc | 156 buffer_.Store<int32_t>(position, encoded);
598 void MipsAssembler::Store(FrameOffset dest, ManagedRegister msrc, size_t size) { function in class:art::mips::MipsAssembler
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| /art/compiler/utils/arm/ |
| H A D | assembler_thumb2.cc | 1201 buffer->Store<int16_t>(location_, static_cast<int16_t>(encoding >> 16));
1202 buffer->Store<int16_t>(location_+2, static_cast<int16_t>(encoding & 0xffff));
1214 buffer->Store<int16_t>(location_, encoding);
1226 buffer->Store<int16_t>(location_, encoding);
2111 buffer_.Store<int16_t>(branch_location, cmp);
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| H A D | assembler_arm.cc | 455 void ArmAssembler::Store(FrameOffset dest, ManagedRegister msrc, size_t size) {
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| H A D | assembler_arm.h | 540 // Load and Store. May clobber IP.
626 // Store routines
627 void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
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| H A D | assembler_arm32.cc | 1213 buffer_.Store<int32_t>(position, encoded);
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