/art/compiler/dex/ |
H A D | reg_storage.h | 279 static constexpr bool SameRegType(RegStorage reg1, RegStorage reg2) { argument 280 return ((reg1.reg_ & kShapeTypeMask) == (reg2.reg_ & kShapeTypeMask)); 283 static constexpr bool SameRegType(int reg1, int reg2) { argument 284 return ((reg1 & kShapeTypeMask) == (reg2 & kShapeTypeMask));
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/art/compiler/dex/quick/arm64/ |
H A D | int_arm64.cc | 1388 * int reg1 = -1, reg2 = -1; 1390 * reg_mask = GenPairWise(reg_mask, & reg1, & reg2); 1391 * if (UNLIKELY(reg2 < 0)) { 1394 * // Pair in reg1, reg2. 1399 static uint32_t GenPairWise(uint32_t reg_mask, int* reg1, int* reg2) { argument 1408 *reg2 = reg; 1416 *reg2 = -1; 1421 int reg1 = -1, reg2 = -1; local 1425 reg_mask = GenPairWise(reg_mask, & reg1, & reg2); 1426 if (UNLIKELY(reg2 < 1437 int reg1 = -1, reg2 = -1; local 1487 int reg1 = -1, reg2 = -1; local 1605 int reg1 = -1, reg2 = -1; local 1621 int reg1 = -1, reg2 = -1; local [all...] |
/art/compiler/utils/ |
H A D | assembler_test.h | 84 for (auto reg2 : registers) { 85 (assembler_.get()->*f)(*reg1, *reg2); 96 size_t reg2_index = base.find("{reg2}"); 99 sreg << *reg2; local
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/art/compiler/dex/quick/mips/ |
H A D | int_mips.cc | 238 RegLocation MipsMir2Lir::GenDivRem(RegLocation rl_dest, RegStorage reg1, RegStorage reg2, argument 240 NewLIR2(kMipsDiv, reg1.GetReg(), reg2.GetReg());
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/art/compiler/dex/quick/arm/ |
H A D | int_arm.cc | 709 RegLocation ArmMir2Lir::GenDivRem(RegLocation rl_dest, RegStorage reg1, RegStorage reg2, argument 714 OpRegRegReg(kOpDiv, rl_result.reg, reg1, reg2); 717 // temp = reg1 / reg2 - integer division 718 // temp = temp * reg2 722 OpRegRegReg(kOpDiv, temp, reg1, reg2); 723 OpRegReg(kOpMul, temp, reg2);
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/art/compiler/utils/arm/ |
H A D | assembler_arm.h | 736 static int RegisterCompare(const Register* reg1, const Register* reg2) { argument 737 return *reg1 - *reg2;
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/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.cc | 919 void X86_64Assembler::testl(CpuRegister reg1, CpuRegister reg2) { argument 921 EmitOptionalRex32(reg1, reg2); 923 EmitRegisterOperand(reg1.LowBits(), reg2.LowBits());
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H A D | assembler_x86_64.h | 391 void testl(CpuRegister reg1, CpuRegister reg2);
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/art/compiler/dex/quick/ |
H A D | mir_to_lir.h | 1163 bool IsSameReg(RegStorage reg1, RegStorage reg2) { argument 1165 RegisterInfo* info2 = GetRegInfo(reg2);
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/art/compiler/dex/quick/x86/ |
H A D | codegen_x86.h | 814 void OpLea(RegStorage r_base, RegStorage reg1, RegStorage reg2, int scale, int offset);
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H A D | int_x86.cc | 905 void X86Mir2Lir::OpLea(RegStorage r_base, RegStorage reg1, RegStorage reg2, int scale, int offset) { argument 906 NewLIR5(kX86Lea32RA, r_base.GetReg(), reg1.GetReg(), reg2.GetReg(), scale, offset);
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/art/compiler/utils/x86/ |
H A D | assembler_x86.h | 347 void testl(Register reg1, Register reg2);
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H A D | assembler_x86.cc | 802 void X86Assembler::testl(Register reg1, Register reg2) { argument 805 EmitRegisterOperand(reg1, reg2);
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