1/****************************************************************************
2 * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
3 *
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation on the rights to use, copy, modify, merge,
10 * publish, distribute, sublicense, and/or sell copies of the Software,
11 * and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
21 * NON-INFRINGEMENT.  IN NO EVENT SHALL XGI AND/OR
22 * ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
23 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 ***************************************************************************/
27
28#ifndef _XGI_DRM_H_
29#define _XGI_DRM_H_
30
31#include <linux/types.h>
32#include <asm/ioctl.h>
33
34struct drm_xgi_sarea {
35	__u16 device_id;
36	__u16 vendor_id;
37
38	char device_name[32];
39
40	unsigned int scrn_start;
41	unsigned int scrn_xres;
42	unsigned int scrn_yres;
43	unsigned int scrn_bpp;
44	unsigned int scrn_pitch;
45};
46
47
48struct xgi_bootstrap {
49	/**
50	 * Size of PCI-e GART range in megabytes.
51	 */
52	struct drm_map gart;
53};
54
55
56enum xgi_mem_location {
57	XGI_MEMLOC_NON_LOCAL = 0,
58	XGI_MEMLOC_LOCAL = 1,
59	XGI_MEMLOC_INVALID = 0x7fffffff
60};
61
62struct xgi_mem_alloc {
63	/**
64	 * Memory region to be used for allocation.
65	 *
66	 * Must be one of XGI_MEMLOC_NON_LOCAL or XGI_MEMLOC_LOCAL.
67	 */
68	unsigned int location;
69
70	/**
71	 * Number of bytes request.
72	 *
73	 * On successful allocation, set to the actual number of bytes
74	 * allocated.
75	 */
76	unsigned int size;
77
78	/**
79	 * Address of the memory from the graphics hardware's point of view.
80	 */
81	__u32 hw_addr;
82
83	/**
84	 * Offset of the allocation in the mapping.
85	 */
86	__u32 offset;
87
88	/**
89	 * Magic handle used to release memory.
90	 *
91	 * See also DRM_XGI_FREE ioctl.
92	 */
93	__u32 index;
94};
95
96enum xgi_batch_type {
97	BTYPE_2D = 0,
98	BTYPE_3D = 1,
99	BTYPE_FLIP = 2,
100	BTYPE_CTRL = 3,
101	BTYPE_NONE = 0x7fffffff
102};
103
104struct xgi_cmd_info {
105	__u32 type;
106	__u32 hw_addr;
107	__u32 size;
108	__u32 id;
109};
110
111struct xgi_state_info {
112	unsigned int _fromState;
113	unsigned int _toState;
114};
115
116
117/*
118 * Ioctl definitions
119 */
120
121#define DRM_XGI_BOOTSTRAP           0
122#define DRM_XGI_ALLOC               1
123#define DRM_XGI_FREE                2
124#define DRM_XGI_SUBMIT_CMDLIST      3
125#define DRM_XGI_STATE_CHANGE        4
126#define DRM_XGI_SET_FENCE           5
127#define DRM_XGI_WAIT_FENCE          6
128
129#define XGI_IOCTL_BOOTSTRAP         DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_BOOTSTRAP, struct xgi_bootstrap)
130#define XGI_IOCTL_ALLOC             DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_ALLOC, struct xgi_mem_alloc)
131#define XGI_IOCTL_FREE              DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_FREE, __u32)
132#define XGI_IOCTL_SUBMIT_CMDLIST    DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_SUBMIT_CMDLIST, struct xgi_cmd_info)
133#define XGI_IOCTL_STATE_CHANGE      DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_STATE_CHANGE, struct xgi_state_info)
134#define XGI_IOCTL_SET_FENCE         DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_SET_FENCE, u32)
135#define XGI_IOCTL_WAIT_FENCE        DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_WAIT_FENCE, u32)
136
137#endif /* _XGI_DRM_H_ */
138