69a503050fb8a7b3a79b2cd2cdc2d8fbc594575d |
|
14-Apr-2015 |
Zheng Xu <zheng.xu@arm.com> |
ARM64: Remove suspend register. It also clean up build/remove frame used by JNI compiler and generates stp/ldp instead of str/ldr. Also x19 has been unblocked in both quick and optimizing compiler. Change-Id: Idbeac0942265f493266b2ef9b7a65bb4054f0e2d
|
677cd61ad05d993c4d3b22656675874f06d6aabc |
|
15-Oct-2014 |
Ian Rogers <irogers@google.com> |
Make ART compile with GCC -O0 again. Tidy up InstructionSetFeatures so that it has a type hierarchy dependent on architecture. Add to instruction_set_test to warn when InstructionSetFeatures don't agree with ones from system properties, AT_HWCAP and /proc/cpuinfo. Clean-up class linker entry point logic to not return entry points but to test whether the passed code is the particular entrypoint. This works around image trampolines that replicate entrypoints. Bug: 17993736 (cherry picked from commit 6f3dbbadf4ce66982eb3d400e0a74cb73eb034f3) Change-Id: I3e7595f437db4828072589d475a5453b7f31003e
|
6f3dbbadf4ce66982eb3d400e0a74cb73eb034f3 |
|
15-Oct-2014 |
Ian Rogers <irogers@google.com> |
Make ART compile with GCC -O0 again. Tidy up InstructionSetFeatures so that it has a type hierarchy dependent on architecture. Add to instruction_set_test to warn when InstructionSetFeatures don't agree with ones from system properties, AT_HWCAP and /proc/cpuinfo. Clean-up class linker entry point logic to not return entry points but to test whether the passed code is the particular entrypoint. This works around image trampolines that replicate entrypoints. Bug: 17993736 Change-Id: I5f4b49e88c3b02a79f9bee04f83395146ed7be23
|
29b3841ad8c1c18ee7ddd2d8cab85806b3d62eaa |
|
13-Aug-2014 |
Andreas Gampe <agampe@google.com> |
ART: Set default visibility to protected Set default visibility of symbols to protected. This allows the linker to optimize internal calls and helps avoid plt calls. Make almost all assembly stubs hidden, as -fvisibility does not seem to apply to them. Change the assembly tests accordingly. Also allows to clean up previous hacks to avoid plt calls. Bug: 16974467 (cherry picked from commit 235e77bd9f19e4faefda109be40f8744f3a66f40) Change-Id: I9030dcf6116251f434f94a2b08e56e12085af652
|
235e77bd9f19e4faefda109be40f8744f3a66f40 |
|
13-Aug-2014 |
Andreas Gampe <agampe@google.com> |
ART: Set default visibility to protected Set default visibility of symbols to protected. This allows the linker to optimize internal calls and helps avoid plt calls. Make almost all assembly stubs hidden, as -fvisibility does not seem to apply to them. Change the assembly tests accordingly. Also allows to clean up previous hacks to avoid plt calls. Bug: 16974467 Change-Id: I9030dcf6116251f434f94a2b08e56e12085af652
|
b551fdcda9eb128c80de37c4fb978968bec6d4b3 |
|
25-Jul-2014 |
Zheng Xu <zheng.xu@arm.com> |
AArch64: Clean up CalleeSaveMethod frame and the use of temp registers. CalleeSaveMethod frame size changes : SaveAll : 368 -> 176 RefOnly : 176 -> 96 RefsAndArgs : 304 -> 224 JNI register spill size changes : 160 -> 88 In the transition assembly, use registers following the rules: 1. x0-x7 as temp/argument registers. 2. IP0, IP1 as scratch registers. 3. After correct type of callee-save-frame has been setup, all registers are scratch-able(probably except xSELF and xSUSPEND). 4. When restore callee-save-frame, IP0 and IP1 should be untouched. 5. From C to managed code, we assume all callee save register in AAPCS will be restored by managed code except x19(SUSPEND). In quick compiler: 1. Use IP0, IP1 as scratch register. 2. Use IP1 as hidden argument register(IP0 will be scratched by trampoline.) Change-Id: I05ed9d418b01b9e87218a7608536f57e7a286e4c
|
9bacc074eebd36ae7248dbb641fa989067c74b19 |
|
05-Jun-2014 |
Christopher Ferris <cferris@google.com> |
Do not force unwind info to debug_frame. The .cfi_sections directive was forcing unwind information into the debug_frame, which is stripped out. This causes any unwinds done by libunwind/debuggerd through these art functions to terminate prematurely. Bug: 15350524 (cherry picked from commit cdb3fa5839f206383c7c20a29f5a3e7f5992aa04) Change-Id: I4c4b1093e99a54dda308508c2c4a0280696fdc6d
|
cdb3fa5839f206383c7c20a29f5a3e7f5992aa04 |
|
05-Jun-2014 |
Christopher Ferris <cferris@google.com> |
Do not force unwind info to debug_frame. The .cfi_sections directive was forcing unwind information into the debug_frame, which is stripped out. This causes any unwinds done by libunwind/debuggerd through these art functions to terminate prematurely. Bug: 15350524 Change-Id: Id6abe7c7106132083bc894a77564b652a08566cb
|
ffddfdf6fec0b9d98a692e27242eecb15af5ead2 |
|
03-Jun-2014 |
Tim Murray <timmurray@google.com> |
DO NOT MERGE Merge ART from AOSP to lmp-preview-dev. Change-Id: I0f578733a4b8756fd780d4a052ad69b746f687a9
|
48241e786121e1c4c050d9cfad3d22de270a3e75 |
|
23-May-2014 |
Zheng Xu <zheng.xu@arm.com> |
AArch64: Add suspend check in managed code. TODO: Remove x19 in the frame in runtime, generic jni, compiled jni. Change-Id: Ibdc292c9e7adb3a5d3eff353c22f60ffc101f549
|
5c1e4352614d61fed6868567e58b96682828cb4d |
|
22-Apr-2014 |
Andreas Gampe <agampe@google.com> |
Add "arch_test" gtest for assembly stub constants, add some ARM64 assembly code Add a test that (1) checks all callee-save method frame sizes for all architectures, (2) checks thread offsets for the runtime architecture and (3) checks callee-save method offsets for the runtime architecture. The "asm_support_XXX.h" files now only contain definitions that are common between all architectures. Architecture-specific definitions (i.e., special registers names) have been pushed into the corresponding .S file. This change was required to be able to undefine definitions in the test, so that multiple tests can be written in one file. Test (1) above is in a sense two-stage. The arch_test gtest compares constants (if it finds them) against the frame size as reported by the ArtMethods created by the Runtime. This works for all architectures as we can provide the instruction-set to CreateCalleeSaveMethod. The second stage of the "test" are preprocessor tests with "#error" in the case that the constants are not the expected value. Optimally I'd like to change that to an actual runtime test exercising the assembly code, which would also allow to check whether the right registers are stored. Also added missing assembly code for ARM64 for the callee-save macros. Also fix X86_64 compilation for Clang 3.5. Change-Id: I018e6433dffd3d31ba3bfcd75661653f4c7b6552
|
b95a5345ae4217b70ca36f0cced92f68dda7caf5 |
|
12-Mar-2014 |
Stuart Monteith <stuart.monteith@arm.com> |
AArch64: Add arm64 runtime support. Adds support for arm64 to ART. Assembler stubs are sufficient for down calls into interpreter. JNI compiler and generics are not finished. Basic Generic JNI functionality. Change-Id: I4a07c79d1e037b9f5746673480e32cf456867b82
|