History log of /external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
4c5e43da7792f75567b693105cc53e3f1992ad98 08-Apr-2015 Pirama Arumuga Nainar <pirama@google.com> Update aosp/master llvm for rebase to r233350

Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ebe69fe11e48d322045d5949c83283927a0d790b 23-Mar-2015 Stephen Hines <srhines@google.com> Update aosp/master LLVM for rebase to r230699.

Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
37ed9c199ca639565f6ce88105f9e39e898d82d0 01-Dec-2014 Stephen Hines <srhines@google.com> Update aosp/master LLVM for rebase to r222494.

Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c6a4f5e819217e1e12c458aed8e7b122e23a3a58 21-Jul-2014 Stephen Hines <srhines@google.com> Update LLVM for rebase to r212749.

Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls

Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
dce4a407a24b04eebc6a376f8e62b41aaa7b071f 29-May-2014 Stephen Hines <srhines@google.com> Update LLVM for 3.5 rebase (r209712).

Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
36b56886974eae4f9c5ebc96befd3e7bfe5de338 24-Apr-2014 Stephen Hines <srhines@google.com> Update to LLVM 3.5a.

Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2343e3b228c02896f4779962a91aaa659356fe2a 31-Oct-2013 Andrew Trick <atrick@apple.com> Lower stackmap intrinsics directly to their target opcode in the DAG builder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193769 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f9a5e40b90e5a98cfae5c0f8a42eedd71c849dbc 17-Oct-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> Replace sra with srl if a single sign bit is required

E.g. (and (sra (i32 x) 31) 2) -> (and (srl (i32 x) 30) 2).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192884 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5d7e93c0d44a96a416d2f1d1518954d8fed73f40 16-Oct-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> Handle (shl (anyext (shr ...))) in SimpilfyDemandedBits

This is really an extension of the current (shl (shr ...)) -> shl optimization.
The main difference is that certain upper bits must also not be demanded.

The motivating examples are the first two in the testcase, which occur
in llvmpipe output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192783 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
833a29c296da0a6af622448569dcbe01b5cae6c7 13-Oct-2013 Will Dietz <wdietz2@illinois.edu> TargetLowering: Don't index into empty string.

(This is triggered by current lit tests)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192549 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
828c9e73baacf0b0f68932718659681223b6b3c4 10-Oct-2013 Matt Arsenault <Matthew.Arsenault@amd.com> Use getPointerSizeInBits() rather than 8 * getPointerSize()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192386 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
12d43f9baf83b6a2cc444c89bb688ebfe01a9fa1 28-Sep-2013 Tom Stellard <thomas.stellard@amd.com> SelectionDAG: Try to expand all condition codes using getCCSwappedOperands()

This is useful for targets like R600, which only support GT, GE, NE, and EQ
condition codes as it removes the need to handle unsupported condition
codes in target specific code.

There are no tests with this commit, but R600 has been updated to take
advantage of this new feature, so its existing selectcc tests are now
testing the swapped operands path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191601 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
85509802eba15c82ff486f512a0b559699dc6999 25-Sep-2013 Eli Friedman <eli.friedman@gmail.com> Add missing check to SETCC optimization.

PR17338.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191337 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
a5eeb9da054bd76b38e18bedb9015bbaf20605e0 06-Sep-2013 Tim Northover <tnorthover@apple.com> SelectionDAG: create correct BooleanContent constants

Occasionally DAGCombiner can spot that a SETCC operation is completely
redundant and reduce it to "all true" or "all false". If this happens to a
vector, the value produced has to take account of what a normal comparison
would have produced, which may be an all-1s bitmask.

The fix in SelectionDAG.cpp is tested, however, as far as I can see the code in
TargetLowering.cpp is possibly unreachable and almost certainly irrelevant when
triggered so there are no tests. However, I believe it's still clearly the
right change and may save someone else some hassle if it suddenly becomes
reachable. So I'm doing it anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190147 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
3add0679d24a00c4a585809c6ce54486f6a458f5 13-Aug-2013 Michael Gottesman <mgottesman@apple.com> Update makeLibCall to return both the call and the chain associated with the libcall instead of just the call. This allows us to specify libcalls that return void.

LowerCallTo returns a pair with the return value of the call as the first
element and the chain associated with the return value as the second element. If
we lower a call that has a void return value, LowerCallTo returns an SDValue
with a NULL SDNode and the chain for the call. Thus makeLibCall by just
returning the first value makes it impossible for you to set up the chain so
that the call is not eliminated as dead code.

I also updated all references to makeLibCall to reflect the new return type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188300 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
155615d7dc4e4fbfd3b7273720a76356468edf46 08-Jul-2013 Stephen Lin <stephenwlin@gmail.com> Remove trailing whitespace from SelectionDAG/*.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185780 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5b3fca50a08865f0db55fc92ad1c037a04e12177 22-Jun-2013 Chad Rosier <mcrosier@apple.com> The getRegForInlineAsmConstraint function should only accept MVT value types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184642 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
a2f8d37fb791d197e7b0b8e6edfa6535f6b21602 09-Jun-2013 David Majnemer <david.majnemer@gmail.com> TargetLowering: Clean up method description comments


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183623 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ac6d9bec671252dd1e596fa71180ff6b39d06b5d 25-May-2013 Andrew Trick <atrick@apple.com> Track IR ordering of SelectionDAG nodes 2/4.

Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f19b8b018be4b0478f741bf35287db3488fda8d6 21-May-2013 Benjamin Kramer <benny.kra@googlemail.com> DAGCombine: Avoid an edge case where it tried to create an i0 type for (x & 0) == 0.

Fixes PR16083.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182357 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
225ed7069caae9ece32d8bd3d15c6e41e21cc04b 18-May-2013 Matt Arsenault <Matthew.Arsenault@amd.com> Add LLVMContext argument to getSetCCResultType

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182180 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8401ed21aa7c8ca022aad4b83fc9c63c0b824720 16-May-2013 Benjamin Kramer <benny.kra@googlemail.com> DAGCombine: Also shrink eq compares where the constant is exactly as large as the smaller type.

if ((x & 255) == 255)

before: movzbl %al, %eax
cmpl $255, %eax

after: cmpb $-1, %al

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182038 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
87d0b9ed1462705dd9bf1cb7f67d0bf03af776c8 12-Feb-2013 Guy Benyei <guy.benyei@intel.com> Add static cast to unsigned char whenever a character classification function is called with a signed char argument, in order to avoid assertions in Windows Debug configuration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175006 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1b0c54f1c5dd61e56cb7cbc435fcb3319cff628f 18-Jan-2013 Bill Wendling <isanbard@gmail.com> Use AttributeSet accessor methods instead of Attribute accessor methods.

Further encapsulation of the Attribute object. Don't allow direct access to the
Attribute object as an aggregate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172853 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8ecd3be1f3687222bfed627219844557024fcec1 11-Jan-2013 Benjamin Kramer <benny.kra@googlemail.com> Remove some accidentaly duplicated code. This needs urgent cleanup :(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172248 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
69e42dbd006c0afb732067ece7327988b1e24c01 11-Jan-2013 Benjamin Kramer <benny.kra@googlemail.com> Split TargetLowering into a CodeGen and a SelectionDAG part.

This fixes some of the cycles between libCodeGen and libSelectionDAG. It's still
a complete mess but as long as the edges consist of virtual call it doesn't
cause breakage. BasicTTI did static calls and thus broke some build
configurations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172246 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
fffe3634933471ee9805412ffa221080c9e9e8fd 11-Jan-2013 Eric Christopher <echristo@gmail.com> For inline asm:

- recognize string "{memory}" in the MI generation
- mark as mayload/maystore when there's a memory clobber constraint.

PR14859.

Patch by Krzysztof Parzyszek

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172228 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2c8cf4b404e549482f593f62f9e27e0bab4a8b3f 09-Jan-2013 Tim Northover <Tim.Northover@arm.com> Refactor to expose RTLIB calls to targets.

fp128 is almost but not quite completely illegal as a type on AArch64. As a
result it needs to have a register class (for argument passing mainly), but all
operations need to be lowered to runtime calls. Currently there's no way for
targets to do this (without duplicating code), as the relevant functions are
hidden in SelectionDAG. This patch changes that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171971 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
24d315dc053e8130593a8053bd6dc0245632f5f3 08-Jan-2013 Tim Northover <Tim.Northover@arm.com> Add fp128 rtlib function names to LLVM

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171867 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
aeef83c6afa1e18d1cf9d359cc678ca0ad556175 07-Jan-2013 Chandler Carruth <chandlerc@gmail.com> Switch TargetTransformInfo from an immutable analysis pass that requires
a TargetMachine to construct (and thus isn't always available), to an
analysis group that supports layered implementations much like
AliasAnalysis does. This is a pretty massive change, with a few parts
that I was unable to easily separate (sorry), so I'll walk through it.

The first step of this conversion was to make TargetTransformInfo an
analysis group, and to sink the nonce implementations in
ScalarTargetTransformInfo and VectorTargetTranformInfo into
a NoTargetTransformInfo pass. This allows other passes to add a hard
requirement on TTI, and assume they will always get at least on
implementation.

The TargetTransformInfo analysis group leverages the delegation chaining
trick that AliasAnalysis uses, where the base class for the analysis
group delegates to the previous analysis *pass*, allowing all but tho
NoFoo analysis passes to only implement the parts of the interfaces they
support. It also introduces a new trick where each pass in the group
retains a pointer to the top-most pass that has been initialized. This
allows passes to implement one API in terms of another API and benefit
when some other pass above them in the stack has more precise results
for the second API.

The second step of this conversion is to create a pass that implements
the TargetTransformInfo analysis using the target-independent
abstractions in the code generator. This replaces the
ScalarTargetTransformImpl and VectorTargetTransformImpl classes in
lib/Target with a single pass in lib/CodeGen called
BasicTargetTransformInfo. This class actually provides most of the TTI
functionality, basing it upon the TargetLowering abstraction and other
information in the target independent code generator.

The third step of the conversion adds support to all TargetMachines to
register custom analysis passes. This allows building those passes with
access to TargetLowering or other target-specific classes, and it also
allows each target to customize the set of analysis passes desired in
the pass manager. The baseline LLVMTargetMachine implements this
interface to add the BasicTTI pass to the pass manager, and all of the
tools that want to support target-aware TTI passes call this routine on
whatever target machine they end up with to add the appropriate passes.

The fourth step of the conversion created target-specific TTI analysis
passes for the X86 and ARM backends. These passes contain the custom
logic that was previously in their extensions of the
ScalarTargetTransformInfo and VectorTargetTransformInfo interfaces.
I separated them into their own file, as now all of the interface bits
are private and they just expose a function to create the pass itself.
Then I extended these target machines to set up a custom set of analysis
passes, first adding BasicTTI as a fallback, and then adding their
customized TTI implementations.

The fourth step required logic that was shared between the target
independent layer and the specific targets to move to a different
interface, as they no longer derive from each other. As a consequence,
a helper functions were added to TargetLowering representing the common
logic needed both in the target implementation and the codegen
implementation of the TTI pass. While technically this is the only
change that could have been committed separately, it would have been
a nightmare to extract.

The final step of the conversion was just to delete all the old
boilerplate. This got rid of the ScalarTargetTransformInfo and
VectorTargetTransformInfo classes, all of the support in all of the
targets for producing instances of them, and all of the support in the
tools for manually constructing a pass based around them.

Now that TTI is a relatively normal analysis group, two things become
straightforward. First, we can sink it into lib/Analysis which is a more
natural layer for it to live. Second, clients of this interface can
depend on it *always* being available which will simplify their code and
behavior. These (and other) simplifications will follow in subsequent
commits, this one is clearly big enough.

Finally, I'm very aware that much of the comments and documentation
needs to be updated. As soon as I had this working, and plausibly well
commented, I wanted to get it committed and in front of the build bots.
I'll be doing a few passes over documentation later if it sticks.

Commits to update DragonEgg and Clang will be made presently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171681 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0b8c9a80f20772c3793201ab5b251d3520b9cea3 02-Jan-2013 Chandler Carruth <chandlerc@gmail.com> Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.

There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.

The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.

I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).

I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8b62abdd7b9c8fc5d78dad86093f4afdfeba949d 30-Dec-2012 Bill Wendling <isanbard@gmail.com> Remove the Function::getRetAttributes method in favor of using the AttributeSet accessor method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171256 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c698d3a2a40f0909d16cbe857685f0f22cb9ae43 19-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change AsmOperandInfo::ConstraintVT to MVT, instead of EVT.

Accordingly, add MVT::getVT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170550 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ee211d2b8da98a549f7c68401aba866fa2a0eee2 19-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change a parameter of TargetLowering::getVectorTypeBreakdown to MVT,
from EVT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170536 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
dfcf33a287d1756721f1f735af687595ce2f5a21 19-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change TargetLowering::RegisterTypeForVT to contain MVTs, instead of
EVTs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170535 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ff01277841b824128c74cdb66f74d8082d75e3f6 19-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change TargetLowering::TransformToType to contain MVTs, instead of
EVTs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170534 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0340557fb830e3669c4c48a2cd99d7703bdda452 19-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change TargetLowering::findRepresentativeClass to take an MVT, instead
of EVT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170532 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
fdbeb057b8a844b641f323fd27a61ffcb32b43da 19-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change TargetLowering::isCondCodeLegal to take an MVT, instead of EVT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170524 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9c5ab9355e00686e120e12952908ea8ad981d776 19-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change TargetLowering::getCondCodeAction to take an MVT, instead of
EVT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170522 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
bf5a2c6a39f2a98a83f5fb668b8b35156b693471 19-Dec-2012 Nadav Rotem <nrotem@apple.com> After reducing the size of an operation in the DAG we zero-extend the reduced
bitwidth op back to the original size. If we reduce ANDs then this can cause
an endless loop. This patch changes the ZEXT to ANY_EXTEND if the demanded bits
are equal or smaller than the size of the reduced operation.



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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
034b94b17006f51722886b0f2283fb6fb19aca1f 19-Dec-2012 Bill Wendling <isanbard@gmail.com> Rename the 'Attributes' class to 'Attribute'. It's going to represent a single attribute in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170502 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
85022561f9c78446bbc5f745cd9b58f4e5dc92ec 19-Dec-2012 Craig Topper <craig.topper@gmail.com> Remove more of 'else's after 'returns'. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170497 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
a1b3c03777f33665d6a70607610ee80e47a40c63 19-Dec-2012 Craig Topper <craig.topper@gmail.com> Remove a bunch of 'else's after 'returns'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170496 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
40b4a81ab007c11c2d4227b4f6a949720ba2adff 19-Dec-2012 Craig Topper <craig.topper@gmail.com> Teach SimplifySetCC that comparing AssertZext i1 against a constant 1 can be rewritten as a compare against a constant 0 with the opposite condition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170495 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ca2dd36c395f5ead63572d45a2106b9d34d8ca90 18-Dec-2012 Hal Finkel <hfinkel@anl.gov> Check multiple register classes for inline asm tied registers

A register can be associated with several distinct register classes.
For example, on PPC, the floating point registers are each associated with
both F4RC (which holds f32) and F8RC (which holds f64). As a result, this code
would fail when provided with a floating point register and an f64 operand
because it would happen to find the register in the F4RC class first and
return that. From the F4RC class, SDAG would extract f32 as the register
type and then assert because of the invalid implied conversion between
the f64 value and the f32 register.

Instead, search all register classes. If a register class containing the
the requested register has the requested type, then return that register
class. Otherwise, as before, return the first register class found that
contains the requested register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170436 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
009e1e21d4e4d26d4aeaeeb5063c0b4470572ef7 13-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change TargetLowering::setTypeAction to take an MVT, instead fo EVT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170148 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
34525f9ac098c1c6bc9002886d6da3039a284fd2 11-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Revert EVT->MVT changes, r169836-169851, due to buildbot failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169854 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1d367e9bccf1f374a92c4337251ea541118fdcc9 11-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change a parameter of TargetLowering::getVectorTypeBreakdown to MVT,
from EVT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169849 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2d916231ff503b995bf3b65a338c9bf0d84ee7c7 11-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change TargetLowering::RegisterTypeForVT to contain MVTs, instead of
EVTs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169848 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
235c75cc2190c40f5785059ec1767e44da5c5401 11-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change TargetLowering::TransformToType to contain MVTs, instead of
EVTs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169847 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
bade0345d190427a08b2b947bc94f4d8ca5d7717 11-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change TargetLowering::findRepresentativeClass to take an MVT, instead
of EVT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169845 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
204301f0459c1deb6c535723760c848ba2fcd42b 11-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change TargetLowering::isCondCodeLegal to take an MVT, instead of EVT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169843 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
aff674331ebb54e74baa88532ee587d741a430a2 11-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change TargetLowering::getCondCodeAction to take an MVT, instead of
EVT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169842 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
968947766b17bc1a6f27e556f9f340de2504e92d 11-Dec-2012 Patrik Hagglund <patrik.h.hagglund@ericsson.com> Change TargetLowering::setTypeAction to take an MVT, instead fo EVT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169839 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9171fb9cfb25b2e2db64131c15b497de459f69fc 10-Dec-2012 Eric Christopher <echristo@gmail.com> Fix a coding style nit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169776 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2766a47310b05228e9bbc536d9f3a593fc31cd12 06-Dec-2012 Evan Cheng <evan.cheng@apple.com> Replace r169459 with something safer. Rather than having computeMaskedBits to
understand target implementation of any_extend / extload, just generate
zero_extend in place of any_extend for liveouts when the target knows the
zero_extend will be implicit (e.g. ARM ldrb / ldrh) or folded (e.g. x86 movz).

rdar://12771555


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169536 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8a7186dbc2df4879f511b2ae6f2bce25ad37d965 06-Dec-2012 Evan Cheng <evan.cheng@apple.com> Let targets provide hooks that compute known zero and ones for any_extend
and extload's. If they are implemented as zero-extend, or implicitly
zero-extend, then this can enable more demanded bits optimizations. e.g.

define void @foo(i16* %ptr, i32 %a) nounwind {
entry:
%tmp1 = icmp ult i32 %a, 100
br i1 %tmp1, label %bb1, label %bb2
bb1:
%tmp2 = load i16* %ptr, align 2
br label %bb2
bb2:
%tmp3 = phi i16 [ 0, %entry ], [ %tmp2, %bb1 ]
%cmp = icmp ult i16 %tmp3, 24
br i1 %cmp, label %bb3, label %exit
bb3:
call void @bar() nounwind
br label %exit
exit:
ret void
}

This compiles to the followings before:
push {lr}
mov r2, #0
cmp r1, #99
bhi LBB0_2
@ BB#1: @ %bb1
ldrh r2, [r0]
LBB0_2: @ %bb2
uxth r0, r2
cmp r0, #23
bhi LBB0_4
@ BB#3: @ %bb3
bl _bar
LBB0_4: @ %exit
pop {lr}
bx lr

The uxth is not needed since ldrh implicitly zero-extend the high bits. With
this change it's eliminated.

rdar://12771555


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169459 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d04a8d4b33ff316ca4cf961e06c9e312eff8e64f 03-Dec-2012 Chandler Carruth <chandlerc@gmail.com> Use the new script to sort the includes of every file under lib.

Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
3d200255d5b93344c1ab0a5ba4b47a52cfa5893e 29-Nov-2012 Justin Holewinski <jholewinski@nvidia.com> Allow targets to prefer TypeSplitVector over TypePromoteInteger when computing the legalization method for vectors

For some targets, it is desirable to prefer scalarizing <N x i1> instead of promoting to a larger legal type, such as <N x i32>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168882 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d5f03186e5b5c20225ba05d4506100ad763c79a1 23-Nov-2012 Patrik Hägglund <patrik.h.hagglund@ericsson.com> Cleanup: Simplify loop end logic in computeRegisterProperties().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168507 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0a1544d2fd63d8101dc7d50974e65c95a0f6f98d 02-Nov-2012 Manman Ren <mren@apple.com> OutputArg: added an index of the original argument to match the change to
InputArg in r165616.

This will enable us to get the actual type for both InputArg and OutputArg.

rdar://9932559


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167265 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
970755e5197afb42a76a24a74cd6dc17721daf50 19-Oct-2012 Shuxin Yang <shuxin.llvm@gmail.com> This patch is to fix radar://8426430. It is about llvm support of __builtin_debugtrap()
which is supposed to consistently raise SIGTRAP across all systems. In contrast,
__builtin_trap() behave differently on different systems. e.g. it raises SIGTRAP on ARM, and
SIGILL on X86. The purpose of __builtin_debugtrap() is to consistently provide "trap"
functionality, in the mean time preserve the compatibility with on gcc on __builtin_trap().

The X86 backend is already able to handle debugtrap(). This patch is to:
1) make front-end recognize "__builtin_debugtrap()" (emboddied in the one-line change to Clang).
2) In DAG legalization phase, by default, "debugtrap" will be replaced with "trap", which
make the __builtin_debugtrap() "available" to all existing ports without the hassle of
changing their code.
3) If trap-function is specified (via -trap-func=xyz to llc), both __builtin_debugtrap() and
__builtin_trap() will be expanded into the function call of the specified trap function.
This behavior may need change in the future.

The provided testing-case is to make sure 2) and 3) are working for ARM port, and we
already have a testing case for x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166300 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7d661468682c333739a6f6ab7dc337463573c354 09-Oct-2012 Micah Villmow <villmow@gmail.com> Add in the first step of the multiple pointer support. This adds in support to the data layout for specifying a per address space pointer size.
The next step is to update the optimizers to allow them to optimize the different address spaces with this information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165505 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
6765834754cbb3cb0f15b4b15e98c5e73fa50066 09-Oct-2012 Bill Wendling <isanbard@gmail.com> Create enums for the different attributes.

We use the enums to query whether an Attributes object has that attribute. The
opaque layer is responsible for knowing where that specific attribute is stored.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165488 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
3574eca1b02600bac4e625297f4ecf745f4c4f32 08-Oct-2012 Micah Villmow <villmow@gmail.com> Move TargetData to DataLayout.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165402 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
94c22716d60ff5edf6a98a3c67e0faa001be1142 27-Sep-2012 Sylvestre Ledru <sylvestre@debian.org> Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164768 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7e2c793a2b5c746344652b6579e958ee42fafdcc 27-Sep-2012 Sylvestre Ledru <sylvestre@debian.org> Fix a typo 'iff' => 'if'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164767 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1a37d7e807ad6cc71fe3cffdf6674644c46a60eb 25-Sep-2012 Sebastian Pop <spop@codeaurora.org> TargetLowering interface to set/get minimum block entries for jump tables.

Provide interface in TargetLowering to set or get the minimum number of basic
blocks whereby jump tables are generated for switch statements rather than an
if sequence.

getMinimumJumpTableEntries() defaults to 4.
setMinimumJumpTableEntries() allows target configuration.

This patch changes the default for the Hexagon architecture to 5
as it improves performance on some benchmarks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164628 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e853d2e2508e21b5c3156c7d8b6e6902a7d2604a 20-Sep-2012 Bill Wendling <isanbard@gmail.com> Add predicates for queries on whether an attribute exists.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164264 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e757640df0615510dbc42921cf6271aa76c405ee 06-Sep-2012 Nadav Rotem <nrotem@apple.com> Fix a few old-GCC warnings. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163309 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
59324297650c12a8dccf1a7ad650a9e895fdc17e 06-Sep-2012 Roman Divacky <rdivacky@freebsd.org> Stop casting away const qualifier needlessly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163258 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2e2efd960056bbb7e4bbd843c8de55116d52aa7d 04-Sep-2012 Preston Gurd <preston.gurd@intel.com> Generic Bypass Slow Div
- CodeGenPrepare pass for identifying div/rem ops
- Backend specifies the type mapping using addBypassSlowDivType
- Enabled only for Intel Atom with O2 32-bit -> 8-bit
- Replace IDIV with instructions which test its value and use DIVB if the value
is positive and less than 256.
- In the case when the quotient and remainder of a divide are used a DIV
and a REM instruction will be present in the IR. In the non-Atom case
they are both lowered to IDIVs and CSE removes the redundant IDIV instruction,
using the quotient and remainder from the first IDIV. However,
due to this optimization CSE is not able to eliminate redundant
IDIV instructions because they are located in different basic blocks.
This is overcome by calculating both the quotient (DIV) and remainder (REM)
in each basic block that is inserted by the optimization and reusing the result
values when a subsequent DIV or REM instruction uses the same operands.
- Test cases check for the presents of the optimization when calculating
either the quotient, remainder, or both.

Patch by Tyler Nowicki!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163150 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b97cebdfcc4d76835961038b79e605b167bd8cc5 17-Aug-2012 Benjamin Kramer <benny.kra@googlemail.com> TargetLowering: Use the large shift amount during legalize types. The legalizer may call us with an overly large type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162101 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8c574be2fec59a3d80e400a9a0409b28f7f34829 31-Jul-2012 Micah Villmow <villmow@gmail.com> Conform to LLVM coding style.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161061 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
683826765c45d7acd19e915a73b8c1b46c40a4eb 31-Jul-2012 Micah Villmow <villmow@gmail.com> Don't generate ordered or unordered comparison operations if it is not legal to do so.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161053 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
96cb1128528a512f1ef9c28ae5e1b78a98dcc505 19-Jul-2012 Bill Wendling <isanbard@gmail.com> Remove tabs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160475 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f5c0539092996771824893309f311378e719e32e 17-Jul-2012 Evan Cheng <evan.cheng@apple.com> Implement r160312 as target indepedenet dag combine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160354 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b4d4959fdda7afdf7994d3cb0b20c052ad0c7895 17-Jul-2012 Evan Cheng <evan.cheng@apple.com> Make sure constant bitwidth is <= 64 bit before calling getSExtValue().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160350 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
70e10d3fe4c5df189348f64fce56254a5a32b51c 17-Jul-2012 Evan Cheng <evan.cheng@apple.com> This is another case where instcombine demanded bits optimization created
large immediates. Add dag combine logic to recover in case the large
immediates doesn't fit in cmp immediate operand field.

int foo(unsigned long l) {
return (l>> 47) == 1;
}

we produce

%shr.mask = and i64 %l, -140737488355328
%cmp = icmp eq i64 %shr.mask, 140737488355328
%conv = zext i1 %cmp to i32
ret i32 %conv

which codegens to

movq $0xffff800000000000,%rax
andq %rdi,%rax
movq $0x0000800000000000,%rcx
cmpq %rcx,%rax
sete %al
movzbl %al,%eax
ret

TargetLowering::SimplifySetCC would transform
(X & -256) == 256 -> (X >> 8) == 1
if the immediate fails the isLegalICmpImmediate() test. For x86,
that's immediates which are not a signed 32-bit immediate.

Based on a patch by Eli Friedman.

PR10328
rdar://9758774


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160346 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
483c54b811badbfcaa040cdb6d84cf564afe75cf 05-Jul-2012 Duncan Sands <baldrick@free.fr> All cases are covered, no need for a default. This deals with the
corresponding clang warning.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e7de3b29f79b147a8f06e6edff0c54149d638139 05-Jul-2012 Duncan Sands <baldrick@free.fr> Use the right kind of booleans: we were emitting 0/1 booleans, instead of 0/-1
booleans. Patch by James Benton.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
769951f6cc6323821ce1e9f46a37817a541c884f 03-Jul-2012 Evan Cheng <evan.cheng@apple.com> Target option DisableJumpTables is a gross hack. Move it to TargetLowering instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159611 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
fcb2c3cf5e8ee421fd3a5639cc4a33036e9a614e 04-Jun-2012 Nadav Rotem <nadav.rotem@intel.com> Remove the "-promote-elements" flag. This flag is now enabled by default.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157925 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d9b0b025612992a0b724eeca8bdf10b1d7a5c355 02-Jun-2012 Benjamin Kramer <benny.kra@googlemail.com> Fix typos found by http://github.com/lyda/misspell-check

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2db0e9ebb600a2e6b8f651f66a1ef50e0d3c3c6b 25-May-2012 Eli Friedman <eli.friedman@gmail.com> Simplify code for calling a function where CanLowerReturn fails, fixing a small bug in the process.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157446 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
aaf723dd2bccc052d2dd28e3cc4db76f2a3e2fb0 05-May-2012 Benjamin Kramer <benny.kra@googlemail.com> Add a new target hook "predictableSelectIsExpensive".

This will be used to determine whether it's profitable to turn a select into a
branch when the branch is likely to be predicted.

Currently enabled for everything but Atom on X86 and Cortex-A9 devices on ARM.

I'm not entirely happy with the name of this flag, suggestions welcome ;)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156233 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7fc4d9cbc54c2e5393440a40b566c1f0527d8037 05-May-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Make sure findRepresentativeClass picks the widest super-register.

We want the representative register class to contain the largest
super-registers available. This makes the function less sensitive to the
register class numbering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156220 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e3ee49fb2728dcb9702b5be0c3c80f472ffccefc 04-May-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Use SuperRegClassIterator for findRepresentativeClass().

The masks returned by SuperRegClassIterator are computed automatically
by TableGen. This is better than depending on the manually specified
SuperRegClasses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156147 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
db3461662e7945e04fe42e0d606581bba73c29dc 21-Apr-2012 Nadav Rotem <nadav.rotem@intel.com> Teach getVectorTypeBreakdown about promotion of vectors in addition to widening of vectors.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155296 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d16ce17711e8e6231363fe1fd47800570b75d61d 18-Apr-2012 Joel Jones <joel_k_jones@apple.com> Fixes a problem in instruction selection with testing whether or not the
transformation:

(X op C1) ^ C2 --> (X op C1) & ~C2 iff (C1&C2) == C2

should be done.

This change has been tested:
Using a debug+asserts build:
on the specific test case that brought this bug to light
make check-all
lnt nt
using this clang to build a release version of clang
Using the release+asserts clang-with-clang build:
on the specific test case that brought this bug to light
make check-all
lnt nt

Checking in because Evan wants it checked in. Test case forthcoming after
scrubbing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154955 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
787c3fd385834db61bd955dcc40fb02b77c183a9 09-Apr-2012 Akira Hatanaka <ahatanaka@mips.com> Have TargetLowering::getPICJumpTableRelocBase return a node that points to the
GOT if jump table uses 64-bit gp-relative relocation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154341 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
34797136cb9fa9f450c0e1c47983482083979dd4 08-Apr-2012 Chandler Carruth <chandlerc@gmail.com> Move the TLSModel information into the TargetMachine rather than hiding
in TargetLowering. There was already a FIXME about this location being
odd. The interface is simplified as a consequence. This will also make
it easier to change TLS models when compiling with PIE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154292 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
740cd657f3d9d4e88614831c70a649f9257164da 05-Apr-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Don't break the IV update in TLI::SimplifySetCC().

LSR always tries to make the ICmp in the loop latch use the incremented
induction variable. This allows the induction variable to be kept in a
single register.

When the induction variable limit is equal to the stride,
SimplifySetCC() would break LSR's hard work by transforming:

(icmp (add iv, stride), stride) --> (cmp iv, 0)

This forced us to use lea for the IC update, preventing the simpler
incl+cmp.

<rdar://problem/7643606>
<rdar://problem/11184260>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154119 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
26c8dcc692fb2addd475446cfff24d6a4e958bca 04-Apr-2012 Rafael Espindola <rafael.espindola@gmail.com> Always compute all the bits in ComputeMaskedBits.
This allows us to keep passing reduced masks to SimplifyDemandedBits, but
know about all the bits if SimplifyDemandedBits fails. This allows instcombine
to simplify cases like the one in the included testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154011 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8d41a1a7e68164d36d5332aa82d871902000db5b 04-Apr-2012 Craig Topper <craig.topper@gmail.com> Remove default case from switch that was already covering all cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153996 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9dbb018b36d37d9676fe70ac5d928e69ae01b7fb 03-Apr-2012 Chad Rosier <mcrosier@apple.com> Fix an issue in SimplifySetCC() specific to vector comparisons.

When folding X == X we need to check getBooleanContents() to determine if the
result is a vector of ones or a vector of negative ones.

I tried creating a test case, but the problem seems to only be exposed on a
much older version of clang (around r144500).
rdar://10923049


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153966 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d49db36badcfa29022b99325135c3ca429150be0 31-Jan-2012 Eli Friedman <eli.friedman@gmail.com> Use the correct ShiftAmtTy for creating shifts after legalization. PR11881. Not committing a testcase because I think it will be too fragile.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149315 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
810d6d3354a31f24125abef831e4afccbbbe973d 16-Jan-2012 David Blaikie <dblaikie@gmail.com> Refactor variables unused under non-assert builds (& remove two entirely unused variables).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148230 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
cc6165695fa1713230184d743368b8b3642faa5d 15-Jan-2012 Nadav Rotem <nadav.rotem@intel.com> [AVX] Optimize x86 VSELECT instructions using SimplifyDemandedBits.
We know that the blend instructions only use the MSB, so if the mask is
sign-extended then we can convert it into a SHL instruction. This is a
common pattern because the type-legalizer sign-extends the i1 type which
is used by the LLVM-IR for the condition.

Added a new optimization in SimplifyDemandedBits for SIGN_EXTEND_INREG -> SHL.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148225 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
732f05c41f177a0bc4d47e93a5d02120f146cb4c 10-Jan-2012 Chandler Carruth <chandlerc@gmail.com> Add 'llvm_unreachable' to passify GCC's understanding of the constraints
of several newly un-defaulted switches. This also helps optimizers
(including LLVM's) recognize that every case is covered, and we should
assume as much.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147861 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2bd335470f8939782f3df7f6180282d3825d4f09 10-Jan-2012 David Blaikie <dblaikie@gmail.com> Remove unnecessary default cases in switches that cover all enum values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147855 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e3376ecd504300ae529c902135f51baffbdc2824 20-Dec-2011 Dan Gohman <gohman@apple.com> Add basic generic CodeGen support for half.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146927 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ca072a39778933df4264ae393bd0ca797db59df6 15-Dec-2011 Eli Friedman <eli.friedman@gmail.com> Don't try to form FGETSIGN after legalization; it is possible in some cases, but the existing code can't do it correctly. PR11570.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146630 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2dd0353fec61b412e521013049d6a03de29aa8c7 09-Dec-2011 Eli Friedman <eli.friedman@gmail.com> Fix a couple of logic bugs in TargetLowering::SimplifyDemandedBits. PR11514.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146219 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
4a4fdf3476473021f62d5b02e8ee8802f5b25e5a 08-Dec-2011 Owen Anderson <resistor@mac.com> Teach SelectionDAG to match more calls to libm functions onto existing SDNodes. Mark these nodes as illegal by default, unless the target declares otherwise.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146171 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0948f0acca745eef8db6922edfd8836f717396b4 09-Nov-2011 Eli Friedman <eli.friedman@gmail.com> Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144216 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d752e0f7e64585839cb3a458ef52456eaebbea3c 08-Nov-2011 Pete Cooper <peter_cooper@apple.com> Added invariant field to the DAG.getLoad method and changed all calls.

When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144100 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
19a4daff9bbe18dab2620e25ac6cbf0635639ec6 07-Nov-2011 Richard Osborne <richard@xmos.com> Don't introduce custom nodes after legalization in TargetLowering::BuildSDIV()
and TargetLowering::BuildUDIV(). Fixes PR11283


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143964 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8c2d270ae8b460912633883f24346c0763373a56 24-Oct-2011 Dan Gohman <gohman@apple.com> Change the default scheduler from Latency to ILP, since Latency
is going away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142810 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8fb06b3e8f7fc92e472e17fecf5ee3ba44fbb6ab 16-Oct-2011 Nadav Rotem <nadav.rotem@intel.com> Enable element promotion type legalization by deafault.
Changed tests which assumed that vectors are legalized by widening them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142152 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
312b7c950a27f72a811b3fdbed26e2e08eb20c31 14-Oct-2011 Jim Grosbach <grosbach@apple.com> Fix typo. "__sync_fetch_and-xor_4" should be "__sync_fetch_and_xor_4".

Pointed out by George Russell.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141956 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
22e8a366adf5a4c78148928ff64e7e00c1088492 12-Oct-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Use an existing function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141763 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
28b77e968d2b01fc9da724762bd8ddcd80650e32 06-Sep-2011 Duncan Sands <baldrick@free.fr> Add codegen support for vector select (in the IR this means a select
with a vector condition); such selects become VSELECT codegen nodes.
This patch also removes VSETCC codegen nodes, unifying them with SETCC
nodes (codegen was actually often using SETCC for vector SETCC already).
This ensures that various DAG combiner optimizations kick in for vector
comparisons. Passes dragonegg bootstrap with no testsuite regressions
(nightly testsuite as well as "make check-all"). Patch mostly by
Nadav Rotem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7ab15f6d4b9b9fd03c8ab6327ac2b1b3c4b4d04b 03-Sep-2011 Owen Anderson <resistor@mac.com> Fix a truly heinous bug in DAGCombine related to AssertZext.
If we have a chain of zext -> assert_zext -> zext -> use, the first zext would get simplified away because of the later zext, and then the later zext would get simplified away because of the assert. The solution is to teach SimplifyDemandedBits that assert_zext demands all of the high bits of its input, rather than only those demanded by its users. No testcase because the only example I have manifests as llvm-gcc miscompiling LLVM, and I haven't found a smaller case that reproduces this problem.
Fixes <rdar://problem/10063365>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139059 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
26689ac37ebec3b358588089415509285e558de9 03-Aug-2011 Eli Friedman <eli.friedman@gmail.com> New approach to r136737: insert the necessary fences for atomic ops in platform-independent code, since a bunch of platforms (ARM, Mips, PPC, Alpha are the relevant targets here) need to do essentially the same thing.

I think this completes the basic CodeGen for atomicrmw and cmpxchg.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136813 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
db125cfaf57cc83e7dd7453de2d509bc8efd0e5e 18-Jul-2011 Chris Lattner <sabre@nondot.org> land David Blaikie's patch to de-constify Type, with a few tweaks.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135375 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5427edeb68d653ced860ed14f83848ebbb01b64b 14-Jul-2011 Eric Christopher <echristo@apple.com> Check register class matching instead of width of type matching
when determining validity of matching constraint. Allow i1
types access to the GR8 reg class for x86.

Fixes PR10352 and rdar://9777108

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135180 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
33390848a7eca75301d04a59b89b516d83e19ee0 08-Jul-2011 Cameron Zwarich <zwarich@apple.com> Add an intrinsic and codegen support for fused multiply-accumulate. The intent
is to use this for architectures that have a native FMA instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9c64030445cbe6ac486b90c5f459f91e06770474 08-Jul-2011 Benjamin Kramer <benny.kra@googlemail.com> Emit a more efficient magic number multiplication for exact sdivs.

We have to do this in DAGBuilder instead of DAGCombiner, because the exact bit is lost after building.

struct foo { char x[24]; };
long bar(struct foo *a, struct foo *b) { return a-b; }
is now compiled into
movl 4(%esp), %eax
subl 8(%esp), %eax
sarl $3, %eax
imull $-1431655765, %eax, %eax
instead of
movl 4(%esp), %eax
subl 8(%esp), %eax
movl $715827883, %ecx
imull %ecx
movl %edx, %eax
shrl $31, %eax
sarl $2, %edx
addl %eax, %edx
movl %edx, %eax

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134695 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
09ad0b6894ae4eab9837970ccd4574681097eb6e 08-Jul-2011 Eric Christopher <echristo@apple.com> Remove a FIXME. All of the standard ones are in the list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134647 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5244c4cc2fd31e49bae2b192bd824a94b6ad5331 30-Jun-2011 Eric Christopher <echristo@apple.com> Remove getRegClassForInlineAsmConstraint and all dependencies.

Fixes rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134123 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
362fee90b9a1d64ac091755466caf6a94ade22eb 17-Jun-2011 Eric Christopher <echristo@apple.com> Lower multiply with overflow checking to __mulo<mode>
calls if we haven't been able to lower them any
other way.

Fixes rdar://9090077 and rdar://9210061


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133288 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0c3e67860af417febb1fa9e870ece912a16085ac 12-Jun-2011 Nadav Rotem <nadav.rotem@intel.com> Fix a bug in the calculation of the vectorTypeBreakdown into registers. Odd
types such as i33 were rounded to i32. Originated from Duncan's testcase.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132893 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8c1ec5a0a21dcb3364aace8174f29f209ff3224e 11-Jun-2011 Chad Rosier <mcrosier@apple.com> Revert r132871.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132872 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e4c705667b9c5eae973e1bc0d7fd2ca995260701 11-Jun-2011 Chad Rosier <mcrosier@apple.com> Typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132871 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
57f1fde7fcda84a7e1d7490163fbad18c3755d40 06-Jun-2011 Stuart Hastings <stuart@apple.com> Avoid FGETSIGN of 80-bit types. Fixes PR10085.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132681 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f1c025d1d106905df3d38d2482fde68c8f81b107 04-Jun-2011 Nadav Rotem <nadav.rotem@intel.com> TypeLegalizer: Fix a bug in the promotion of elements of integer vectors.
(only happens when using the -promote-elements option).

The correct legalization order is to first try to promote element. Next, we try
to widen vectors.





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132648 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
100c83341676d8aae8fc34b5452563ed08b14f3e 03-Jun-2011 Eric Christopher <echristo@apple.com> Have LowerOperandForConstraint handle multiple character constraints.

Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132510 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
251b4a04057a8397791ad3924377888fe4f8a2ad 02-Jun-2011 Rafael Espindola <rafael.espindola@gmail.com> Revert 132424 to fix PR10068.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132479 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ec880283b3682982c750c9b78f6a9b4777e21883 01-Jun-2011 Stuart Hastings <stuart@apple.com> Recommit 132404 with fixes. rdar://problem/5993888


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132424 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
090bf19de6e7c75fbf34e753f5e0ad58cc2ca15c 01-Jun-2011 Stuart Hastings <stuart@apple.com> Fix double FGETSIGN to work on x86_32; followup to 132396.
rdar://problem/5660695


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132411 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
bdce3726e2131f053d05f07ff135684ad6f11d80 01-Jun-2011 Stuart Hastings <stuart@apple.com> Turn on FGETSIGN for x86. Followup to 132388. rdar://problem/5660695


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132396 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b6fbec3a546fd04bb2e79040db2436b0bd629162 01-Jun-2011 Nadav Rotem <nadav.rotem@intel.com> This patch is another step in the direction of adding vector select. In this
patch we add a flag to enable a new type legalization decision - to promote
integer elements in vectors. Currently, the rest of the codegen does not support
this kind of legalization. This flag will be removed when the transition is
complete.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132394 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b6aacae9413adde66d9686cd9e561eb836b3ee34 28-May-2011 Nadav Rotem <nadav.rotem@intel.com> Refactor the type legalizer. Switch TargetLowering to a new enum - LegalizeTypeAction.
This patch does not change the behavior of the type legalizer. The codegen
produces the same code.
This infrastructural change is needed in order to enable complex decisions
for vector types (needed by the vector-select patch).




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132263 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2d6dcb34b7f39682f3eed08180631189fb4b6636 27-May-2011 Nadav Rotem <nadav.rotem@intel.com> Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place. Re-apply 131534 and fix the multi-step promotion of integers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132217 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
3dfc4b12229acafee5c69c5ee1673b08027f0438 19-May-2011 Stuart Hastings <stuart@apple.com> Update some currently-disabled code, preparing for eventual use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131663 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d6dde76090dd673a673ce363c982c22ea924502a 18-May-2011 Duncan Sands <baldrick@free.fr> Revert commit 131534 since it seems to have broken several buildbots.
Original log entry:
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131536 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
fe3f5d7538954474731dbbed70430016600fa477 18-May-2011 Nadav Rotem <nadav.rotem@intel.com> Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131534 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
cef81b7e519764c6a008a689bc4c6dfc9119f8e9 09-May-2011 Eric Christopher <echristo@apple.com> Look through struct wrapped types for inline asm statments.

Patch by Evan Cheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131093 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
fc5d305597ea6336d75bd7f3b741e8d57d6a5105 06-May-2011 Eli Friedman <eli.friedman@gmail.com> Make the logic for determining function alignment more explicit. No functionality change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131012 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e7cf062537e898f830565db5dbf99ae9c928399e 22-Apr-2011 Benjamin Kramer <benny.kra@googlemail.com> DAGCombine: fold "(zext x) == C" into "x == (trunc C)" if the trunc is lossless.

On x86 this allows to fold a load into the cmp, greatly reducing register pressure.
movzbl (%rdi), %eax
cmpl $47, %eax
->
cmpb $47, (%rdi)

This shaves 8k off gcc.o on i386. I'll leave applying the patch in README.txt to Chris :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130005 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7a2bdde0a0eebcd2125055e0eacaca040f0b766c 15-Apr-2011 Chris Lattner <sabre@nondot.org> Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c0c7fca2fedd2259569b7b84338259c62d38802d 14-Apr-2011 Chris Lattner <sabre@nondot.org> sink a call into its only use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129503 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7adf862eb24f7c6cbf12fbc9e3e8229f6f863b8a 14-Apr-2011 Owen Anderson <resistor@mac.com> During post-legalization DAG combining, be careful to only create shifts where the RHS is of the legal type for the new operation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129484 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8e23e815ad1136721acdfcce76975a37c8a2c036 01-Apr-2011 Evan Cheng <evan.cheng@apple.com> Issue libcalls __udivmod*i4 / __divmod*i4 for div / rem pairs.

rdar://8911343


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128696 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1c10b8de46ce8e39178eeded4786b1e53722f099 17-Mar-2011 Benjamin Kramer <benny.kra@googlemail.com> BuildUDIV: If the divisor is even we can simplify the fixup of the multiplied value by introducing an early shift.

This allows us to compile "unsigned foo(unsigned x) { return x/28; }" into
shrl $2, %edi
imulq $613566757, %rdi, %rax
shrq $32, %rax
ret

instead of
movl %edi, %eax
imulq $613566757, %rax, %rcx
shrq $32, %rcx
subl %ecx, %eax
shrl %eax
addl %ecx, %eax
shrl $4, %eax

on x86_64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127829 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
95771afbfd604ad003fa3723cac66c9370fed55d 25-Feb-2011 Owen Anderson <resistor@mac.com> Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126518 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0a9481f44fe4fc76e59109992940a76b2a3f9b3b 13-Feb-2011 Chris Lattner <sabre@nondot.org> Enhance ComputeMaskedBits to know that aligned frameindexes
have their low bits set to zero. This allows us to optimize
out explicit stack alignment code like in stack-align.ll:test4 when
it is redundant.

Doing this causes the code generator to start turning FI+cst into
FI|cst all over the place, which is general goodness (that is the
canonical form) except that various pieces of the code generator
don't handle OR aggressively. Fix this by introducing a new
SelectionDAG::isBaseWithConstantOffset predicate, and using it
in places that are looking for ADD(X,CST). The ARM backend in
particular was missing a lot of addressing mode folding opportunities
around OR.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125470 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c9b6a3eb90c5e0f6460632a443591068522537e2 17-Jan-2011 Benjamin Kramer <benny.kra@googlemail.com> Fix an off-by-one error in ctpop combining.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123664 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d8228924556d3c465da5b858c620b29fd1cf298e 17-Jan-2011 Benjamin Kramer <benny.kra@googlemail.com> Add a DAGCombine to turn (ctpop x) u< 2 into (x & x-1) == 0.

This shaves off 4 popcounts from the hacked 186.crafty source.

This is enabled even when a native popcount instruction is available. The
combined code is one operation longer but it should be faster nevertheless.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123621 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
97fd9a58de3c99a74b0890a908430fa3ab894bed 10-Jan-2011 Dale Johannesen <dalej@apple.com> Fix PR 8916 (qv for analysis), at least the immediate problem.

There's an inherent tension in DAGCombine between assuming
that things will be put in canonical form, and the Depth
mechanism that disables transformations when recursion gets
too deep. It would not surprise me if there's a lot of little
bugs like this one waiting to be discovered. The mechanism
seems fragile and I'd suggest looking at it from a design viewpoint.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123191 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0521928ae7cc492f3f45ef0e0cedc349102489c5 06-Jan-2011 Evan Cheng <evan.cheng@apple.com> Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpy
etc. takes an option OptSize. If OptSize is true, it would return
the inline limit for functions with attribute OptSize.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122952 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
476b242fe7a61e5f9ac6214b0bc5c680d24f152e 19-Dec-2010 Nick Lewycky <nicholas@mxc.ca> Add missing standard headers. Patch by Joerg Sonnenberger!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
40f8f6264d5af2c38e797e0dc59827cd231e8ff7 07-Dec-2010 Jay Foad <jay.foad@gmail.com> PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and
zextOrTrunc(), and APSInt methods extend(), extOrTrunc() and new method
trunc(), to be const and to return a new value instead of modifying the
object in place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121120 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
de189be53f5831737f38e720f10dbcdcce6876c6 30-Nov-2010 Chris Lattner <sabre@nondot.org> add TLI support indicating that jumps are more expensive than logical operations
and use this to disable a specific optimization. Patch by Micah Villmow!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120435 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
bf17cfa3f904e488e898ac2e3af706fd1a892f08 23-Nov-2010 Wesley Peck <peckw@wesleypeck.com> Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
71365d3774a6c02f3f198fbf08a56e4b6346bbcc 09-Nov-2010 Dale Johannesen <dalej@apple.com> Fix an inline asm pasto from 117667; was preventing
{i64, i64} from matching i128.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118465 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
44ab89eb376af838d1123293a79975aede501464 29-Oct-2010 John Thompson <John.Thompson.JTSoftware@gmail.com> Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117667 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e93d99cf0742eebab859022e4cfdcf03cb9d5dfa 20-Oct-2010 Dale Johannesen <dalej@apple.com> Remove Synthesizable from the Type system; as MMX vector
types are no longer Legal on X86, we don't need it.
No functional change. 8499854.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116947 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
67aff164c039765e3ec19e5a31659250c8427dfb 22-Sep-2010 John Thompson <John.Thompson.JTSoftware@gmail.com> Fixed pr20314-2.c failure, added E, F, p constraint letters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114490 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ecf42c4720aba6ee315d0166045c54187ac2de4d 21-Sep-2010 Chris Lattner <sabre@nondot.org> continue MachinePointerInfo'izing, eliminating use of one of the old
getLoad overloads.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114443 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1a56e083e7ee7cc05afe02eff40a45858cd9adda 13-Sep-2010 Eric Christopher <echristo@apple.com> Silence more warnings. Two more unused variables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113771 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
eac6e1d0c748afc3d1496be0753ffbe5f5a4279b 13-Sep-2010 John Thompson <John.Thompson.JTSoftware@gmail.com> Added skeleton for inline asm multiple alternative constraint support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113766 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
aafe626c7fa9f99150cccd27d0151a2cf7c8c00b 26-Aug-2010 Chris Lattner <sabre@nondot.org> remove some llvmcontext arguments that are now dead post-refactoring.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112104 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e6f7c267df11a44679c35dec79787fbc276839fb 26-Aug-2010 Chris Lattner <sabre@nondot.org> Change handling of illegal vector types to widen when possible instead of
expanding: e.g. <2 x float> -> <4 x float> instead of -> 2 floats. This
affects two places in the code: handling cross block values and handling
function return and arguments. Since vectors are already widened by
legalizetypes, this gives us much better code and unblocks x86-64 abi
and SPU abi work.

For example, this (which is a silly example of a cross-block value):
define <4 x float> @test2(<4 x float> %A) nounwind {
%B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
%C = fadd <2 x float> %B, %B
br label %BB
BB:
%D = fadd <2 x float> %C, %C
%E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
ret <4 x float> %E
}

Now compiles into:

_test2: ## @test2
## BB#0:
addps %xmm0, %xmm0
addps %xmm0, %xmm0
ret

previously it compiled into:

_test2: ## @test2
## BB#0:
addps %xmm0, %xmm0
pshufd $1, %xmm0, %xmm1
## kill: XMM0<def> XMM0<kill> XMM0<def>
insertps $0, %xmm0, %xmm0
insertps $16, %xmm1, %xmm0
addps %xmm0, %xmm0
ret

This implements rdar://8230384



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112101 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1d17d199a4cd6190fdf82e35c42b617eaae2cd35 02-Aug-2010 Eli Friedman <eli.friedman@gmail.com> PR7586: Make sure we don't claim that unknown bits are actually known in the
ISD::AND case of TargetLowering::SimplifyDemandedBits.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110019 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ad78a88711979aa84a89a32576b615ff13b3de15 30-Jul-2010 Eli Friedman <eli.friedman@gmail.com> Fix for bug reported by Evzen Muller on llvm-commits: make sure to correctly
check the range of the constant when optimizing a comparison between a
constant and a sign_extend_inreg node.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109854 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
cd20c6fb18230f399fc99276fbdee14ce9faf6a1 23-Jul-2010 Dan Gohman <gohman@apple.com> Use the proper type for shift counts. This fixes a bootstrap error.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109265 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
a4f4d699ec627e798357929295aecd3d55b8d703 23-Jul-2010 Dan Gohman <gohman@apple.com> DAGCombine (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits
are not demanded. This often allows the anyext to be folded away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109242 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
4f6b4674be5473319ac5e70c76fd5cb964da2128 21-Jul-2010 Evan Cheng <evan.cheng@apple.com> Teach bottom up pre-ra scheduler to track register pressure. Work in progress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108991 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d70f57b254114841892425a40944268d38ae0bcd 20-Jul-2010 Evan Cheng <evan.cheng@apple.com> ARM has to provide its own TargetLowering::findRepresentativeClass because its scalar floating point registers alias its vector registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108761 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
46dcb57e18884099ca6ad2aebb81fd7e1513c1f6 19-Jul-2010 Evan Cheng <evan.cheng@apple.com> Teach computeRegisterProperties() to compute "representative" register class for legal value types. A "representative" register class is the largest legal super-reg register class for a value type. e.g. On i386, GR32 is the rep register class for i8 / i16 / i32; on x86_64 it would be GR64.

This property will be used by the register pressure tracking instruction scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108735 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
07538ad975994123317fe5b32daed4bf28683a1d 15-Jul-2010 Devang Patel <dpatel@apple.com> Fix crash reported in PR7653.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108441 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
cbeeae23c31d32b833c9c7c3e8984e4cbcf22f45 11-Jul-2010 Rafael Espindola <rafael.espindola@gmail.com> Fix va_arg for doubles. With this patch VAARG nodes always contain the
correct alignment information, which simplifies ExpandRes_VAARG a bit.

The patch introduces a new alignment information to TargetLoweringInfo. This is
needed since the two natural candidates cannot be used:

* The 's' in target data: If this is set to the minimal alignment of any
argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for
example.
* The getTransientStackAlignment method. It is possible for an architecture to
have argument less aligned than what we maintain the stack pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108072 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
84023e0fbefc406a4c611d3d64a10df5d3a97dd7 10-Jul-2010 Dan Gohman <gohman@apple.com> Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
- Eschew ST0 and ST1 for return values.
- Fix the PIC base register initialization so that it doesn't ever
fail to end up the top of the entry block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
02266e29f9250d74c5ec720aff23add3410ae920 09-Jul-2010 Bob Wilson <bob.wilson@apple.com> --- Reverse-merging r107947 into '.':
U utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U test/CodeGen/X86/fast-isel.ll
U test/CodeGen/X86/fast-isel-loads.ll
U include/llvm/Target/TargetLowering.h
U include/llvm/Support/PassNameParser.h
U include/llvm/CodeGen/FunctionLoweringInfo.h
U include/llvm/CodeGen/CallingConvLower.h
U include/llvm/CodeGen/FastISel.h
U include/llvm/CodeGen/SelectionDAGISel.h
U lib/CodeGen/LLVMTargetMachine.cpp
U lib/CodeGen/CallingConvLower.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U lib/CodeGen/SelectionDAG/FastISel.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U lib/CodeGen/SelectionDAG/TargetLowering.cpp
U lib/Target/XCore/XCoreISelLowering.cpp
U lib/Target/XCore/XCoreISelLowering.h
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86FastISel.cpp
U lib/Target/X86/X86ISelLowering.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
bf87e2491789d6ff788629e22e93d0c1ca02ae85 09-Jul-2010 Dan Gohman <gohman@apple.com> Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting
a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107943 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f59514152511694d46ca8b8d2db466d256ab5759 08-Jul-2010 Dan Gohman <gohman@apple.com> Revert 107840 107839 107813 107804 107800 107797 107791.
Debug info intrinsics win for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107850 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f423a69839c4810b890f8a8b09fb8cfbd6bf0139 07-Jul-2010 Dan Gohman <gohman@apple.com> Add X86FastISel support for return statements. This entails refactoring
a bunch of stuff, to allow the target-independent calling convention
logic to be employed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107800 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0d881dabc1a4e1aefad6dd38de166d8358285638 07-Jul-2010 Devang Patel <dpatel@apple.com> Propagate debug loc.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107710 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
32b4b5aea6dc38ac5aaff56fc717aebf188e39c9 05-Jul-2010 Chris Lattner <sabre@nondot.org> more tidying.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107615 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
598751ed2544291ba623e013b4e0b61bf56ca9c4 05-Jul-2010 Chris Lattner <sabre@nondot.org> random tidying


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107612 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
a5989f8e222f6e2ad67704d7e8cc67c86c4d0697 29-Jun-2010 Dale Johannesen <dalej@apple.com> In asm's, output operands with matching input constraints
have to be registers, per gcc documentation. This affects
the logic for determining what "g" should lower to. PR 7393.
A couple of existing testcases are affected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107079 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
13151432edace19ee867a93b5c14573df4f75d24 26-Jun-2010 Evan Cheng <evan.cheng@apple.com> Change if-conversion block size limit checks to add some flexibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106901 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1784d160e4efa75782884d451d0788b9457e67dc 25-Jun-2010 Dale Johannesen <dalej@apple.com> The hasMemory argument is irrelevant to how the argument
for an "i" constraint should get lowered; PR 6309. While
this argument was passed around a lot, this is the only
place it was used, so it goes away from a lot of other
places.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106893 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
4e39e9da0f3a435445261d0f796bb0913f3c2bf0 24-Jun-2010 Dan Gohman <gohman@apple.com> Reapply r106634, now that the bug it exposed is fixed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106746 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
cbe762b5d165c565feb98b745e93b71d208a1e36 23-Jun-2010 Daniel Dunbar <daniel@zuster.org> Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9a526495e0c06c4014d7500788cad1929fd244d3 23-Jun-2010 Jim Grosbach <grosbach@apple.com> Some targets don't require the fencing MEMBARRIER instructions surrounding
atomic intrinsics, either because the use locking instructions for the
atomics, or because they perform the locking directly. Add support in the
DAG combiner to fold away the fences.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106630 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ef6eb9c7ab7967790566c5e2d47977d89fc060ee 19-Jun-2010 Jim Grosbach <grosbach@apple.com> back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106342 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e03262fcfc09356a0e3ec589041bc2e0248944e9 18-Jun-2010 Jim Grosbach <grosbach@apple.com> Add Expand-to-libcall support for additional atomics. This covers the usual
entries used by llvm-gcc. *_[U]MIN and such can be added later if needed.

This enables the front ends to simplify handling of the atomic intrinsics by
removing the target-specific decision about which targets can handle the
intrinsics.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106321 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8a7f7426eeb18fef58c3471db23fc829b67bc350 18-Jun-2010 Dan Gohman <gohman@apple.com> Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,
which is faster, simpler, and less surprising.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106263 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
400f75cb5ed39ab4f071f78f6a26beefbc8a46f0 03-Jun-2010 Dan Gohman <gohman@apple.com> Fix SimplifyDemandedBits' AssertZext logic to demand all the bits. It
needs to demand the high bits because it's asserting that they're zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105406 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
211ffa13519cadfb7f9baf4c8447fa055bf38fe8 19-May-2010 Evan Cheng <evan.cheng@apple.com> Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104147 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
038df88e28b88dfea7e95d6331ffcdc03e71d8e4 11-May-2010 Dan Gohman <gohman@apple.com> Trim #includes and forward declarations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103489 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7d9663c70b3300070298d716dba6e6f6ce2d1e3e 11-May-2010 Douglas Gregor <dgregor@apple.com> Fixes for Microsoft Visual Studio 2010, from Steven Watanabe!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103457 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
17458a786e4d3eeff9c66fc0ec284b763df53642 01-May-2010 Anton Korobeynikov <asl@math.spbu.ru> Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),
when needed. This fixes PR7001

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102838 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f0757b0edc1ef3d1998485d3f74cadaa3f7180a0 21-Apr-2010 Dan Gohman <gohman@apple.com> Add more const qualifiers on TargetMachine and friends.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101977 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7609017dc3112337c3098e7d04dcd437549f8b14 21-Apr-2010 Dale Johannesen <dalej@apple.com> Because of the EMMS problem, right now we have to support
user-defined operations that use MMX register types, but
the compiler shouldn't generate them on its own. This adds
a Synthesizable abstraction to represent this, and changes
the vector widening computation so it won't produce MMX types.
(The motivation is to remove noise from the ABI compatibility
part of the gcc test suite, which has some breakage right now.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101951 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e5b51ac7708402473f0a558f4aac74fab63d4f7e 17-Apr-2010 Evan Cheng <evan.cheng@apple.com> More work to allow dag combiner to promote 16-bit ops to 32-bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101621 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
46510a73e977273ec67747eb34cbdb43f815e451 15-Apr-2010 Dan Gohman <gohman@apple.com> Add const qualifiers to CodeGen's use of LLVM IR constructs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
de0118c324a3fb8b0b5afa8e46996d9b81666bfd 26-Mar-2010 Anton Korobeynikov <asl@math.spbu.ru> Add few missed libcalls and correct names for others.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99656 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0f920e55fcdc5c678a389e2aa4c792be5062c4ea 24-Mar-2010 Dan Gohman <gohman@apple.com> Remove the ConvertActions table and associated code, which is unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99372 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d2c817eff1d158398fb0a620fa762bf95207922f 14-Mar-2010 Duncan Sands <baldrick@free.fr> Turn calls to copysignl into an FCOPYSIGN node. Handle FCOPYSIGN nodes
with ppc_f128 type by having the type legalizer turn these back into a
call to copysignl.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98514 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
927411b7ce0b7852fe4f392d8cd4faaa3881f852 14-Mar-2010 Anton Korobeynikov <asl@math.spbu.ru> Make default expansion for FP16 <-> FP32 nodes into libcalls

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98501 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
a257095ebb29fd223be2fdbf86d542c5bdfe05f0 11-Mar-2010 Dan Gohman <gohman@apple.com> Remove getWidenVectorType, which is no longer used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98289 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5b870aff81da0c07413f0241087bb3722954b83d 02-Mar-2010 Dan Gohman <gohman@apple.com> Fix several places to handle vector operands properly.
Based on a patch by Micah Villmow for PR6438.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97538 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
042919c0c5f87f937e1a01ca548811af2f297e83 01-Mar-2010 Dan Gohman <gohman@apple.com> Fix optimization of ISD::TRUNCATE on vector operands. Based on a patch
by Micah Villmow for PR6335.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97461 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2c755ba12a79e0bb2899c0bde00b2f7ea2c975a0 27-Feb-2010 Evan Cheng <evan.cheng@apple.com> Re-apply 97040 with fix. This survives a ppc self-host llvm-gcc bootstrap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97310 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
cfe30effbb952ae5b49a01de8329e3a2c14bad75 24-Feb-2010 Daniel Dunbar <daniel@zuster.org> Speculatively revert r97011, "Re-apply 96540 and 96556 with fixes.", again in
the hopes of fixing PPC bootstrap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97040 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
97e6b8390b405f9e7dd994f111a5950fca2962d2 24-Feb-2010 Evan Cheng <evan.cheng@apple.com> Re-apply 96540 and 96556 with fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97011 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
3eba667081cb63761861e4543715c90f8fc47b18 19-Feb-2010 Duncan Sands <baldrick@free.fr> Revert commits 96556 and 96640, because commit 96556 breaks the
dragonegg self-host build. I reverted 96640 in order to revert
96556 (96640 goes on top of 96556), but it also looks like with
both of them applied the breakage happens even earlier. The
symptom of the 96556 miscompile is the following crash:

llvm[3]: Compiling AlphaISelLowering.cpp for Release build
cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed.
Stack dump:
0. Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE'
g++: Internal error: Aborted (program cc1plus)

This occurs when building LLVM using LLVM built by LLVM (via
dragonegg). Probably LLVM has miscompiled itself, though it
may have miscompiled GCC and/or dragonegg itself: at this point
of the self-host build, all of GCC, LLVM and dragonegg were built
using LLVM. Unfortunately this kind of thing is extremely hard
to debug, and while I did rummage around a bit I didn't find any
smoking guns, aka obviously miscompiled code.

Found by bisection.

r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines

Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"

r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines

Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.

e.g. On x86_64
%0 = icmp eq i32 %x, 0
%1 = icmp eq i32 %y, 0
%2 = xor i1 %1, %0
br i1 %2, label %bb, label %return
=>
testl %edi, %edi
sete %al
testl %esi, %esi
sete %cl
cmpb %al, %cl
je LBB1_2



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96672 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
97a35fc3a744c905e1aeed8542fae366c7940f95 19-Feb-2010 Evan Cheng <evan.cheng@apple.com> Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.

e.g. On x86_64
%0 = icmp eq i32 %x, 0
%1 = icmp eq i32 %y, 0
%2 = xor i1 %1, %0
br i1 %2, label %bb, label %return
=>
testl %edi, %edi
sete %al
testl %esi, %esi
sete %cl
cmpb %al, %cl
je LBB1_2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96640 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
89bb7b56407bf81a5d5fdcdac7106d94bb30dd65 18-Feb-2010 Evan Cheng <evan.cheng@apple.com> Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96556 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1e559443a17d1b335f697551c6263ba60d5dd827 15-Feb-2010 David Greene <greened@obbligato.org> Add non-temporal flags and remove an assumption of default arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96240 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f7ea6c3ee89e605c8d0bb7cdb0ade79706c750e8 11-Feb-2010 Mon P Wang <wangmp@apple.com> The previous fix of widening divides that trap was too fragile as it depends on custom
lowering and requires that certain types exist in ValueTypes.h. Modified widening to
check if an op can trap and if so, the widening algorithm will apply only the op on
the defined elements. It is safer to do this in widening because the optimizer can't
guarantee removing unused ops in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95823 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f451cb870efcf9e0302d25ed05f4cac6bb494e42 10-Feb-2010 Dan Gohman <gohman@apple.com> Fix "the the" and similar typos.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95781 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f1214cbf3c2d151d3a2353d82143da186313a42a 26-Jan-2010 Chris Lattner <sabre@nondot.org> eliminate the TargetLowering::UsesGlobalOffsetTable bool, which is
subsumed by TargetLowering::getJumpTableEncoding(). Change uses of
it to be more specific.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94529 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
589c6f620e8dcf3d59af1ae0e15372c934647c82 26-Jan-2010 Chris Lattner <sabre@nondot.org> Move getJTISymbol from MachineJumpTableInfo to MachineFunction,
which is more convenient, and change getPICJumpTableRelocBaseExpr
to take a MachineFunction to match.

Next, move the X86 code that create a PICBase symbol to
X86TargetLowering::getPICBaseSymbol from
X86MCInstLower::GetPICBaseSymbol, which was an asmprinter specific
library. This eliminates a 'gross hack', and allows us to
implement X86ISelLowering::getPICJumpTableRelocBaseExpr which now
calls it.

This in turn allows us to eliminate the
X86AsmPrinter::printPICJumpTableSetLabel method, which was the
only overload of printPICJumpTableSetLabel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94526 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
beeb93e6ba48af2661eabc4872d8b159fb43e5db 26-Jan-2010 Chris Lattner <sabre@nondot.org> add a new MachineJumpTableInfo::getJTISymbol method,
use it to implement the default TargetLowering::getPICJumpTableRelocBaseExpr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94523 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
13e97a29d9dfa5602f93a8c546f112c5d029e8f7 26-Jan-2010 Chris Lattner <sabre@nondot.org> stub out a new target hook, need some refactoring before I can
implement it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94521 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
071c62fad0b25ad4131e7f984173a796c1e63f61 26-Jan-2010 Chris Lattner <sabre@nondot.org> Rearrange handling of jump tables. Highlights:
1. MachineJumpTableInfo is now created lazily for a function the first time
it actually makes a jump table instead of for every function.
2. The encoding of jump table entries is now described by the
MachineJumpTableInfo::JTEntryKind enum. This enum is determined by the
TLI::getJumpTableEncoding() hook, instead of by lots of code scattered
throughout the compiler that "knows" that jump table entries are always
32-bits in pic mode (for example).
3. The size and alignment of jump table entries is now calculated based on
their kind, instead of at machinefunction creation time.

Future work includes using the EntryKind in more places in the compiler,
eliminating other logic that "knows" the layout of jump tables in various
situations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94470 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
6fb474bd3c3e291973ae8e087787090cf2be73f8 24-Jan-2010 Mon P Wang <wangmp@apple.com> It seems better to scalarize vectors of size 1 instead of widening them.
Add support to widen SETCC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94342 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d1996360399ad6dbe75ee185b661b16c83146373 09-Jan-2010 Dan Gohman <gohman@apple.com> Revert an earlier change to SIGN_EXTEND_INREG for vectors. The VTSDNode
really does need to be a vector type, because
TargetLowering::getOperationAction for SIGN_EXTEND_INREG uses that type,
and it needs to be able to distinguish between vectors and scalars.

Also, fix some more issues with legalization of vector casts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93043 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
347a9cb5070be6473a5f881dd29997b46081d23b 07-Jan-2010 Evan Cheng <evan.cheng@apple.com> APInt'fy TargetLowering::SimplifySetCC to fix PR5963.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92943 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d40d03e1bd1d51857fc2f9f9230e334c3a32b249 06-Jan-2010 Evan Cheng <evan.cheng@apple.com> Teach dag combine to fold the following transformation more aggressively:
(OP (trunc x), (trunc y)) -> (trunc (OP x, y))

Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel.

This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92849 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8f17a36d3107bdc4ffed53ce782c1724ef6460e7 28-Dec-2009 Sanjiv Gupta <sanjiv.gupta@microchip.com> Allow targets to specify the return type of libcalls that are generated for floating point comparisons, rather than hard-coding them as i32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92199 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
87862e77bbf90cf1b68c9eea1f3641ad81435e38 11-Dec-2009 Dan Gohman <gohman@apple.com> Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91158 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
64fa4a9584113f63eccc1a650e7e0cc4ddbab3f6 09-Dec-2009 Evan Cheng <evan.cheng@apple.com> Move isConsecutiveLoad to SelectionDAG. It's not target dependent and it's primary used by selectdag passes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90922 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
735afe14eea8049bf69210ce8a3512e391fc643f 24-Nov-2009 Dan Gohman <gohman@apple.com> Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used.
Note that "hasDotLocAndDotFile"-style debug info was already broken;
people wanting this functionality should implement it in the
AsmPrinter/DwarfWriter code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89711 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
05872ea804cdc9534960b30d28a391928c61481a 12-Nov-2009 Benjamin Kramer <benny.kra@googlemail.com> Add compare_lower and equals_lower methods to StringRef. Switch all users of
StringsEqualNoCase (from StringExtras.h) to it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87020 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8983da729aa1ca99a11a3b98ae6280dfcdbadb39 07-Nov-2009 Anton Korobeynikov <asl@math.spbu.ru> Add 8 bit libcalls and make use of them for msp430

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86384 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
eb2f969a4ddfb0bc8fdcb5bce3b52e53abff321d 27-Oct-2009 Evan Cheng <evan.cheng@apple.com> Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85281 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
11eab02b770086c119a18aae0fe214fbe5eed0d0 26-Sep-2009 Dan Gohman <gohman@apple.com> Convert comparisons like (x == infinity) to (x >= infinity) on targets
where FCMP_OEQ is not legal and FCMP_OGE is, such as x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82861 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8a55ce4a392f07ac1f3c183100ac591b7ad7c693 23-Sep-2009 Dan Gohman <gohman@apple.com> Rename several variables from EVT to more descriptive names, now that EVT
is also the name of their type, as declarations like "EVT EVT" look
really odd.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82654 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
6a6570a312d4757d2a6555d40dd83c203e43d644 14-Sep-2009 Chris Lattner <sabre@nondot.org> kill off the last use of TRI::AsmName.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81727 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
af76e592c7f9deff0e55c13dbb4a34f07f1c7f64 22-Aug-2009 Chris Lattner <sabre@nondot.org> Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79763 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
bc037cfcdef8e88274d7dd167fb9d8ba545f2229 15-Aug-2009 Benjamin Kramer <benny.kra@googlemail.com> Unbreak build. Evan, please make sure my changes are correct.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79133 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
72977a45a8ad9d9524c9b49399e89fb9a3a676ed 14-Aug-2009 Anton Korobeynikov <asl@math.spbu.ru> Allow targets to specify their choice of calling conventions per
libcall. Take advantage of this in the ARM backend to rectify broken
choice of CC when hard float is in effect. PIC16 may want to see if
it could be of use in MakePIC16Libcall, which works unchanged.

Patch by Sandeep!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79033 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1d0be15f89cb5056e20e2d24faa8d6afb1573bca 13-Aug-2009 Owen Anderson <resistor@mac.com> Push LLVMContexts through the IntegerType APIs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78948 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
23b9b19b1a5a00faa9fce0788155c7dbfd00bfb1 12-Aug-2009 Owen Anderson <resistor@mac.com> Add contexts to some of the MVT APIs. No functionality change yet, just the infrastructure work needed to get the contexts to where they need to be first.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
825b72b0571821bf2d378749f69d6c4cfb52d2f9 11-Aug-2009 Owen Anderson <resistor@mac.com> Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
the latter is capable of representing either a primitive or an extended type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e50ed30282bb5b4a9ed952580523f2dda16215ac 11-Aug-2009 Owen Anderson <resistor@mac.com> Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
77547befdc430633aaedf4130ddf17d953ed552e 10-Aug-2009 Owen Anderson <resistor@mac.com> Start moving TargetLowering away from using full MVTs and towards SimpleValueType, which will simplify the privatization of IntegerType in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78584 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
98ca4f2a325f72374a477f9deba7d09e8999c29b 05-Aug-2009 Dan Gohman <gohman@apple.com> Major calling convention code refactoring.

Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.

This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.

This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
a114baa5bf0d70aed8b8cf576a864005c0d6a128 30-Jul-2009 Sanjiv Gupta <sanjiv.gupta@microchip.com> Allow targets to define libcall names for mem(cpy,set,move) intrinsics, rather than hardcoding them in DAG lowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77586 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f0144127b98425d214e59e4a1a4b342b78e3642b 28-Jul-2009 Chris Lattner <sabre@nondot.org> Rip all of the global variable lowering logic out of TargetAsmInfo. Since
it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.

Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.

This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
CStringSection_. Factor the code better.
5. fixes some bugs in string lowering on ELF targets.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77294 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b101b0bdbd22fa1bef3502fd7521da60038ac333 27-Jul-2009 Eli Friedman <eli.friedman@gmail.com> Reorganize code a bit to reduce indentation. No visible functionality
change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77171 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
78d12644b905dc54cf6cf984af02a49d30d29744 24-Jul-2009 Jakob Stoklund Olesen <stoklund@2pi.dk> Add support for promoting SETCC operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76987 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b3e717192635873a0d8491fc45ddb64c0e4bda15 21-Jul-2009 Eli Friedman <eli.friedman@gmail.com> Remove shift amount flavor. It isn't actually complete enough to
be useful, and it's currently unused. (Some issues: it isn't actually
rich enough to capture the semantics on many architectures, and
semantics can vary depending on the type being shifted.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76633 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5339c551b508d8231672b417d9df1629e42af89b 21-Jul-2009 Dale Johannesen <dalej@apple.com> Move stripping of bitcasts in inline asm arguments
to a place where it affects everything. Occurs
only on calls AFAIK.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76502 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c23197a26f34f559ea9797de51e187087c039c42 14-Jul-2009 Torok Edwin <edwintorok@gmail.com> llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c25e7581b9b8088910da31702d4ca21c4734c6d7 11-Jul-2009 Torok Edwin <edwintorok@gmail.com> assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8ea5ec681bd4838c84e545f8a1226a62d3b2f089 08-Jul-2009 Dale Johannesen <dalej@apple.com> Operand of asm("call") (the callee function) is represented
as "X" constraint and "P" modifier on x86. Make this work.
(Change may not be sufficient to fix it for non-Darwin, but
I'm pretty sure it won't break anything.)
gcc.apple/asm-block-32.c
gcc.apple/asm-block-33.c



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74967 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f2e19d5dcfa13472493bb18339555686182b7df9 24-Jun-2009 David Greene <greened@obbligato.org> This increases the maximum for MVT::LAST_VALUETYPE

This change doubles the allowable value for MVT::LAST_VALUETYPE. It does
this by doing several things.

1. Introduces MVT::MAX_ALLOWED_LAST_VALUETYPE which in this change has a
value of 64. This value contains the current maximum for the
MVT::LAST_VALUETYPE.

2. Instead of checking "MVT::LAST_VALUETYPE <= 32", all of those uses
now become "MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_LAST_VALUETYPE"

3. Changes the dimension of the ValueTypeActions from 2 elements to four
elements and adds comments ahead of the declaration indicating the it is
"(MVT::MAX_ALLOWED_LAST_VALUETYPE/32) * 2". This at least lets us find
what is affected if and when MVT::MAX_ALLOWED_LAST_VALUETYPE gets
changed.

4. Adds initializers for the new elements of ValueTypeActions.

This does NOT add any types in MVT. That would be done separately.

This doubles the size of ValueTypeActions from 64 bits to 128 bits and
gives us the freedom to add more types for AVX.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74110 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7d8d36a69f4089d1829797aae90d276c9fb5b260 16-Jun-2009 Sanjiv Gupta <sanjiv.gupta@microchip.com> Fixed names of libcalls checked in r73480.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73483 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8aa207ee306b6a5ce753511a5f811fc1cd2468e2 16-Jun-2009 Sanjiv Gupta <sanjiv.gupta@microchip.com> Added required libcalls for PIC16 (mostly floating points to integer casting operations).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73480 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5d2c01e48afba59be7bd0eaa10db784bf2073c20 15-Jun-2009 Arnold Schwaighofer <arnold.schwaighofer@gmail.com> CheckTailCallReturnConstraints is missing a check on the
incomming chain of the RETURN node. The incomming chain must
be the outgoing chain of the CALL node. This causes the
backend to identify tail calls that are not tail calls. This
patch fixes this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73387 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
abc019968067736a499467f7db7fb758a425ca06 05-Jun-2009 Nate Begeman <natebegeman@mac.com> Adapt the x86 build_vector dagcombine to the current state of the legalizer.
build vectors with i64 elements will only appear on 32b x86 before legalize.
Since vector widening occurs during legalize, and produces i64 build_vector
elements, the dag combiner is never run on these before legalize splits them
into 32b elements.

Teach the build_vector dag combine in x86 back end to recognize consecutive
loads producing the low part of the vector.

Convert the two uses of TLI's consecutive load recognizer to pass LoadSDNodes
since that was required implicitly.

Add a testcase for the transform.

Old:
subl $28, %esp
movl 32(%esp), %eax
movl 4(%eax), %ecx
movl %ecx, 4(%esp)
movl (%eax), %eax
movl %eax, (%esp)
movaps (%esp), %xmm0
pmovzxwd %xmm0, %xmm0
movl 36(%esp), %eax
movaps %xmm0, (%eax)
addl $28, %esp
ret

New:
movl 4(%esp), %eax
pmovzxwd (%eax), %xmm0
movl 8(%esp), %eax
movaps %xmm0, (%eax)
ret




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72957 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b0f1e1780c736c62fb99e5824825d2a60a53b53b 22-May-2009 Duncan Sands <baldrick@free.fr> Add a new codegen pass that normalizes dwarf exception handling
code in preparation for code generation. The main thing it does
is handle the case when eh.exception calls (and, in a future
patch, eh.selector calls) are far away from landing pads. Right
now in practice you only find eh.exception calls close to landing
pads: either in a landing pad (the common case) or in a landing
pad successor, due to loop passes shifting them about. However
future exception handling improvements will result in calls far
from landing pads:
(1) Inlining of rewinds. Consider the following case:
In function @f:
...
invoke @g to label %normal unwind label %unwinds
...
unwinds:
%ex = call i8* @llvm.eh.exception()
...

In function @g:
...
invoke @something to label %continue unwind label %handler
...
handler:
%ex = call i8* @llvm.eh.exception()
... perform cleanups ...
"rethrow exception"

Now inline @g into @f. Currently this is turned into:
In function @f:
...
invoke @something to label %continue unwind label %handler
...
handler:
%ex = call i8* @llvm.eh.exception()
... perform cleanups ...
invoke "rethrow exception" to label %normal unwind label %unwinds
unwinds:
%ex = call i8* @llvm.eh.exception()
...

However we would like to simplify invoke of "rethrow exception" into
a branch to the %unwinds label. Then %unwinds is no longer a landing
pad, and the eh.exception call there is then far away from any landing
pads.

(2) Using the unwind instruction for cleanups.
It would be nice to have codegen handle the following case:
invoke @something to label %continue unwind label %run_cleanups
...
handler:
... perform cleanups ...
unwind

This requires turning "unwind" into a library call, which
necessarily takes a pointer to the exception as an argument
(this patch also does this unwind lowering). But that means
you are using eh.exception again far from a landing pad.

(3) Bugpoint simplifications. When bugpoint is simplifying
exception handling code it often generates eh.exception calls
far from a landing pad, which then causes codegen to assert.
Bugpoint then latches on to this assertion and loses sight
of the original problem.

Note that it is currently rare for this pass to actually do
anything. And in fact it normally shouldn't do anything at
all given the code coming out of llvm-gcc! But it does fire
a few times in the testsuite. As far as I can see this is
almost always due to the LoopStrengthReduce codegen pass
introducing pointless loop preheader blocks which are landing
pads and only contain a branch to another block. This other
block contains an eh.exception call. So probably by tweaking
LoopStrengthReduce a bit this can be avoided.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72276 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
6ebf7bc7405ee79d27d50b70f0c1a474cbea820d 13-May-2009 Evan Cheng <evan.cheng@apple.com> Run code placement optimization for targets that want it (arm and x86 for now).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71726 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
fb3f84fe16219467cef4ed181530e846177cb4df 08-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71237 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9fe9c8ec7d7d1e260927cb66e91d5e69db8a6feb 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Fix typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70770 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
813090cf891325c715b9f6fb1546e6ce67fa8c8b 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Properly handle sdiv / udiv / srem / urem libcalls

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c31642f7af64bfaed36064b52a5cb2366fd01064 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Proper name 16 bit libcalls

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70750 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5ee24e54d76ab86279fe196c03d6e03f5b4b3b3b 01-May-2009 Bob Wilson <bob.wilson@apple.com> Allow CONCAT_VECTORS nodes to be legal or have custom lowering for some targets.
Changes to take advantage of this will come later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70560 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
4e5ea553d055512b0b8aa098e363ae17bafda957 30-Apr-2009 Jay Foad <jay.foad@gmail.com> Move helper functions for optimizing division by constant into the APInt
class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70488 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
672452d5a0dace689d7f9df9837c03afe3a74281 29-Apr-2009 Chris Lattner <sabre@nondot.org> Disable the load-shrinking optimization from looking at
anything larger than 64-bits, avoiding a crash. This should
really be fixed to use APInts, though type legalization happens
to help us out and we get good code on the attached testcase at
least.

This fixes rdar://6836460


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70360 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2f992d13ea0ccfe3f9ce359b4c534d9b34b0e7cd 18-Apr-2009 Chris Lattner <sabre@nondot.org> Fix PR3898, which manifests as failures on are an Xcore,
patch by Jakob Stoklund Olesen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69472 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
97121ba2afb8d566ff1bf5c4e8fc5d4077940a7f 08-Apr-2009 Dan Gohman <gohman@apple.com> Implement support for using modeling implicit-zero-extension on x86-64
with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce
SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG
instructions), and teach the DAGCombiner to take advantage of this on
targets which support it. This eliminates many redundant
zero-extension operations on x86-64.

This adds a new TargetLowering hook, isZExtFree. It's similar to
isTruncateFree, except it only applies to actual definitions, and not
no-op truncates which may not zero the high bits.

Also, this adds a new optimization to SimplifyDemandedBits: transform
operations like x+y into (zext (add (trunc x), (trunc y))) on targets
where all the casts are no-ops. In contexts where the high part of the
add is explicitly masked off, this allows the mask operation to be
eliminated. Fix the DAGCombiner to avoid undoing these transformations
to eliminate casts on targets where the casts are no-ops.

Also, this adds a new two-address lowering heuristic. Since
two-address lowering runs before coalescing, it helps to be able to
look through copies when deciding whether commuting and/or
three-address conversion are profitable.

Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle
the case that a clobber range extended both before and beyond an
existing live range. In that case, multiple live ranges need to be
added. This was exposed by the new subreg coalescing code.

Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the
spiller behavior it was looking for no longer occurrs with the new
instruction selection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68576 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f50c7981ae9b81f1212d72a06d1c05e20d0559af 03-Apr-2009 Dan Gohman <gohman@apple.com> Fix a TargetLowering optimization so that it doesn't duplicate
loads when an input node has multiple uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68398 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
11ff97801b93af0d36244fd5877b1552cdfa0a86 28-Mar-2009 Arnold Schwaighofer <arnold.schwaighofer@gmail.com> Make check in CheckTailCallReturnConstraints for ignorable instructions between
a CALL and a RET node more generic. Add a test for tail calls with a void
return.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67943 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e75fd69f15dc1b35d20b12d0e765ea6f2b9ffe0b 28-Mar-2009 Arnold Schwaighofer <arnold.schwaighofer@gmail.com> Enable tail call optimization for functions that return a struct (bug 3664) and for functions that return types that need extending (e.g i1).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67934 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
667d4b8de6dea70195ff12ef39a4deebffa2f5c7 07-Mar-2009 Duncan Sands <baldrick@free.fr> Introduce new linkage types linkonce_odr, weak_odr, common_odr
and extern_weak_odr. These are the same as the non-odr versions,
except that they indicate that the global will only be overridden
by an *equivalent* global. In C, a function with weak linkage can
be overridden by a function which behaves completely differently.
This means that IP passes have to skip weak functions, since any
deductions made from the function definition might be wrong, since
the definition could be replaced by something completely different
at link time. This is not allowed in C++, thanks to the ODR
(One-Definition-Rule): if a function is replaced by another at
link-time, then the new function must be the same as the original
function. If a language knows that a function or other global can
only be overridden by an equivalent global, it can give it the
weak_odr linkage type, and the optimizers will understand that it
is alright to make deductions based on the function body. The
code generators on the other hand map weak and weak_odr linkage
to the same thing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66339 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
36ae6c182759871a4af71d9af85f970b29a669f1 04-Mar-2009 Bill Wendling <isanbard@gmail.com> The DAG combiner was performing a BT combine. The BT combine had a value of -1,
so it changed it into a 31 via the TLO.ShrinkDemandedConstant() call. Then it
would go through the DAG combiner again. This time it had a value of 31, which
was turned into a -1 by TLI.SimplifyDemandedBits(). This would ping pong
forever.

Teach the TLO.ShrinkDemandedConstant() call not to lower a value if the demanded
value is an XOR of all ones.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65985 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9a58023c6ce1e77447a21d07a3de4c1ac98a3d24 27-Feb-2009 Rafael Espindola <rafael.espindola@gmail.com> Refactor TLS code and add some tests. The tests and expected results are:

pic | declaration | linkage | visibility |

!pic | declaration | external | default | tls1.ll tls2.ll | local exec
pic | declaration | external | default | tls1-pic.ll tls2-pic.ll | general dynamic
!pic | !declaration | external | default | tls3.ll tls4.ll | initial exec
pic | !declaration | external | default | tls3-pic.ll tls4-pic.ll | general dynamic

!pic | declaration | external | hidden | tls7.ll tls8.ll | local exec
pic | declaration | external | hidden | X | local dynamic
!pic | !declaration | external | hidden | tls9.ll tls10.ll | local exec
pic | !declaration | external | hidden | X | local dynamic

!pic | declaration | internal | default | tls5.ll tls6.ll | local exec
pic | declaration | internal | default | X | local dynamic

The ones marked with an X have not been implemented since local dynamic is not implemented.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65632 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
97d116346cdf47ce0c8536a69ff6c606309cb4c0 16-Feb-2009 Dan Gohman <gohman@apple.com> Don't assume that a left-shift of a value with one bit set will have
one bit set, because the bit may be shifted off the end. Instead,
just check for a constant 1 being shifted. This is still sufficient
to handle all the cases in test/CodeGen/X86/bt.ll. This fixes PR3583.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64622 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
78e3e521cd90e5f6382c14b6e4d809fb59610ed6 12-Feb-2009 Dale Johannesen <dalej@apple.com> Arrange to print constants that match "n" and "i" constraints
in inline asm as signed (what gcc does). Add partial support
for x86-specific "e" and "Z" constraints, with appropriate
signedness for printing.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64400 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
85b0edec4672f6ac6c15f757b119d04232a61861 11-Feb-2009 Dale Johannesen <dalej@apple.com> Make a transformation added in 63266 a bit less aggressive.
It was transforming (x&y)==y to (x&y)!=0 in the case where
y is variable and known to have at most one bit set (e.g. z&1).
This is not correct; the expressions are not equivalent when y==0.
I believe this patch salvages what can be salvaged, including
all the cases in bt.ll. Dan, please review.
Fixes gcc.c-torture/execute/20040709-[12].c



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64314 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
6f38cb61a94b3abab70f0ee463bdcf55d86d334e 07-Feb-2009 Dale Johannesen <dalej@apple.com> Use getDebugLoc forwarder instead of getNode()->getDebugLoc.
No functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b300d2aa3ef08b5074449e2c05804717f488f4e4 07-Feb-2009 Dale Johannesen <dalej@apple.com> Get rid of the last non-DebugLoc versions of getNode!

Many targets build placeholder nodes for special operands, e.g.
GlobalBaseReg on X86 and PPC for the PIC base. There's no
sensible way to associate debug info with these. I've left
them built with getNode calls with explicit DebugLoc::getUnknownLoc operands.
I'm not too happy about this but don't see a good improvement;
I considered adding a getPseudoOperand or something, but it
seems to me that'll just make it harder to read.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63992 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e8d7230f480654cdb8ff1c3d0a38e1e9ab0bd55f 07-Feb-2009 Dale Johannesen <dalej@apple.com> Remove more non-DebugLoc getNode variants. Use
getCALLSEQ_{END,START} to permit passing no DebugLoc
there. UNDEF doesn't logically have DebugLoc; add
getUNDEF to encapsulate this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63978 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
de06470330260f5937e7ca558f5f5b3e171f2ee5 06-Feb-2009 Dale Johannesen <dalej@apple.com> Remove more non-DebugLoc versions of getNode.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63969 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ff97d4fe81ef0dcee9fe490bed8ab08e40251905 03-Feb-2009 Dale Johannesen <dalej@apple.com> Propagation in TargetLowering. Includes passing a DL
into SimplifySetCC which gets called elsewhere.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63583 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
92abc62399881ba9c525be80362c134ad836e2d9 31-Jan-2009 Duncan Sands <baldrick@free.fr> Fix PR3401: when using large integers, the type
returned by getShiftAmountTy may be too small
to hold shift values (it is an i8 on x86-32).
Before and during type legalization, use a large
but legal type for shift amounts: getPointerTy;
afterwards use getShiftAmountTy, fixing up any
shift amounts with a big type during operation
legalization. Thanks to Dan for writing the
original patch (which I shamelessly pillaged).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63482 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7581bfa2757a3149c6d17c0fe592e5c3808aa843 31-Jan-2009 Bill Wendling <isanbard@gmail.com> Get rid of the non-DebugLoc-ified getNOT() method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63442 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2c65c3dfe6589a630d1bdde085aec1b9cdc43ea8 29-Jan-2009 Dan Gohman <gohman@apple.com> Fix two typos that Duncan spotted in a comment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63312 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e5af2d3a224d4b38760a26d237cde040cb6e14eb 29-Jan-2009 Dan Gohman <gohman@apple.com> Make x86's BT instruction matching more thorough, and add some
dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f560ffae1f1f6591859c7b70636a3eca6c03f083 28-Jan-2009 Dan Gohman <gohman@apple.com> Make isOperationLegal do what its name suggests, and introduce a
new isOperationLegalOrCustom, which does what isOperationLegal
previously did.

Update a bunch of callers to use isOperationLegalOrCustom
instead of isOperationLegal. In some case it wasn't obvious
which behavior is desired; when in doubt I changed then to
isOperationLegalOrCustom as that preserves their previous
behavior.

This is for the second half of PR3376.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63212 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
4c2454623841f05c6c665659b34c214950d12d7e 22-Jan-2009 Bob Wilson <bob.wilson@apple.com> Add SelectionDAG::getNOT method to construct bitwise NOT operations,
corresponding to the "not" and "vnot" PatFrags. Use the new method
in some places where it seems appropriate.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62768 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
15c94d08ab2be2e3d00de4edbfc7adde6545a7db 18-Jan-2009 Sanjiv Gupta <sanjiv.gupta@microchip.com> Few targets like PIC16 wants libcall generation for illegal type i16.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62467 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
65b7f27bb7a628e02df7a863227deda6bc326f44 15-Jan-2009 Dan Gohman <gohman@apple.com> Make getWidenVectorType const; this file was missed in the
previous commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62266 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
11df7e5157352d082bcb556907c3c8239228ae7f 05-Jan-2009 Dan Gohman <gohman@apple.com> TargetLowering.h #includes SelectionDAGNodes.h, so it doesn't need its
own OpActionsCapacity magic number; it can just use ISD::BUILTIN_OP_END,
as long as it takes care to round up when needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61733 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5480c0469e5c0323ffb12f1ead2abd169d6cc0e7 01-Jan-2009 Duncan Sands <baldrick@free.fr> Fix PR3274: when promoting the condition of a BRCOND node,
promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType. In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61542 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
87c8a8f304d1ee72829086ce2c41a8fa3813ba6a 18-Dec-2008 Mon P Wang <wangmp@apple.com> Added support for vector widening.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61209 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
fc69cb475f3df50fb47c0cf8df90c2a77b7ff36a 30-Nov-2008 Eli Friedman <eli.friedman@gmail.com> Followup to r60283: optimize arbitrary width signed divisions as well
as unsigned divisions. Same caveats as before.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60284 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
201c9776bd4197569b71fef0519f98a28d1db989 30-Nov-2008 Eli Friedman <eli.friedman@gmail.com> Fix for PR2164: allow transforming arbitrary-width unsigned divides into
multiplies.

Some more cleverness would be nice, though. It would be nice if we
could do this transformation on illegal types. Also, we would
prefer a narrower constant when possible so that we can use a narrower
multiply, which can be cheaper.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60283 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
86f874d9bb3722e81381e832eb4c867f562e308c 30-Nov-2008 Eli Friedman <eli.friedman@gmail.com> APIntify a test which is potentially unsafe otherwise, and fix the
nearby FIXME.

I'm not sure what the right way to fix the Cell test was; if the
approach I used isn't okay, please let me know.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60277 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
03228089d5235f8c90477f88809139464e9c6ea5 23-Nov-2008 Duncan Sands <baldrick@free.fr> Rename SetCCResultContents to BooleanContents. In
practice these booleans are mostly produced by SetCC,
however the concept is more general.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59911 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
cbf7cf50ecc4730563fdbbd8d03269839b445f56 12-Nov-2008 Dale Johannesen <dalej@apple.com> Fix the testb optimization so x86 also bootstraps.
Reenable test.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59101 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d0ab34bf8feb7633b70158b571425577670b6326 10-Nov-2008 Bill Wendling <isanbard@gmail.com> Temporarily revert r58979 and related patch. It's causing a failure in X86 bootstrap:

Comparing stages 2 and 3
warning: ./cc1-checksum.o differs
warning: ./cc1obj-checksum.o differs
warning: ./cc1objplus-checksum.o differs
warning: ./cc1plus-checksum.o differs
Bootstrap comparison failure!
./alias.o differs
./alloc-pool.o differs
./attribs.o differs
./bb-reorder.o differs
./bitmap.o differs
./build/errors.o differs
./build/genattrtab.o differs
./build/genautomata.o differs
./build/genemit.o differs
./build/genextract.o differs
...

-bw


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59003 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
baf26b2d3eb848dec25fcdd710dc2dd4ab6e2426 10-Nov-2008 Dale Johannesen <dalej@apple.com> Really fix testb optimization on big-endian.
Fixes ppc32 bootstrap.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58979 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ced4900578cb72b58b7de9e798c2644713da8a52 09-Nov-2008 Dale Johannesen <dalej@apple.com> Temporarily revert 58825, which breaks PPC bootstrap.
xs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b514ac9e3cddb3663c74afcf7bfa359a867e2780 08-Nov-2008 Dale Johannesen <dalej@apple.com> Make testb optimization work on big-endian targets.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58874 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
89217a6f1852e764e58c489872b2d155dc2b7b8b 07-Nov-2008 Dale Johannesen <dalej@apple.com> When we're doing a compare of load-AND-constant to 0
(e.g. a bitfield test) narrow the load as much as possible.
The has the potential to avoid unnecessary partial-word
load-after-store conflicts, which cause stalls on several targets.
Also a size win on x86 (testb vs testl).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58825 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f007a8b931e229eb325319c97363be8507311e2e 06-Nov-2008 Mon P Wang <wangmp@apple.com> Widening cleanup


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58796 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0c39719bfc7d0b3e61fbd55e1115184a1d5f6ae7 30-Oct-2008 Mon P Wang <wangmp@apple.com> Add initial support for vector widening. Logic is set to widen for X86.
One will only see an effect if legalizetype is not active. Will move
support to LegalizeType soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58426 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
6520e20e4fb31f2e65e25c38b372b19d33a83df4 18-Oct-2008 Dan Gohman <gohman@apple.com> Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)

This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.

This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.

Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.

The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
6bdcda3d3e30003fb6cef1d4e2fd3a5d5b40d3fc 17-Oct-2008 Chris Lattner <sabre@nondot.org> Keep track of *which* input constraint matches an output
constraint. Reject asms where an output has multiple
input constraints tied to it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
58f15c482a7129c78ca809792b46befa20ea337d 17-Oct-2008 Chris Lattner <sabre@nondot.org> add an assert so that PR2356 explodes instead of running off an
array. Improve some minor comments, refactor some helpers in
AsmOperandInfo. No functionality change for valid code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57686 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7f042681764c6f8eae22781d8b4cb4c218a86b76 15-Oct-2008 Evan Cheng <evan.cheng@apple.com> - Add target lowering hooks that specify which setcc conditions are illegal,
i.e. conditions that cannot be checked with a single instruction. For example,
SETONE and SETUEQ on x86.
- Teach legalizer to implement *illegal* setcc as a and / or of a number of
legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is
implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ.
- Move x86 target over.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57542 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0329466b6b4927f4e6f5d144891fef06a027fec5 14-Oct-2008 Evan Cheng <evan.cheng@apple.com> Rename LoadX to LoadExt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57526 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d9d07780ff0d393a34cbd57cd2b85bdd8c947a04 13-Oct-2008 Matthijs Kooijman <matthijs@stdin.nl> * Make TargetLowering not crash when TargetMachine::getTargetAsmInfo() returns
null. This assumes that any target that does not have AsmInfo, does not
support "LocAndDot".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57438 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7810bfed5570c192e0714a8fd0e5130a0c38dd2e 26-Sep-2008 Dan Gohman <gohman@apple.com> Rename ConstantSDNode's getSignExtended to getSExtValue, for
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56700 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
da43bcf624acb56a3d77bb5ae9a02728af032613 24-Sep-2008 Evan Cheng <evan.cheng@apple.com> Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56526 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0bb41608e94adfe9884bc188457c4f6ae47ea43c 22-Sep-2008 Dale Johannesen <dalej@apple.com> Make log, log2, log10, exp, exp2 use Expand by
default.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f5aeb1a8e4cf272c7348376d185ef8d8267653e0 12-Sep-2008 Dan Gohman <gohman@apple.com> Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7794f2a3a7778bdbc9bdd861db1fe914450e0470 04-Sep-2008 Dale Johannesen <dalej@apple.com> Add intrinsics for log, log2, log10, exp, exp2.
No functional change (and no FE change to generate them).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55753 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ba36cb5242eb02b12b277f82b9efe497f7da4d7f 28-Aug-2008 Gabor Greif <ggreif@gmail.com> erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2bb1e3eede14dd8a965506465e2876fb1ae765c2 21-Aug-2008 Dan Gohman <gohman@apple.com> Add libcalls for the new rounding opcodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55133 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e36bfe678df09f46e1eac60b15105c1ccd2c5382 07-Aug-2008 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Add the remaining fp_round libcalls:
FPROUND_F80_F32, FPROUND_PPCF128_F32,
FPROUND_F80_F64, FPROUND_PPCF128_F64

Support for soften float fp_round operands is added, Mips
needs this to round f64->f32.

Also added support to soften float FABS result, Mips doesn't
support double fabs results while in 'single float only' mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54484 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
475871a144eb604ddaf37503397ba0941442e5fb 27-Jul-2008 Dan Gohman <gohman@apple.com> Rename SDOperand to SDValue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b2ff885aaed8f9b033b16ca78d645650efc32433 17-Jul-2008 Duncan Sands <baldrick@free.fr> Factorize some code for determining which libcall to use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53713 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ac6cecec189ba9689c42543c3106c02b96d788da 11-Jul-2008 Duncan Sands <baldrick@free.fr> It is pointless to turn a UINT_TO_FP into an
SINT_TO_FP libcall plus additional operations:
it might as well be a direct UINT_TO_FP libcall.
So only turn it into an SINT_TO_FP if the target
has special handling for SINT_TO_FP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53461 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9bed0f58eb7f5e9e22d062f3880a5fabfdd0dfdd 11-Jul-2008 Duncan Sands <baldrick@free.fr> Add two missing SINT_TO_FP libcalls.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53460 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
dddc6291fb5274282a20d5923b50535d456d34a4 11-Jul-2008 Duncan Sands <baldrick@free.fr> Add support for 128 bit shifts and 32 bit shifts
on 16 bit machines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53458 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5ac319ac7125b009adddcc49294d2e040c4a91e5 10-Jul-2008 Duncan Sands <baldrick@free.fr> Add support for 128 bit multiplicative operations.
Lack of these caused a bootstrap failure with Fortran
on x86-64 with LegalizeTypes turned on. While there,
be nice to 16 bit machines and support expansion of
i32 too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53408 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
be1ad4de2900451626c8d4ace07b9ea16099ea1d 10-Jul-2008 Duncan Sands <baldrick@free.fr> Add a mysteriously missing libcall, FPTOSINT_F80_I32.
Be nice to 16 bit machines by supporting FP_TO_XINT
expansion for these.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53407 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
041cde26eaf4ef6171ff1a44aeedd08d7a1cba6c 25-Jun-2008 Duncan Sands <baldrick@free.fr> Add support for expanding PPC 128 bit floats.
For this it is convenient to permit floats to
be used with EXTRACT_ELEMENT, so I tweaked
things to allow that. I also added libcalls
for ppcf128 to i32 forms of FP_TO_XINT, since
they exist in libgcc and this case can certainly
occur (and does occur in the testsuite) - before
the i64 libcall was being used. Also, the
XINT_TO_FP result seemed to be wrong when
the argument is an i128: the wrong fudge
factor was added (the i32 and i64 cases were
handled directly, but the i128 code fell
through to some generic softening code which
seemed to think it was i64 to f32!). So I
fixed it by adding a fudge factor that I
found in my breakfast cereal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9ea3f56d07875ecb4ae2cd5bc14a9563b9742553 10-Jun-2008 Dan Gohman <gohman@apple.com> Teach isGAPlusOffset to respect a GlobalAddressSDNode's offset
value, which is something that apparently isn't used much.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52158 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
893076354a9fdb915cda27678570914dfd5732fa 09-Jun-2008 Duncan Sands <baldrick@free.fr> Various tweaks related to apint codegen. No functionality
change for non-funky-sized integers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52151 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8e4eb09b1e3571965f49edcdfb56b1375b1b7551 08-Jun-2008 Duncan Sands <baldrick@free.fr> Remove comparison methods for MVT. The main cause
of apint codegen failure is the DAG combiner doing
the wrong thing because it was comparing MVT's using
< rather than comparing the number of bits. Removing
the < method makes this mistake impossible to commit.
Instead, add helper methods for comparing bits and use
them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52098 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
83ec4b6711980242ef3c55a4fa36b2d7a39c1bfb 06-Jun-2008 Duncan Sands <baldrick@free.fr> Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9bfa03c6fd8e02b738e0077fd1af7b18eeeeb4c1 13-May-2008 Evan Cheng <evan.cheng@apple.com> Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51008 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ad4196b44ae714a6b95e238d9d96303df74b0429 12-May-2008 Evan Cheng <evan.cheng@apple.com> Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can make use of it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50991 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
54eed371314af403ef8307b386b3b5b46c8aa6fb 06-May-2008 Dan Gohman <gohman@apple.com> Instead of enumerating each opcode that isn't handled that
ComputeMaskedBits handles, just use a 'default:'. This avoids
TargetLowering's list getting out of date with SelectionDAG's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50693 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
63307c335aa08b0d6a75f81d64d79af7e90eb78b 05-May-2008 Mon P Wang <wangmp@apple.com> Added addition atomic instrinsics and, or, xor, min, and max.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50663 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
24e1a9d3115a5bf4e1c21092ede0f6dfc0a810ad 27-Apr-2008 Chris Lattner <sabre@nondot.org> typo


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50316 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5a09690446a36f94f990db7d18d9b9ac8587888a 27-Apr-2008 Chris Lattner <sabre@nondot.org> Implement a signficant optimization for inline asm:
When choosing between constraints with multiple options,
like "ir", test to see if we can use the 'i' constraint and
go with that if possible. This produces more optimal ASM in
all cases (sparing a register and an instruction to load it),
and fixes inline asm like this:

void test () {
asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14));
}

Previously we would dump "42" into a memory location (which
is ok for the 'm' constraint) which would cause a problem
because the 'c' modifier is not valid on memory operands.

Isn't it great how inline asm turns 'missed optimization'
into 'compile failed'??

Incidentally, this was the todo in
PowerPC/2007-04-24-InlineAsm-I-Modifier.ll

Please do NOT pull this into Tak.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50315 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
4376fea6631d41fff3f2a7c6186faed9eff59619 27-Apr-2008 Chris Lattner <sabre@nondot.org> Move a bunch of inline asm code out of line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50313 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5e764233f398b6929b67701672a5e78fec20ce2e 27-Apr-2008 Chris Lattner <sabre@nondot.org> A few inline asm cleanups:
- Make targetlowering.h fit in 80 cols.
- Make LowerAsmOperandForConstraint const.
- Make lowerXConstraint -> LowerXConstraint
- Make LowerXConstraint return a const char* instead of taking a string byref.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50312 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
707e0184233f27e0e9f9aee0309f2daab8cfe7f8 12-Apr-2008 Dan Gohman <gohman@apple.com> Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.

Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.

This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.

Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.

This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49572 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
4fea2e982d79132715711dfcfdc46abf15239217 06-Apr-2008 Torok Edwin <edwintorok@gmail.com> Prefer to expand mask for xor to -1, so we have a chance to turn it into a not.
If it cannot be expanded, it will keep the old behaviour and try to shrink the constant.
Part of enhancement for PR2191.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49280 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
002e5d0a170dadd5c307e0b00d8c7970835837e6 13-Mar-2008 Dan Gohman <gohman@apple.com> More APInt-ification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48344 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9736028d84de3a72dd8db5f49cfaa07280154a0e 11-Mar-2008 Dan Gohman <gohman@apple.com> Use the correct value for InSignBit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48245 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
a2e9485e34f1348526ed104dbdc194673e291077 11-Mar-2008 Dan Gohman <gohman@apple.com> Implement more support for fp-to-i128 and i128-to-fp conversions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48189 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d2cde68855125b6815b1575f29cd96927614b0cd 10-Mar-2008 Evan Cheng <evan.cheng@apple.com> Default ISD::PREFETCH to expand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5b8f82e35b51bf007de07a7ca9347d804084ddf8 10-Mar-2008 Scott Michel <scottm@aero.org> Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d91446de7a89a22c8ea1cbfd40fe2528467a4ccb 05-Mar-2008 Dan Gohman <gohman@apple.com> Codegen support for i128 SINT_TO_FP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47928 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
3370dd70aebf6b3c92d84c20245078c00290dffa 03-Mar-2008 Dan Gohman <gohman@apple.com> Yet more APInt-ification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47867 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
6c6cd1ccb5de1ebab7089c8ce339889f33fa2577 03-Mar-2008 Dan Gohman <gohman@apple.com> More APInt-ification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47866 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
28d08fdb9f6572cafd5aae95c7caffa3cd136d8e 28-Feb-2008 Dale Johannesen <dalej@apple.com> Interface of getByValTypeAlignment differed between
generic & x86 versions; change generic to follow x86
and improve comments. Add PPC version (not right
for non-Darwin.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47734 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
fb8075d03f5c87bd57dcc9c5f2304f6b13c55aad 28-Feb-2008 Evan Cheng <evan.cheng@apple.com> Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7b8d4a9eef4eb02e561227b50c9d119cea4e8860 27-Feb-2008 Dan Gohman <gohman@apple.com> Convert SimplifyDemandedMask and ShrinkDemandedConstant to use APInt.
Change several cases in SimplifyDemandedMask that don't ever do any
simplifying to reuse the logic in ComputeMaskedBits instead of
duplicating it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47648 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
74ab84c31ef64538a1b56e1f282e49303412ad17 26-Feb-2008 Bill Wendling <isanbard@gmail.com> Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
would have been a Godsend here!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5c80760fdf71659c5bdf45cd85d173df454dfb41 26-Feb-2008 Evan Cheng <evan.cheng@apple.com> Refactor inline asm constraint matching code out of SDIsel into TargetLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47587 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2e68b6f52d0979575b2f02ed29717d907ba0684c 25-Feb-2008 Dan Gohman <gohman@apple.com> Convert MaskedValueIsZero and all its users to use APInt. Also add
a SignBitIsZero function to simplify a common use case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47561 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
00fee65fd21f9615d1a604b8b7d42cd16a3f6b47 14-Feb-2008 Duncan Sands <baldrick@free.fr> In TargetLowering::LowerCallTo, don't assert that
the return value is zero-extended if it isn't
sign-extended. It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is "unsigned". Currently
isSExt is set when signed, and nothing is
set otherwise. This should be right for all
calls to standard library routines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47122 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e179584f9b740cf3a36bde70f8cab40de59b8081 14-Feb-2008 Nate Begeman <natebegeman@mac.com> Change how FP immediates are handled.
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
if it is legal.

This allows ConstantFP to be handled like Constant, allowing for
targets that can encode FP immediates as MachineOperands.

As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants! Hooray.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47121 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
977a76fbb6ea1b87dfd7fbbe2ae2afb63e982ff3 13-Feb-2008 Dan Gohman <gohman@apple.com> Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits
to pass the mask APInt by value, not by reference.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47096 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
fd29e0eb060ea8b4d490860329234d2ae5f5952e 13-Feb-2008 Dan Gohman <gohman@apple.com> Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.
Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47039 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
6f0d024a534af18d9e60b3ea757376cd8a3a980e 10-Feb-2008 Dan Gohman <gohman@apple.com> Rename MRegisterInfo to TargetRegisterInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b625f2f8960de32bc973092aaee8ac62863006fe 30-Jan-2008 Dan Gohman <gohman@apple.com> Factor the addressing mode and the load/store VT out of LoadSDNode
and StoreSDNode into their common base class LSBaseSDNode. Member
functions getLoadedVT and getStoredVT are replaced with the common
getMemoryVT to simplify code that will handle both loads and stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46538 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ba2a0b960ea4c73d0f81557f63ae2ea126e08905 29-Jan-2008 Dale Johannesen <dalej@apple.com> Handle 'X' constraint in asm's better.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46485 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
3ae054385cfe9f2fcef2d77f26839615b1d3e48b 24-Jan-2008 Evan Cheng <evan.cheng@apple.com> Forgot these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46292 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c9133f97720a36218ddfa6bfbf36ba6e22c011f7 18-Jan-2008 Chris Lattner <sabre@nondot.org> remove extraneous &'s.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46171 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ddf89566a93081cb230bb9406a72ab2d3eada4a7 17-Jan-2008 Chris Lattner <sabre@nondot.org> This commit changes:

1. Legalize now always promotes truncstore of i1 to i8.
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
safe.

The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:

_foo:
fldt 20(%esp)
fldt 4(%esp)
faddp %st(1)
movl 36(%esp), %eax
fstps (%eax)
ret

instead of:

_foo:
subl $4, %esp
fldt 24(%esp)
fldt 8(%esp)
faddp %st(1)
fstps (%esp)
movl 40(%esp), %eax
movss (%esp), %xmm0
movss %xmm0, (%eax)
addl $4, %esp
ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46140 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
41bab0beac2600701af99f63e23a6b65f71468ac 15-Jan-2008 Chris Lattner <sabre@nondot.org> Add support for targets that have a legal ISD::TRAP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46014 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
007f9847c44ddbe7fd04cba362b4ec0f0f40964b 10-Jan-2008 Duncan Sands <baldrick@free.fr> Output sinl for a long double FSIN node, not sin.
Likewise fix up a bunch of other libcalls. While
there I remove NEG_F32 and NEG_F64 since they are
not used anywhere. This fixes 9 Ada ACATS failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45833 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1c3e1e2ed07597111f0b1b1bb93b8080c96c526b 30-Dec-2007 Chris Lattner <sabre@nondot.org> fix typo duncan noticed!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45459 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
4ee451de366474b9c228b4e5fa573795a715216d 29-Dec-2007 Chris Lattner <sabre@nondot.org> Remove attribution from file headers, per discussion on llvmdev.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
63079f0757785c5c461bafdd3101ee40aeb717fe 29-Dec-2007 Chris Lattner <sabre@nondot.org> Fold comparisons against a constant nan, and optimize ORD/UNORD
comparisons with a constant. This allows us to compile isnan to:

_foo:
fcmpu cr7, f1, f1
mfcr r2
rlwinm r3, r2, 0, 31, 31
blr

instead of:

LCPI1_0: ; float
.space 4
_foo:
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr7, f1, f0
mfcr r2
rlwinm r3, r2, 0, 31, 31
blr



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45405 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2ceb2cfa8e8580a7d080f5c6235ab133b97fb8fb 22-Dec-2007 Chris Lattner <sabre@nondot.org> initial code for forming an FGETSIGN node. This is disabled until
legalizer support goes in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45323 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1a3048bb8e0f3de0b4e56704c15c556c71565f4b 22-Dec-2007 Chris Lattner <sabre@nondot.org> Add a new FGETSIGN operation, which defaults to expand on all
targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45320 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d73ab8884f5c95d2704be3c00af4cc3dba963da6 27-Nov-2007 Nate Begeman <natebegeman@mac.com> Support returning non-power-of-2 vectors to unblock some work


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44371 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
cc41586b9d79532172b37e1f44a9077da4b73fc9 09-Nov-2007 Evan Cheng <evan.cheng@apple.com> Much improved pic jumptable codegen:

Then:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
imull $4, %ecx, %ecx
leal LJTI1_0-"L1$pb"(%eax), %edx
addl LJTI1_0-"L1$pb"(%ecx,%eax), %edx
jmpl *%edx

.align 2
.set L1_0_set_3,LBB1_3-LJTI1_0
.set L1_0_set_2,LBB1_2-LJTI1_0
.set L1_0_set_5,LBB1_5-LJTI1_0
.set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2

Now:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
addl LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
jmpl *%eax

.align 2
.set L1_0_set_3,LBB1_3-"L1$pb"
.set L1_0_set_2,LBB1_2-"L1$pb"
.set L1_0_set_5,LBB1_5-"L1$pb"
.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43924 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2dfdefd282a04785c4d7b43e37782ace65af2ba6 09-Nov-2007 Evan Cheng <evan.cheng@apple.com> Didn't mean to check these in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43923 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7da8f399bf09e9a03fe8bdd8c8eef6e5a7d87327 09-Nov-2007 Evan Cheng <evan.cheng@apple.com> Bug fix. Passive nodes are not in SUnitMap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43922 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f1ba1cad387dc52f3c2c5afc665edf9caad00992 06-Nov-2007 Rafael Espindola <rafael.espindola@gmail.com> Move the LowerMEMCPY and LowerMEMCPYCall to a common place.

Thanks for the suggestions Bill :-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
eb57ea7ea2378b77bc995371c1888193b960cd03 05-Nov-2007 Dale Johannesen <dalej@apple.com> Make labels work in asm blocks; allow labels as
parameters. Rename ValueRefList to ParamList
in AsmParser, since its only use is for parameters.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43734 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e54be104180d81b61c5fcc29ccb7960f9b78476e 12-Oct-2007 Dan Gohman <gohman@apple.com> Add runtime library names for pow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42880 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
525178cdbf00720ea8bce297a7d65b0cca0ab439 08-Oct-2007 Dan Gohman <gohman@apple.com> Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42762 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
161e897b0fb35d156b2fe720fadabd975b0d6723 05-Oct-2007 Dale Johannesen <dalej@apple.com> First round of ppc long double. call/return and
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42644 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
317096ab3710fda0960be58804e9f80c800340f6 28-Sep-2007 Dale Johannesen <dalej@apple.com> Add sqrt and powi intrinsics for long double.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42423 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c3b0b5ca1d5772cf90c0c66e03412da33a0d7cdb 25-Sep-2007 Dan Gohman <gohman@apple.com> Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) and
the check to see if the assembler supports .loc from X86TargetLowering
into the superclass TargetLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42297 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
dfe8934258086ca901122d6ce48c64f297a10404 21-Sep-2007 Chris Lattner <sabre@nondot.org> initialize SetCCResultContents, fixing PR1693


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
73328d14acba0144f121b557ce0e1539c6a21a18 20-Sep-2007 Dale Johannesen <dalej@apple.com> More long double fixes. x86_64 should build now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42155 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
718cb665ca6ce2bc4d8e8479f46a45db91b49f86 07-Sep-2007 Owen Anderson <resistor@mac.com> Add lengthof and endof templates that hide a lot of sizeof computations.
Patch by Sterling Stein!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
48884cd80b52be1528618f2e9b3425ac24e7b5ca 25-Aug-2007 Chris Lattner <sabre@nondot.org> rename isOperandValidForConstraint to LowerAsmOperandForConstraint,
changing the interface to allow for future changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41384 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5411a3937f4303f9c3fc50be92f985a4532d95e6 09-Aug-2007 Dale Johannesen <dalej@apple.com> long double 9 of N. This finishes up the X86-32 bits
(constants are still not handled). Adds ConvertActions
to control fp-to-fp conversions (these are currently
defaulted for all other targets, so no changes there).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40958 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
93f81e2822aa67337f629398c81bc2844ef9400a 09-Jul-2007 Dan Gohman <gohman@apple.com> Initialize the IndexedModeActions array with memset before
updating it with calls to setIndexedLoadAction/setIndexedStoreAction,
which only update a few bits at a time. This avoids ostensible
undefined behavior of operationg on values which may be
trap-representations, and as a practical matter fixes errors from
valgrind, which doesn't track uninitialized memory with bit
granularity.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38468 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b6f5b00c3bad3415d3f2ee1a6d5ee5a6f66a4540 29-Jun-2007 Dan Gohman <gohman@apple.com> Add new TargetLowering code to provide the final register type that an
illegal value type will be transformed to, for code that needs the
register type after all transformations instead of just after the first
transformation.

Factor out the code that uses this information to do copy-from-regs and
copy-to-regs for various purposes into separate functions so that they
are done consistently.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37781 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7f32156bb9c017b71971c52fac892fa7b9b06dd2 25-Jun-2007 Dan Gohman <gohman@apple.com> Generalize MVT::ValueType and associated functions to be able to represent
extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.

This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ea859be53ca13a1547c4675549946b74dc3c6f41 22-Jun-2007 Dan Gohman <gohman@apple.com> Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2d74a318deed2b7957250cdcc04dc8e01924258b 21-Jun-2007 Dan Gohman <gohman@apple.com> Tidy up ValueType names in comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37688 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b9f10196961ebe5b5573a5705048a5a8a6b56bb3 21-Jun-2007 Dan Gohman <gohman@apple.com> Rename TargetLowering::getNumElements and friends to
TargetLowering::getNumRegisters and similar, to avoid confusion with
the actual number of elements for vector types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
4e7e6cd13ab8cab410ad11375101878865579325 30-May-2007 Chris Lattner <sabre@nondot.org> Fix CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll, and PR1473.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37362 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7667c0bac3cb46249fc14bb2f76111fb1625cdd6 19-May-2007 Chris Lattner <sabre@nondot.org> same patch as the previous one, but the symmetric case


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37249 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2ad913b3428b634f46d6606a150c5d180b528197 19-May-2007 Chris Lattner <sabre@nondot.org> Disable the (A == (B-A)) -> 2*A == B xform when the sub has multiple uses (in
this case, the xform introduces an extra operation). This compiles
PowerPC/compare-duplicate.ll into:

_test:
subf r2, r3, r4
cmplw cr0, r2, r3
bne cr0, LBB1_2 ;F

instead of:

_test:
slwi r2, r3, 1
subf r3, r3, r4
cmplw cr0, r4, r2
bne cr0, LBB1_2 ;F

This is target independent of course.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37246 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b55757ec5f6f0218342a8910e1bbd9f018adc7d7 18-May-2007 Dan Gohman <gohman@apple.com> Qualify several calls to functions in the MVT namespace, for consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37230 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
3fc5b01d38ddccbe53ff0b32cc0100351d698c66 17-May-2007 Chris Lattner <sabre@nondot.org> disable MaskedValueIsZero, ComputeMaskedBits, and SimplifyDemandedBits for
i128 integers. The 64-bit masks are not wide enough to represent the results.
These should be converted to APInt someday.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37169 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d60483ef99a15630abba934001b1ff7d16a33b18 17-May-2007 Evan Cheng <evan.cheng@apple.com> Add target hook to specify block size limit for if-conversion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37134 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
75c7d2bd551acd1ad4f0f58b763ec8840f1d9c34 03-May-2007 Chris Lattner <sabre@nondot.org> Allow i/s to match (gv+c). This fixes CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll

and PR1382


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36672 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0a16a1f73816f7bdd420212feb72467707d5ac02 18-Apr-2007 Chris Lattner <sabre@nondot.org> fix a pasto


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36242 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8c7d2d56bf5aa2186e2d08ed1dc37c2f392b4aae 18-Apr-2007 Chris Lattner <sabre@nondot.org> Fix a bug in my previous patch, grabbing the shift amount width from the
wrong operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36223 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
895c4ab564c145d16a585201ea49b91541d806b6 17-Apr-2007 Chris Lattner <sabre@nondot.org> Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used.

This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }

into:
_baz:
srwi r2, r3, 1
extsh r3, r2
blr

on PPC, instead of:
_baz:
slwi r2, r3, 8
srwi r2, r2, 9
extsh r3, r2
blr

GCC produces:
_baz:
srwi r10,r4,24
insrwi r10,r3,24,0
srawi r9,r3,24
srawi r3,r10,9
extsh r3,r3
blr

This implements CodeGen/PowerPC/shl_elim.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36221 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
bed2946a96ecb15b0b636fa74cb26ce61b1c648e 16-Apr-2007 Anton Korobeynikov <asl@math.spbu.ru> Removed tabs everywhere except autogenerated & external files. Add make
target for tabs checking.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c2941779c3ed1ffbe66716c6f6b2a9fc38a5ea7b 12-Apr-2007 Chris Lattner <sabre@nondot.org> Fix weirdness handling single element vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35941 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2b95fd67da204c6f608cc280ea91230ff781d998 10-Apr-2007 Chris Lattner <sabre@nondot.org> remove dead target hooks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35847 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b445d0cbb9b299ba8ec7be2494e35c501b6d3a93 10-Apr-2007 Chris Lattner <sabre@nondot.org> remove some dead target hooks, subsumed by isLegalAddressingMode


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d2f340b746e54fca27b654fd6740973fdf6b85f1 31-Mar-2007 Chris Lattner <sabre@nondot.org> switch TL::getValueType to use MVT::getValueType.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35527 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1436bb657d22b01fd9a526ee7f9b2cb880c064a7 31-Mar-2007 Chris Lattner <sabre@nondot.org> add one addressing mode description hook to rule them all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35520 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
caaf69107ece8bd9864fed4d64e2a84fa5f8cd4b 28-Mar-2007 Evan Cheng <evan.cheng@apple.com> Remove isLegalAddressImmediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35406 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c13dd1cf4c0d83ac3ed2a6b0c36fab72e9d6c6e5 25-Mar-2007 Chris Lattner <sabre@nondot.org> implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35327 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
065421f99fc155c3910a77c3a47de99f3f6af4d0 25-Mar-2007 Chris Lattner <sabre@nondot.org> Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35324 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
4234f57fa02b1f04a9f52a7b3c2aa22d32ac521c 25-Mar-2007 Chris Lattner <sabre@nondot.org> switch TargetLowering::getConstraintType to take the entire constraint,
not just the first letter. No functionality change.


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
fa4bce2b76c8557cfd0794beef86efe5fb0087fa 21-Mar-2007 Dale Johannesen <dalej@apple.com> repair x86 performance, dejagnu problems from previous change


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8e59e163db8cd3e7b4c96e438fbedf78bff06707 20-Mar-2007 Dale Johannesen <dalej@apple.com> do not share old induction variables when this would result in invalid
instructions (that would have to be split later)


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
14245a9d62d9a785a5d6590516380b300bab4957 16-Mar-2007 Evan Cheng <evan.cheng@apple.com> Added isLegalAddressExpression hook to test if the given expression can be
folded into target addressing mode for the given type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35121 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c289faf01559584be1ead2574631d54940a4dd4f 13-Mar-2007 Evan Cheng <evan.cheng@apple.com> More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35076 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
6618039f9f1f2e41fe2742d83007c68bdebc3656 25-Feb-2007 Chris Lattner <sabre@nondot.org> initialize a instance variable


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34567 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
01ca65b23e31a1dfac702cef9a2fc963347a3f71 24-Feb-2007 Chris Lattner <sabre@nondot.org> Fix CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll and PR1219


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9bb3c93af271449dcbfce9f7fb7442dd11d93813 22-Feb-2007 Jim Laskey <jlaskey@mac.com> Need to init.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34499 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9ff6ee85fe281c5686e0885eaa0c37ad5378ed52 17-Feb-2007 Chris Lattner <sabre@nondot.org> Implement i/n/s constraints correctly. This fixes
test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9d6565a5b1fbc4286d6ee638d8f47a3171a9ed7e 15-Feb-2007 Reid Spencer <rspencer@reidspencer.com> For PR1195:
Rename PackedType -> VectorType, ConstantPacked -> ConstantVector, and
PackedTyID -> VectorTyID. No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34293 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f839ce7d03ce3ec6c7e36b71267f43a6b6aefeaa 14-Feb-2007 Chris Lattner <sabre@nondot.org> Fix PR1198, by adding initial i128 support. Patch by Dan Gohman.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34256 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
fa1eb27b76ab1e0f78574bf52a432c84a4c1a520 08-Feb-2007 Evan Cheng <evan.cheng@apple.com> Move SimplifySetCC to TargetLowering and allow it to be shared with legalizer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34065 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
fea997aac5773e936754de5436029c2a4fa1e930 01-Feb-2007 Chris Lattner <sabre@nondot.org> Fit in 80 columns


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33745 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d385fd62cb43435b3ad70d789198d34bf148e579 31-Jan-2007 Evan Cheng <evan.cheng@apple.com> Allow the target to override the ISD::CondCode that's to be used to test the
result of the comparison libcall against zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33701 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
02114aa0e507a10b18989ff6f4542d8572a07da0 13-Jan-2007 Reid Spencer <rspencer@reidspencer.com> Move a function out of line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33158 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
79cca507fe51aa8af7a9006b380977c61b6f3fea 12-Jan-2007 Evan Cheng <evan.cheng@apple.com> Minor fix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33149 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
56966225d1eed9f9a6951d2167bfbbec9628c8d6 12-Jan-2007 Evan Cheng <evan.cheng@apple.com> Store default libgcc routine names and allow them to be redefined by target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33105 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d27a258d2d7691db3731135a448b7654d260cc07 11-Dec-2006 Anton Korobeynikov <asl@math.spbu.ru> Cleaned setjmp/longjmp lowering interfaces. Now we're producing right
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1a8f1fe676f1d83e0da7336e744ebcdcc14a88c4 09-Dec-2006 Evan Cheng <evan.cheng@apple.com> Preliminary soft float support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32394 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
3687c1a4d3ecbe6709fddd77d79dc6b128d31431 27-Nov-2006 Chris Lattner <sabre@nondot.org> Fix the dag combiner bug corresponding to PR1014.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31943 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5ff839fbabe8b1d26cf4db5c541eb5d7942c25d6 09-Nov-2006 Evan Cheng <evan.cheng@apple.com> Add a mechanism to specify whether a target supports a particular indexed load / store.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
3ed469ccd7b028a030b550d84b7336d146f5d8fa 02-Nov-2006 Reid Spencer <rspencer@reidspencer.com> For PR786:
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
dba1aeedd8179114a45be655b985455218d20806 31-Oct-2006 Chris Lattner <sabre@nondot.org> Change the prototype for TargetLowering::isOperandValidForConstraint


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31318 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8b2794aeff151be8cdbd44786c1d0f94f8f2e427 13-Oct-2006 Evan Cheng <evan.cheng@apple.com> Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2e49f090f9656af7d5ed4d5c4e9fa26af59c7233 11-Oct-2006 Evan Cheng <evan.cheng@apple.com> Naming consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
466685d41a9ea4905b9486fea38e83802e46f196 09-Oct-2006 Evan Cheng <evan.cheng@apple.com> Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
cf9668f23d67b171d3529087061b1387b20eb8b9 07-Oct-2006 Chris Lattner <sabre@nondot.org> initialize ivar


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c548428c5d7328592f4db6f6cd815af18b3152a3 04-Oct-2006 Evan Cheng <evan.cheng@apple.com> Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7acf5f39fea463df5ad196affbef0176f3b25e0f 05-Sep-2006 Chris Lattner <sabre@nondot.org> Change the default to 0, which means 'default'.


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0c9e0ff24900aa2bcae9518f8b1bdc3fd41dc2ed 04-Sep-2006 Duraid Madina <duraid@octopus.com.au> forgot this


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30097 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
42f75a926ab4b55f97da010f2ac05d2bc97a6dbf 07-Jul-2006 Evan Cheng <evan.cheng@apple.com> Fix a typo that causes 2006-07-07-ComputeMaskedBits.ll to fail.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29072 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c4fa603347e798c94f54430227df8265736ef183 13-Jun-2006 Chris Lattner <sabre@nondot.org> Port some bugfixes in shift handling from SimplifyDemandedBits over to
ComputeMaskedBits. DemandedMasks and KnownZero/One masks should never have
bits set out of the range of the base datatype.


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9bfa2dcff6c341814c18703d6760c3645bcc14e9 13-Jun-2006 Jim Laskey <jlaskey@mac.com> TargetLowering::ComputeMaskedBits was not clearing reciprocal bits on shifts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28765 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
232c910b8acd81cbf47fb18595ce557789c2217c 12-Jun-2006 Andrew Lenharth <andrewl@lenharth.org> Start on my todo list


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28752 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7e399c14abb27f9d1291442ee7f9251fa827f2e9 17-May-2006 Evan Cheng <evan.cheng@apple.com> Another typo. Pointed out by Nate Begeman.


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e9b3da17cdc5b54bb1194043f27d4d2914d77097 17-May-2006 Evan Cheng <evan.cheng@apple.com> Fix an obvious bug in getPackedTypeBreakdown. Return 1 if type is legal.


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
3e348494bbe72609893957510d56fb0266531306 16-May-2006 Andrew Lenharth <andrewl@lenharth.org> this should be 128 I think


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
dae9cbe8d4fcd8f182a99403d67cae906bdb3175 16-May-2006 Andrew Lenharth <andrewl@lenharth.org> Move this code to a common place


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28329 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
07000c6f01d8f57170f2d4c77a86d934bdc5c696 12-May-2006 Owen Anderson <resistor@mac.com> Refactor a bunch of includes so that TargetMachine.h doesn't have to include
TargetData.h. This should make recompiles a bit faster with my current
TargetData tinkering.


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1b7371331fef3db77999b9c4ca62c2ddbaf1d804 08-May-2006 Chris Lattner <sabre@nondot.org> When tracking demanded bits, if any bits from the sext of an SRA are demanded,
then so is the input sign bit. This fixes mediabench/g721 on X86.


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
822db93e57f9b8800268e8ba7b2cbc1234bc265c 07-May-2006 Chris Lattner <sabre@nondot.org> Use ComputeMaskedBits to determine # sign bits as a fallback. This allows us
to handle all kinds of stuff, including silly things like:
sextinreg(setcc,i16) -> setcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28155 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
e60351bb72938117a0a0dd6fe2844381e9ec4ca9 07-May-2006 Chris Lattner <sabre@nondot.org> Add some more sign propagation cases


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28154 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d6f7fe76a63ae8c3eff0699b3214278cae30e4b6 07-May-2006 Chris Lattner <sabre@nondot.org> Add some more simple sign bit propagation cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28149 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5c3e21d68726dbfc313d8af3d320b0a6b3eeac36 06-May-2006 Chris Lattner <sabre@nondot.org> Add some really really simple code for computing sign-bit propagation.

This will certainly be enhanced in the future.


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c93dfda9056a83a81b07ad25ed567cc303893990 06-May-2006 Chris Lattner <sabre@nondot.org> Fold (trunc (srl x, c)) -> (srl (trunc x), c)


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
fe8babf689c624c53d03f5629324b049b5327a6e 06-May-2006 Chris Lattner <sabre@nondot.org> Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28135 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
a69571c7991813c93cba64e88eced6899ce93d81 03-May-2006 Owen Anderson <resistor@mac.com> Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.

This fixes PR 759.


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/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1b5232a93767eac1424c67fb86580deef97e21e0 02-Apr-2006 Chris Lattner <sabre@nondot.org> relax assertion


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27358 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1482b5fc7affd691fbd8ece7808ddd4559ad20ae 02-Apr-2006 Chris Lattner <sabre@nondot.org> Allow targets to compute masked bits for intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27357 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
a6c9de42938a26aa7edf50f4250cfd5cdca7737d 31-Mar-2006 Chris Lattner <sabre@nondot.org> Was returning the wrong type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27277 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
79227e2906656b2c92965f5dbebcd66a5774c87f 31-Mar-2006 Chris Lattner <sabre@nondot.org> Modify the TargetLowering::getPackedTypeBreakdown method to also return the
unpromoted element type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27273 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
dc879296090a738c66968f5eec77db65d7e03623 31-Mar-2006 Chris Lattner <sabre@nondot.org> Implement TargetLowering::getPackedTypeBreakdown


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27270 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
677274b1cb511613df087adaebfdb0817c7beb49 24-Mar-2006 Evan Cheng <evan.cheng@apple.com> Typo


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27008 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
3a59358499f527ad9a8d1d4ed7d80b6bf0f1c12d 16-Mar-2006 Chris Lattner <sabre@nondot.org> set TransformToType correctly for vector types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26797 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
30b37b5f29991874648d839d018aa2921b39355f 14-Mar-2006 Evan Cheng <evan.cheng@apple.com> Add LSR hooks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26740 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b6b17ffbc61025c6b3233787ccce2e6335d60b49 13-Mar-2006 Chris Lattner <sabre@nondot.org> I can't convince myself that this is safe, remove the recursive call.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26725 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c1d9f1de41b26769752224829987a6aa06fe4b87 05-Mar-2006 Chris Lattner <sabre@nondot.org> Do not fold (add (shl x, c1), (shl c2, c1)) -> (shl (add x, c2), c1),
we want to canonicalize the other way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26547 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
33143dce15c0dc4155ff4cf2e375a9a59c8a5d61 03-Mar-2006 Evan Cheng <evan.cheng@apple.com> Number of NodeTypes now exceeds 128.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26503 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
00ffed0468ad406062b7c08c2ff46d79d2d1be4d 01-Mar-2006 Chris Lattner <sabre@nondot.org> Add interfaces for targets to provide target-specific dag combiner optimizations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26442 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
a6bc5a4d2138ea3cba90f5a794dd525228ec2c73 27-Feb-2006 Chris Lattner <sabre@nondot.org> Implement bit propagation through sub nodes, this (re)implements
PowerPC/div-2.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26392 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
81cd35586f5b675faf5391e1f597908bdda5338e 27-Feb-2006 Chris Lattner <sabre@nondot.org> Check RHS simplification before LHS simplification to avoid infinitely looping
on PowerPC/small-arguments.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26389 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5f0c658aa40c6d1475f7c9daa72497362fbee216 27-Feb-2006 Chris Lattner <sabre@nondot.org> Just like we use the RHS of an AND to simplify the LHS, use the LHS to
simplify the RHS. This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:

_test2:
srwi r2, r3, 1
xori r3, r2, 40961
blr

instead of this:

_test2:
rlwinm r2, r3, 31, 17, 31
xori r2, r2, 40961
rlwinm r3, r2, 0, 16, 31
blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26388 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ec665151b891bf59d7c7c6cab180a978e2c20265 27-Feb-2006 Chris Lattner <sabre@nondot.org> Add a bunch of missed cases. Perhaps the most significant of which is that
assertzext produces zero bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26386 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
2b7401e28e0c3c18ef027345560f9ce5abeef4d2 24-Feb-2006 Chris Lattner <sabre@nondot.org> Recognize memory operand codes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26345 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
b3befd41b4b5aa882bed9796bbb097df29b505ac 23-Feb-2006 Chris Lattner <sabre@nondot.org> Don't return registers from register classes that aren't legal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26317 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
1efa40f6a4b561cf8f80fe018684236010645cd0 22-Feb-2006 Chris Lattner <sabre@nondot.org> split register class handling from explicit physreg handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
4217ca8dc175f7268a4335c8406dedd901e8e631 22-Feb-2006 Chris Lattner <sabre@nondot.org> Updates to match change of getRegForInlineAsmConstraint prototype


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26305 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
003a272319d8871492edf9cecc25d9275b872f99 18-Feb-2006 Nate Begeman <natebegeman@mac.com> Add a fold for add that exchanges it with a constant shift if possible, so
that the shift may be more easily folded into other operations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26286 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
5755b17044b5929b89f06f6f8d19e9ccd4d6c0c9 17-Feb-2006 Jeff Cohen <jeffc@jolt-lang.org> Fix bug noticed by VC++.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26252 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
368e18d56a87308045d341e85584597bfe7426e9 16-Feb-2006 Nate Begeman <natebegeman@mac.com> Rework the SelectionDAG-based implementations of SimplifyDemandedBits
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
a03a5dc7ce876dac4b3b91bae14216de4233bacd 14-Feb-2006 Evan Cheng <evan.cheng@apple.com> Rename maxStoresPerMemSet to maxStoresPerMemset, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26174 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
eb8146b5ee4b9b66d6294f62a5ed556e332018ab 04-Feb-2006 Chris Lattner <sabre@nondot.org> implementation of some methods for inlineasm


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25951 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
244d1dccd11fc4b35f6d90e08631cc40f722ff95 03-Feb-2006 Nate Begeman <natebegeman@mac.com> Implement some feedback from sabre


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25946 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
de99629e2ae8cd7cc731328d2ad6ed6b8e759f2c 03-Feb-2006 Nate Begeman <natebegeman@mac.com> Add a framework for eliminating instructions that produces undemanded bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25945 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9a06cce0f2088a298f357b933fb7d8e268f6ca52 02-Feb-2006 Chris Lattner <sabre@nondot.org> Implement MaskedValueIsZero for ANY_EXTEND nodes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25900 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
a55079a5ccdf0cdb4d482fb47a3fb21825f56713 01-Feb-2006 Chris Lattner <sabre@nondot.org> Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25866 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
c6fd6cd65c88ef1f11da43c11be0152cb69013a7 30-Jan-2006 Chris Lattner <sabre@nondot.org> Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25803 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
87c890a9c2a8f9818772f3b9e359d301b246e3a4 30-Jan-2006 Chris Lattner <sabre@nondot.org> adjust prototype


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25798 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
3e6e8cc26b0f78e7e9164b59aaf7bdead6715127 29-Jan-2006 Chris Lattner <sabre@nondot.org> clean up interface to ValueTypeActions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25783 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
4ccb070f158b0f331c68de800c6bab8c31c2ecb6 26-Jan-2006 Chris Lattner <sabre@nondot.org> Implement a method for inline asm support


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25660 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ee4a76563a84839453588104e94d4891fc44d625 25-Jan-2006 Chris Lattner <sabre@nondot.org> initialize an instance var, apparently I forgot to commit this long ago


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25609 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0577a22c678bd5e31047e6b8038c6917202271ee 25-Jan-2006 Evan Cheng <evan.cheng@apple.com> Set SchedulingForLatency to be the default scheduling preference for all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25607 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
ff9be11da215602358e9358c3ff2d7d08c319bab 22-Dec-2005 Evan Cheng <evan.cheng@apple.com> Lefted out TargetLowering::


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24922 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
3a03ebb37747c2b3fd9b4f8b44f1124f53727894 22-Dec-2005 Evan Cheng <evan.cheng@apple.com> * Fix a GlobalAddress lowering bug.
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24921 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7226158d7e3986e55b58214a749aa4eabb3fb6d5 20-Dec-2005 Evan Cheng <evan.cheng@apple.com> Added a hook to print out names of target specific DAG nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24877 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
6a648614e88586e85a36ceb5c1d3b84e4f55b458 29-Nov-2005 Nate Begeman <natebegeman@mac.com> Add the majority of the vector machien value types we expect to support,
and make a few changes to the legalization machinery to support more than
16 types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24511 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
4ef3b817fee7ea5be7219e00ab8e15976bfe279f 22-Nov-2005 Nate Begeman <natebegeman@mac.com> Rather than attempting to legalize 1 x float, make sure the SD ISel never
generates it. Make MVT::Vector expand-only, and remove the code in
Legalize that attempts to legalize it.

The plan for supporting N x Type is to continually epxand it in ExpandOp
until it gets down to 2 x Type, where it will be scalarized into a pair of
scalars.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24482 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
405e3ecb563f21e7b4ee30f0de57821f3eb91219 21-Oct-2005 Nate Begeman <natebegeman@mac.com> Invert the TargetLowering flag that controls divide by consant expansion.
Add a new flag to TargetLowering indicating if the target has really cheap
signed division by powers of two, make ppc use it. This will probably go
away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23853 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
8e6be8b9218b3b9c44b784b559d49236f80c1049 28-Sep-2005 Chris Lattner <sabre@nondot.org> initialize new flag


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23480 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
0f9beca707b98ecfc7af252c5827958f7ede4c74 27-Aug-2005 Reid Spencer <rspencer@reidspencer.com> Change the names of member variables per Chris' instructions, and document
them more clearly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23118 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
9ed62c16f2b463461fa8667143969fea0b81781e 24-Aug-2005 Chris Lattner <sabre@nondot.org> Adjust to new interface


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23010 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
a0f5bf306c0e66ca5fc519fd3b0cb732d37d4a5e 19-Jul-2005 Reid Spencer <rspencer@reidspencer.com> For: memory operations -> stores
This is the first incremental patch to implement this feature. It adds no
functionality to LLVM but setup up the information needed from targets in
order to implement the optimization correctly. Each target needs to specify
the maximum number of store operations for conversion of the llvm.memset,
llvm.memcpy, and llvm.memmove intrinsics into a sequence of store operations.
The limit needs to be chosen at the threshold of performance for such an
optimization (generally smallish). The target also needs to specify whether
the target can support unaligned stores for multi-byte store operations.
This helps ensure the optimization doesn't generate code that will trap on
an alignment errors.
More patches to follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22468 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
f976c856fcc5055f3fc7d9f070d72c2d027c1d9d 22-Apr-2005 Misha Brukman <brukman+llvm@gmail.com> Remove trailing whitespace


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21422 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
d6e496732b9cc2c4b4986d015c7dba9032aaa14c 19-Jan-2005 Chris Lattner <sabre@nondot.org> Add a hook to find out how the target handles shift amounts that are out of
range. Either they are undefined (the default), they mask the shift amount
to the size of the register (X86, Alpha, etc), or they extend the shift (PPC).

This defaults to undefined, which is conservatively correct.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19677 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
714b69d0479e0fab36195e36da4578742ed4b63d 17-Jan-2005 Chris Lattner <sabre@nondot.org> Shift and setcc types default to the pointer type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19619 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
cba82f9339566cef76ecb062980e40913e6ccc23 16-Jan-2005 Chris Lattner <sabre@nondot.org> Use enums, move virtual dtor out of line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
cfdfe4ce4afba6e6d2ef22bf07068ca6bf5bd75a 16-Jan-2005 Chris Lattner <sabre@nondot.org> Set up identity transforms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19584 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
bb97d81cc873e2c0914f2ece43832723cc936d24 16-Jan-2005 Chris Lattner <sabre@nondot.org> Move some information out of LegalizeDAG into the generic Target interface.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19581 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
7abf8201827be0c65272ca76d8afca0e46062be1 11-Jan-2005 Chris Lattner <sabre@nondot.org> Clear the whole array, always.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19482 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
310968cbbb564c4141d4bd418a746e8103560222 07-Jan-2005 Chris Lattner <sabre@nondot.org> First draft of new Target interface


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19324 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp