| 4c5e43da7792f75567b693105cc53e3f1992ad98 |
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08-Apr-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master llvm for rebase to r233350
Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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| ebe69fe11e48d322045d5949c83283927a0d790b |
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23-Mar-2015 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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| 37ed9c199ca639565f6ce88105f9e39e898d82d0 |
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01-Dec-2014 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
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29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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| 1c07dae9fcd04469779edf7b86fef37fecc9466c |
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28-Jun-2013 |
Justin Holewinski <jholewinski@nvidia.com> |
[NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is rather poor and we're better off just ignoring it and letting LLVM expand all i8 ops out to i16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185174 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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| 0c92f2a1c73aeccc9e0f4deadcad8dc563dec225 |
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19-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Don't pass in the TargetInstrInfo into the register info object. It doesn't use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184369 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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| 5443e7d79044f3198f2da044f1b389b40d9bea6f |
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31-May-2013 |
Justin Holewinski <jholewinski@nvidia.com> |
[NVPTX] Re-enable support for virtual registers in the final output
Now that 3.3 is branched, we are re-enabling virtual registers to help
iron out bugs before the next release. Some of the post-RA passes do
not play well with virtual registers, so we disable them for now. The
needed functionality of the PrologEpilogInserter pass is copied to a
new backend-specific NVPTXPrologEpilog pass.
The test for this commit is not breaking the existing tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182998 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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| 3639ce2575660a0e6938d2e84e8bd9a738fd7051 |
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30-Mar-2013 |
Justin Holewinski <jholewinski@nvidia.com> |
[NVPTX] Run clang-format on all NVPTX sources.
Hopefully this resolves any outstanding style issues and gives us
an automated way of ensuring we conform to the style guidelines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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| 700ed80d3da5e98e05ceb90e9bfb66058581a6db |
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21-Feb-2013 |
Eli Bendersky <eliben@google.com> |
Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
to TargetFrameLowering, where it belongs. Incidentally, this allows us
to delete some duplicated (and slightly different!) code in TRI.
There are potentially other layering problems that can be cleaned up
as a result, or in a similar manner.
The refactoring was OK'd by Anton Korobeynikov on llvmdev.
Note: this touches the target interfaces, so out-of-tree targets may
be affected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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| 7eacad03efda36e09ebd96e95d7891cadaaa9087 |
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12-Feb-2013 |
Justin Holewinski <jholewinski@nvidia.com> |
[NVPTX] Disable vector registers
Vectors were being manually scalarized by the backend. Instead,
let the target-independent code do all of the work. The manual
scalarization was from a time before good target-independent support
for scalarization in LLVM. However, this forces us to specially-handle
vector loads and stores, which we can turn into PTX instructions that
produce/consume multiple operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174968 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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| 108fb3202af6f500073cdbb7be32c25d7a273a2e |
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31-Jan-2013 |
Chad Rosier <mcrosier@apple.com> |
[PEI] Pass the frame index operand number to the eliminateFrameIndex function.
Each target implementation was needlessly recomputing the index.
Part of rdar://13076458
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174083 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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| d04a8d4b33ff316ca4cf961e06c9e312eff8e64f |
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03-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.
Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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| 95a9d937728ca9cf2bf44f86ff1184df318b3bd7 |
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06-Jun-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Round 2 of dead private variable removal.
LLVM is now -Wunused-private-field clean except for
- lib/MC/MCDisassembler/Disassembler.h. Not sure why it keeps all those unaccessible fields.
- gtest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158096 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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| 6366361998599a63a74ee7cc5f4ba900711c7e7a |
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24-May-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert assert(0) to llvm_unreachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157380 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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| 49683f3c961379fbc088871a5d6304950f1f1cbc |
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04-May-2012 |
Justin Holewinski <jholewinski@nvidia.com> |
This patch adds a new NVPTX back-end to LLVM which supports code generation for NVIDIA PTX 3.0. This back-end will (eventually) replace the current PTX back-end, while maintaining compatibility with it.
The new target machines are:
nvptx (old ptx32) => 32-bit PTX
nvptx64 (old ptx64) => 64-bit PTX
The sources are based on the internal NVIDIA NVPTX back-end, and
contain more functionality than the current PTX back-end currently
provides.
NV_CONTRIB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156196 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
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