| 2c3e0051c31c3f5b2328b447eadf1cf9c4427442 |
|
06-May-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r235153
Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7
(cherry picked from commit 0c7f116bb6950ef819323d855415b2f2b0aad987)
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 4c5e43da7792f75567b693105cc53e3f1992ad98 |
|
08-Apr-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master llvm for rebase to r233350
Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| ebe69fe11e48d322045d5949c83283927a0d790b |
|
23-Mar-2015 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 37ed9c199ca639565f6ce88105f9e39e898d82d0 |
|
01-Dec-2014 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
|
29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
|
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| f14beced2b3120f5f65d29e4553e478f3012345e |
|
11-Nov-2013 |
Hal Finkel <hfinkel@anl.gov> |
Add PPC option for full register names in asm
On non-Darwin PPC systems, we currently strip off the register name prefix
prior to instruction printing. So instead of something like this:
mr r3, r4
we print this:
mr 3, 4
The first form is the default on Darwin, and is understood by binutils, but not
yet understood by our integrated assembler. Once our integrated-as understands
full register names as well, this temporary option will be replaced by tying
this functionality to the verbose-asm option. The numeric-only form is
compatible with legacy assemblers and tools, and is also gcc's default on most
PPC systems. On the other hand, it is harder to read, and there are some
analysis tools that expect full register names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194384 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 9bc94276e796d644cb425a7c7d38cc44dbf4e9c1 |
|
30-Aug-2013 |
Bill Schmidt <wschmidt@linux.vnet.ibm.com> |
[PowerPC] Add handling for conversions to fast-isel.
Yet another chunk of fast-isel code. This one handles various
conversions involving floating-point. (It also includes some
miscellaneous handling throughout the back end for LWA_32 and LWAX_32
that should have been part of the load-store patch.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189677 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| a17a7e1868076a4430cfa16694bcb42884130928 |
|
02-Jul-2013 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
[PowerPC] Rework TLS call operand processing
As part of the global-dynamic and local-dynamic TLS sequences, we need
to use a special form of the call instruction:
bl __tls_get_addr(sym@tlsld)
bl __tls_get_addr(sym@tlsgd)
which generates two fixups. The current implementation of this causes
problems with recognizing this form in the asm parser. To fix this,
this patch reworks operand processing for this special form by using
a single operand to hold both __tls_get_addr and sym@tlsld and defining
a print method to output the above form, and an encoding method to
generate the two fixups.
As a side simplification, the patch replaces the two instruction
patterns BL8_NOP_TLSGD and BL8_NOP_TLSLD by a single BL8_NOP_TLS,
since the patterns already operate in an identical fashion (whether
we have a local-dynamic or global-dynamic symbol is already encoded
in the symbol modifier).
No change in code generation intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185477 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 0b8594268feb1c804370541c7853e658caee0ae5 |
|
26-Jun-2013 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
[PowerPC] Support symbolic u16imm operands
Currently, all instructions taking s16imm operands support symbolic
operands. However, for u16imm operands, we only support actual
immediate integers. This causes the assembler to reject code like
ori %r5, %r5, symbol@l
This patch changes the u16imm operand definition to likewise
accept symbolic operands. In fact, s16imm and u16imm can
share the same encoding routine, now renamed to getImm16Encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184944 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| cf1a3b16c00cef30207e6b83d046ad38752dfefb |
|
24-Jun-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
PPC: Remove default case from fully covered switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184758 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 2e8bd8950345b0857130dd0f4068222a79c103f2 |
|
24-Jun-2013 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
[PowerPC] Add predicted forms of branches
This adds support for the predicted forms of branches (+/-).
There are three cases to consider:
- Branches using a PPC::Predicate code
For these, I've added new PPC::Predicate codes corresponding
to the BO values for predicted branch forms, and updated insn
printing to print them correctly. I've also added new aliases
for the asm parser matching the new forms.
- bt/bf
I've added new aliases matching to gBC etc.
- bd(n)z variants
I've added new instruction patterns for the predicted forms.
In all cases, the new patterns are used for the asm parser only.
(The new infrastructure ought to be sufficient to allow use by
the compiler too at some point.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184754 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 9679c47a07386cbf3547a0927609c7ee080b2aab |
|
24-Jun-2013 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
[PowerPC] Support absolute branches
There is currently only limited support for the "absolute" variants
of branch instructions. This patch adds support for the absolute
variants of all branches that are currently otherwise supported.
This requires adding new fixup types so that the correct variant
of relocation type can be selected by the object writer.
While the compiler will continue to usually choose the relative
branch variants, this will allow the asm parser to fully support
the absolute branches, with either immediate (numerical) or
symbolic target addresses.
No change in code generation intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184721 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 7e17024400941889b6fe1b178e5374f75c34d9ab |
|
12-Jun-2013 |
David Blaikie <dblaikie@gmail.com> |
Revert r183854 (PPC: Fix switch warnings from r183841)
Now that the PRED_BAD has been removed, this is failing the Clang
-Werror build due to -Wcovered-switch-default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183863 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| dab366bf25ef00a37e5d9306c6dcbbb7c1d3e19a |
|
12-Jun-2013 |
Bill Schmidt <wschmidt@linux.vnet.ibm.com> |
[PowerPC] Fix switch warnings from r183841.
Introducing PRED_BAD caused some unexpected warnings that are now
suppressed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183854 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| edaa58ee66699b99841ee5dfdd485aedbae3bf90 |
|
24-May-2013 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
[PowerPC] Clean up generation of ha16() / lo16() markers
When targeting the Darwin assembler, we need to generate markers ha16() and
lo16() to designate the high and low parts of a (symbolic) immediate. This
is necessary not just for plain symbols, but also for certain symbolic
expression, typically along the lines of ha16(A - B). The latter doesn't
work when simply using VariantKind flags on the symbol reference.
This is why the current back-end uses hacks (explicitly called out as such
via multiple FIXMEs) in the symbolLo/symbolHi print methods.
This patch uses target-defined MCExpr codes to represent the Darwin
ha16/lo16 constructs, following along the lines of the equivalent solution
used by the ARM back end to handle their :upper16: / :lower16: markers.
This allows us to get rid of special handling both in the symbolLo/symbolHi
print method and in the common code MCExpr::print routine. Instead, the
ha16 / lo16 markers are printed simply in a custom print routine for the
target MCExpr types. (As a result, the symbolLo/symbolHi print methods
can now replaced by a single printS16ImmOperand routine that also handles
symbolic operands.)
The patch also provides a EvaluateAsRelocatableImpl routine to handle
ha16/lo16 constructs. This is not actually used at the moment by any
in-tree code, but is provided as it makes merging into David Fang's
out-of-tree Mach-O object writer simpler.
Since there is no longer any need to treat VK_PPC_GAS_HA16 and
VK_PPC_DARWIN_HA16 differently, they are merged into a single
VK_PPC_ADDR16_HA (and likewise for the _LO16 types).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182616 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 347a5079e18278803bc05b197d325b8580e95610 |
|
16-May-2013 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
[PowerPC] Use true offset value in "memrix" machine operands
This is the second part of the change to always return "true"
offset values from getPreIndexedAddressParts, tackling the
case of "memrix" type operands.
This is about instructions like LD/STD that only have a 14-bit
field to encode immediate offsets, which are implicitly extended
by two zero bits by the machine, so that in effect we can access
16-bit offsets as long as they are a multiple of 4.
The PowerPC back end currently handles such instructions by
carrying the 14-bit value (as it will get encoded into the
actual machine instructions) in the machine operand fields
for such instructions. This means that those values are
in fact not the true offset, but rather the offset divided
by 4 (and then truncated to an unsigned 14-bit value).
Like in the case fixed in r182012, this makes common code
operations on such offset values not work as expected.
Furthermore, there doesn't really appear to be any strong
reason why we should encode machine operands this way.
This patch therefore changes the encoding of "memrix" type
machine operands to simply contain the "true" offset value
as a signed immediate value, while enforcing the rules that
it must fit in a 16-bit signed value and must also be a
multiple of 4.
This change must be made simultaneously in all places that
access machine operands of this type. However, just about
all those changes make the code simpler; in many cases we
can now just share the same code for memri and memrix
operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182032 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| fcdfd5a7ffa2557753038fcbf421dd518e3fda98 |
|
03-May-2013 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
[PowerPC] Avoid using '$' in generated assembler code
PowerPC assemblers are supposed to support a stand-alone '$' symbol
as an alternative of '.' to refer to the current PC. This does not
work in the LLVM assembler parser yet.
To avoid bootstrap failures when using the LLVM assembler as system
assembler, this patch modifies the assembler source code generated
by LLVM to avoid using '$' (and simply use '.' instead).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181054 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| aa6047d23d8ed55abd8545f5cbe82cd13cbd756a |
|
26-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
PPC: Use HWEncoding and TRI->getEncodingValue
As pointed out by Jakob, we don't need to maintain a separate
register-numbering table. Instead we should let TableGen generate the table for
us from the information (already present) in PPCRegisterInfo.td.
TRI->getEncodingValue is now used to access register-encoding values.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| a01c7dbaabae7cf569410bedd71361b75f65875f |
|
26-Mar-2013 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
PowerPC: Use CCBITRC operand for ISEL patterns.
This commit changes the ISEL patterns to use a CCBITRC operand
instead of a "pred" operand. This matches the actual instruction
text more directly, and simplifies use of ISEL with the asm parser.
In addition, this change allows some simplification of handling
the "pred" operand, as this is now only used by BCC.
No change in generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178003 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 3b2552933642c19ce5e8836d82c26c562910e239 |
|
26-Mar-2013 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
PowerPC: Simplify BLR pattern.
The BLR pattern cannot be recognized by the asm parser in its current form.
This complexity is due to an apparent attempt to enable conditional BLR
variants. However, none of those can ever be generated by current code;
the pattern is only ever created using the default "pred" operand.
To simplify the pattern and allow it to be recognized by the parser,
this commit removes those attempts at conditional BLR support.
When we later come back to actually add real conditional BLR, this
should probably be done via a fully generic conditional branch pattern.
No change in generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178002 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 1c7d69bbe2de22f386ffd9ef4480f8a77be28130 |
|
08-Oct-2012 |
Adhemerval Zanella <azanella@linux.vnet.ibm.com> |
PR12716: PPC crashes on vector compare
Vector compare using altivec 'vcmpxxx' instructions have as third argument
a vector register instead of CR one, different from integer and float-point
compares. This leads to a failure in code generation, where 'SelectSETCC'
expects a DAG with a CR register and gets vector register instead.
This patch changes the behavior by just returning a DAG with the
vector compare instruction based on the type. The patch also adds a testcase
for all vector types llvm defines.
It also included a fix on signed 5-bits predicates printing, where
signed values were not handled correctly as signed (char are unsigned by
default for PowerPC). This generates 'vspltisw' (vector splat)
instruction with SIM out of range.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165419 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 1144af3c9b4da48cd581156e05b24261c8de366a |
|
25-Aug-2012 |
Richard Smith <richard-llvm@metafoo.co.uk> |
Fix integer undefined behavior due to signed left shift overflow in LLVM.
Reviewed offline by chandlerc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162623 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 0a2f793d6e24acd00d9209b46436b4899feb1cdb |
|
23-Jun-2012 |
Craig Topper <craig.topper@gmail.com> |
Silence an unused variable warning on release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159074 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 009f7afbeb77d1cc8e962bac7057b73b6d39d62f |
|
23-Jun-2012 |
Hal Finkel <hfinkel@anl.gov> |
Add support for the PPC isel instruction.
The isel (integer select) instruction is supported on the 440 and A2
embedded cores and on the POWER7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159045 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| c97ef618d2d849a272a353c2b4343fc5902cd921 |
|
02-Apr-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Move getOpcodeName from the various target InstPrinters into the superclass MCInstPrinter.
All implementations used the same code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153866 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 7c0b3c1fb6395475e262d66ee403645f0c67dee2 |
|
02-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153863 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| bc2198133a1836598b54b943420748e75d5dea94 |
|
07-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert assert(0) to llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149961 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 2bd335470f8939782f3df7f6180282d3825d4f09 |
|
10-Jan-2012 |
David Blaikie <dblaikie@gmail.com> |
Remove unnecessary default cases in switches that cover all enum values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147855 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 519020adf1cf57e2e93cc4fd49c385c47f7ff0f7 |
|
21-Sep-2011 |
Owen Anderson <resistor@mac.com> |
These do not need to be conditional on the presence of CommentStream, as they have a fallback path now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140267 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 317eaf19937813d630166bfec7b933a98ea89aa5 |
|
21-Sep-2011 |
Owen Anderson <resistor@mac.com> |
In the disassembler C API, be careful not to confuse the comment streamer that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140217 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 98c5ddabca1debf935a07d14d0cbc9732374bdb8 |
|
16-Sep-2011 |
Owen Anderson <resistor@mac.com> |
Don't attach annotations to MCInst's. Instead, have the disassembler return, and the printer accept, an annotation string which can be passed through if the client cares about annotations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139876 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 94b9550a32d189704a8eae55505edf62662c0534 |
|
26-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136027 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| cde4ce411b1ace4a80ea1dd38df97e8508aed0c9 |
|
02-Jun-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Don't hardcode the %reg format in the streamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132451 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 6e032942cf58d1c41f88609a1cec74eb74940ecd |
|
30-May-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Use the dwarf->llvm mapping to print register names in the cfi
directives.
Fixes PR9826.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132317 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| c62feda741f9d5811b625967c40f1847fb2040e7 |
|
25-Nov-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Namespacify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120146 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 84a04adf3a766c1d40ba100b9b7235531122e468 |
|
15-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
dissolve some more hacks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119115 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 0fe7184ba156c87deee090001ba1d7af05e84fc1 |
|
15-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
fix some fixme's, removing dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119114 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| ab638645647bef87ffe8d545fbcb1b69d3af45ce |
|
15-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
remove asmstrings (which can never be printed) from pseudo
instructions, allowing is to eliminate some dead operand
printing methods from the instprinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119113 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 1e61e69d401045c54b15815f15a0fdb3ca56a9b5 |
|
15-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
add targetoperand flags for jump tables, constant pool and block address
nodes to indicate when ha16/lo16 modifiers should be used. This lets
us pass PowerPC/indirectbr.ll.
The one annoying thing about this patch is that the MCSymbolExpr isn't
expressive enough to represent ha16(label1-label2) which we need on
PowerPC. I have a terrible hack in the meantime, but this will have
to be revisited at some point.
Last major conversion item left is global variable references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119105 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 959fb3dd5cfaf2aae44321b58ff87dce4632438d |
|
14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
make the stubbed-out printer methods abort instead of
printing nothing. This gets us back up to 24 failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119083 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| b2e477f5463795de8265939300fb5c0abfdded77 |
|
14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
wire up a few more things, down to 4 test failures, all
about handling $stub, lo/hi etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119082 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 2e35248f14ac449774de9727b460469fc3c93249 |
|
14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
implement pretty printing support for the various pseudo
ops the asmprinter supported, fixing PowerPC/rlwimi2.ll
among others. Down to 20 failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119080 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 58d014f6031ab95b0057a54dc377e7b0d23d674f |
|
14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
Wire up symbol hi/lo printing. We don't print hi()/lo(), but this gets
us further along. Only 28 failures now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119079 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 1520fd60950c1c347457b225dbbd72224d4fcd19 |
|
14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
implement basic support for symbol operand lowering,
and printing support for call operands. Down to 77 failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119078 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| fdb2ded765316ee2ee2f796b0e2befa2c23acd1d |
|
14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
implement basic support for memory operands and crbit operands,
this fixes 3 more ppc tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119065 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 99889132f3d6b3f5eab80934b3a0f1687904e5a2 |
|
14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
implement several trivial operand printers, reducing
failures in CodeGen/PowerPC from 120 -> 117
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119063 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 0d1b7d9e3dd8512b47655af7d8ea738ea1d4ac51 |
|
14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
Implement support for printing register and immediate operands,
add support for darwin vs aix syntax. We now can print instructions
like this:
add r3, r3, r4
blr
and (in aix mode):
add 3, 3, 4
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119062 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|
| 60d5b5fdeec64b69c92db60242d3d90b3f978e69 |
|
14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
stub out a powerpc MCInstPrinter implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119059 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
|