| ebe69fe11e48d322045d5949c83283927a0d790b |
|
23-Mar-2015 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 37ed9c199ca639565f6ce88105f9e39e898d82d0 |
|
01-Dec-2014 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
|
29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
|
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 7d9c02dc620ea5f5cdf2dc0bd0f03d9370f845d3 |
|
09-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r196751:
------------------------------------------------------------------------
r196751 | venkatra | 2013-12-08 20:02:15 -0800 (Sun, 08 Dec 2013) | 3 lines
[Sparc]: Implement getSetCCResultType() in SparcTargetLowering so that umulo/smulo can be lowered on sparcv9 without an assertion error.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196766 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| fcd5e86396e121fef7ad11d41cc8bc0a541631b2 |
|
03-Nov-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[SparcV9] Handle i64 <-> float conversions in sparcv9 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193957 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 7d052f272d3f9ad0acdebf6811e29d529f70c1e1 |
|
22-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Add support for TLS in sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191164 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 75ddb2bb34f96c2bda48d0e86331fb52b55b8d03 |
|
03-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Add support for soft long double (fp128).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189780 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 5b3fca50a08865f0db55fc92ad1c037a04e12177 |
|
22-Jun-2013 |
Chad Rosier <mcrosier@apple.com> |
The getRegForInlineAsmConstraint function should only accept MVT value types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184642 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| e7cbb792c95cb27a9704551579da19ebcaa06cdb |
|
03-Jun-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Sparc: Add support for indirect branch and blockaddress in Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183094 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| ac6d9bec671252dd1e596fa71180ff6b39d06b5d |
|
25-May-2013 |
Andrew Trick <atrick@apple.com> |
Track IR ordering of SelectionDAG nodes 2/4.
Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| d9f88da7b329c54ccb0d2ebd3b3a4b0e4b1e2b06 |
|
14-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use i32 for all SPARC shift amounts, even in 64-bit mode.
Test case by llvm-stress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179477 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 26932106562adbe3f186b8f32fd5057d9f373875 |
|
14-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Also put target flags on SPARC constant pool references.
Constant pool entries are accessed exactly the same way as global
variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 0ec587e26cd7e048b3150f89fa6d6245d5728cec |
|
14-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add target flags to SPARC address operands.
SDNodes and MachineOperands get target flags representing the %hi() and
%lo() assembly annotations that eventually become relocations.
Also define flags to be used by the 64-bit code models.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179468 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 18fdb398ea94c7ddee40bec49f63491922c5b110 |
|
07-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Implement LowerCall_64 for the SPARC v9 64-bit ABI.
There is still no support for byval arguments (which I don't think are
needed) and varargs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178993 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 53d4bcf35e7bc362e9340085264c2f4acd3c912b |
|
07-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Implement LowerReturn_64 for SPARC v9.
Integer return values are sign or zero extended by the callee, and
structs up to 32 bytes in size can be returned in registers.
The CC_Sparc64 CallingConv definition is shared between
LowerFormalArguments_64 and LowerReturn_64. Function arguments and
return values are passed in the same registers.
The inreg flag is also used for return values. This is required to handle
C functions returning structs containing floats and ints:
struct ifp {
int i;
float f;
};
struct ifp f(void);
LLVM IR:
define inreg { i32, float } @f() {
...
ret { i32, float } %retval
}
The ABI requires that %retval.i is returned in the high bits of %i0
while %retval.f goes in %f1.
Without the inreg return value attribute, %retval.i would go in %i0 and
%retval.f would go in %f3 which is a more efficient way of returning
%multiple values, but it is not ABI compliant for returning C structs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178966 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 0e164884423e9f0f22670015a428946ebf178545 |
|
04-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add SPARC v9 support for select on 64-bit compares.
This requires v9 cmov instructions using the %xcc flags instead of the
%icc flags.
Still missing:
- Select floats on %xcc flags.
- Select i64 on %fcc flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178737 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 8534e9998c53efae49e4555ba394f39808fb83e0 |
|
03-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add 64-bit compare + branch for SPARC v9.
The same compare instruction is used for 32-bit and 64-bit compares. It
sets two different sets of flags: icc and xcc.
This patch adds a conditional branch instruction using the xcc flags for
64-bit compares.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178621 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| f37812e906a3abbdb8353e2eb9e8223ff9036b68 |
|
02-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add support for 64-bit calling convention.
This is far from complete, but it is enough to make it possible to write
test cases using i64 arguments.
Missing features:
- Floating point arguments.
- Receiving arguments on the stack.
- Calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178523 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| fcb25e60f514e4dbceecef73ac229c61d6202ed2 |
|
02-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add an I64Regs register class for 64-bit registers.
We are going to use the same registers for 32-bit and 64-bit values, but
in two different register classes. The I64Regs register class has a
larger spill size and alignment.
The addition of an i64 register class confuses TableGen's type
inference, so it is necessary to clarify the type of some immediates and
the G0 register.
In 64-bit mode, pointers are i64 and should use the I64Regs register
class. Implement getPointerRegClass() to dynamically provide the pointer
register class depending on the subtarget. Use ptr_rc and iPTR for
memory operands.
Finally, add the i64 type to the IntRegs register class. This register
class is not used to hold i64 values, I64Regs is for that. The type is
required to appease TableGen's type checking in output patterns like this:
def : Pat<(add i64:$a, i64:$b), (ADDrr $a, $b)>;
SPARC v9 uses the same ADDrr instruction for i32 and i64 additions, and
TableGen doesn't know to check the type of register sub-classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178522 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| d2ea0e10cbd158c93fb870cdd03001b9cd1156b8 |
|
25-May-2012 |
Justin Holewinski <jholewinski@nvidia.com> |
Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall
to pass around a struct instead of a large set of individual values. This
cleans up the interface and allows more information to be added to the struct
for future targets without requiring changes to each and every target.
NV_CONTRIB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157479 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 26c8dcc692fb2addd475446cfff24d6a4e958bca |
|
04-Apr-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Always compute all the bits in ComputeMaskedBits.
This allows us to keep passing reduced masks to SimplifyDemandedBits, but
know about all the bits if SimplifyDemandedBits fails. This allows instcombine
to simplify cases like the one in the included testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154011 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 79aa3417eb6f58d668aadfedf075240a41d35a26 |
|
17-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 4bfcd4acbc7d12aa55f8de9af84a38422f0f6d83 |
|
28-Feb-2012 |
Evan Cheng <evan.cheng@apple.com> |
Re-commit r151623 with fix. Only issue special no-return calls if it's a direct call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151645 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 20bd5296cec8d8d597ab9db2aca7346a88e580c8 |
|
28-Feb-2012 |
Daniel Dunbar <daniel@zuster.org> |
Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack prediction. ...", it is breaking the Clang build during the Compiler-RT part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151630 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| ec52aaa12f57896fc806e849fa21a61603050ac4 |
|
28-Feb-2012 |
Evan Cheng <evan.cheng@apple.com> |
Some ARM implementaions, e.g. A-series, does return stack prediction. That is,
the processor keeps a return addresses stack (RAS) which stores the address
and the instruction execution state of the instruction after a function-call
type branch instruction.
Calling a "noreturn" function with normal call instructions (e.g. bl) can
corrupt RAS and causes 100% return misprediction so LLVM should use a
unconditional branch instead. i.e.
mov lr, pc
b _foo
The "mov lr, pc" is issued in order to get proper backtrace.
rdar://8979299
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151623 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 158bf50787f1881fbdb6f62761d15aae0d3862f6 |
|
29-Jun-2011 |
Eric Christopher <echristo@apple.com> |
Remove getRegClassForInlineAsmConstraint from sparc.
Part of rdar://9643582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134083 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| fc5d305597ea6336d75bd7f3b741e8d57d6a5105 |
|
06-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make the logic for determining function alignment more explicit. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131012 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 58269b973256bf2436cac0f047aa277fe4bc01dd |
|
21-Feb-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Generate correct Sparc32 ABI compliant code for functions that return a struct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126108 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| fc3faa75cbadd8a1020941ec85adfda1d2f49688 |
|
21-Jan-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Sparc backend:
Rename FLUSH to FLUSHW.
Output "ta 3" instead of a "flushw" instruction if v8 instruction set is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 860b64cb1efba110bf81bcc243a6fbaae4c655a4 |
|
12-Jan-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Implement RETURNADDR and FRAMEADDR lowering in SPARC backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123310 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| c9403659a98bf6487ab6fbf40b81628b5695c02e |
|
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Split the SDValue out of OutputArg so that SelectionDAG-independent
code can do calling-convention queries. This obviates OutputArgReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107786 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| af1d8ca44a18f304f207e209b3bdb94b590f86ff |
|
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| d858e90f039f5fcdc2fa93035e911a5a9505cc50 |
|
17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 1e93df6f0b5ee6e36d7ec18e6035f0f5a53e5ec6 |
|
17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move per-function state out of TargetLowering subclasses and into
MachineFunctionInfo subclasses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 022d9e1cef7586a80a96446ae8691a37def9bbf4 |
|
03-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Revert 95130.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95160 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 942619695f4bd77934c09a1cae0fb39ae59edac3 |
|
02-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95130 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 0c439eb2c8397996cbccaf2798e598052d9982c8 |
|
27-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate target hook IsEligibleForTailCallOptimization.
Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94626 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| fb2e752e4175920d0531f2afc93a23d0cdf4db14 |
|
18-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes.
Not functionality change yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82273 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| db486a6d5311944f61b92db9f6074944dbbdb242 |
|
15-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
several major improvements to the sparc backend: support for weak linkage
and PIC codegen. Patch by Venkatraman Govindaraju!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81877 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 65c3c8f323198b99b88b109654194540cf9b3fa5 |
|
02-Sep-2009 |
Sandeep Patel <deeppatel1987@gmail.com> |
Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80773 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| e50ed30282bb5b4a9ed952580523f2dda16215ac |
|
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|
| 98ca4f2a325f72374a477f9deba7d09e8999c29b |
|
05-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
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| a786c7b90cfacf1c36c975ad35c3b793c232e3d8 |
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19-Jul-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Don't override LowerArguments in the SPARC backend. In addition to
being more consistent with other backends, this makes the SPARC backend
deal with functions with arguments with illegal types correctly, which
fixes some tests in test/CodeGen/Generic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76375 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
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| b4202b84d7e54efe5e144885c7da63e6cc465f80 |
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01-Jul-2009 |
Bill Wendling <isanbard@gmail.com> |
Update comments to make it clear that the function alignment is the Log2 of the
bytes and not bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74624 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
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| 20c568f366be211323eeaf0e45ef053278ec9ddc |
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01-Jul-2009 |
Bill Wendling <isanbard@gmail.com> |
Add an "alignment" field to the MachineFunction object. It makes more sense to
have the alignment be calculated up front, and have the back-ends obey whatever
alignment is decided upon.
This allows for future work that would allow for precise no-op placement and the
like.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74564 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
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| 1fdbc1dd4e9cb42c79a30e8dc308c322e923cc52 |
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07-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing
ScheduleDAG's TLI member to use const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64018 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
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| 7d2ad624fa749a6d3edac0d94e9c107989c16304 |
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31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Make LowerCallTo and LowerArguments take a DebugLoc
argument. Adjust all callers and overloaded versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63444 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
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| 6520e20e4fb31f2e65e25c38b372b19d33a83df4 |
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18-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)
This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.
This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.
Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.
The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
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| 0eefda1335f5e86f95dbb58352321a43237e1089 |
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10-Oct-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add rudimentary support for 'r' register operand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57359 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
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| 0ba2bcfcc3149a25d08aa8aa00fb6c34a4e25bdd |
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23-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix these enums' starting values to reflect the way that
instruction opcodes are now numbered. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56497 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
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| 475871a144eb604ddaf37503397ba0941442e5fb |
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27-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Rename SDOperand to SDValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
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| a44b674a42b6ca57128c4eb5a358298ed3bb1406 |
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30-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Replace some std::vectors that showed up in heap profiling with
SmallVectors. Change the signature of TargetLowering::LowerArguments
to avoid returning a vector by value, and update the two targets
which still use this directly, Sparc and IA64, accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52917 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
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| 98949a6d2c42e386f36b5fd94cb97008a51b610f |
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17-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Switch sparc from using LowerCallTo to using LowerOperation(CALL) like
other targets. Use autogenerated calling conv to lower result of
calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48444 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
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| d23405e6f04135cabcad4d9bd7aa6e4f187bed3a |
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17-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
split sparc lowering out into SparcISelLowering.{cpp|h} to follow
best practices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48442 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcISelLowering.h
|