History log of /external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
2c3e0051c31c3f5b2328b447eadf1cf9c4427442 06-May-2015 Pirama Arumuga Nainar <pirama@google.com> Update aosp/master LLVM for rebase to r235153

Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7
(cherry picked from commit 0c7f116bb6950ef819323d855415b2f2b0aad987)
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
4c5e43da7792f75567b693105cc53e3f1992ad98 08-Apr-2015 Pirama Arumuga Nainar <pirama@google.com> Update aosp/master llvm for rebase to r233350

Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
ebe69fe11e48d322045d5949c83283927a0d790b 23-Mar-2015 Stephen Hines <srhines@google.com> Update aosp/master LLVM for rebase to r230699.

Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
37ed9c199ca639565f6ce88105f9e39e898d82d0 01-Dec-2014 Stephen Hines <srhines@google.com> Update aosp/master LLVM for rebase to r222494.

Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
c6a4f5e819217e1e12c458aed8e7b122e23a3a58 21-Jul-2014 Stephen Hines <srhines@google.com> Update LLVM for rebase to r212749.

Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls

Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
dce4a407a24b04eebc6a376f8e62b41aaa7b071f 29-May-2014 Stephen Hines <srhines@google.com> Update LLVM for 3.5 rebase (r209712).

Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
36b56886974eae4f9c5ebc96befd3e7bfe5de338 24-Apr-2014 Stephen Hines <srhines@google.com> Update to LLVM 3.5a.

Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
2a2a323488a31fbdb3524f7f288b8e5c3fc3b7c3 03-Dec-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> Merging r196267:
------------------------------------------------------------------------
r196267 | rsandifo | 2013-12-03 11:01:54 +0000 (Tue, 03 Dec 2013) | 12 lines

[SystemZ] Fix choice of known-zero mask in insertion optimization

The backend converts 64-bit ORs into subreg moves if the upper 32 bits
of one operand and the low 32 bits of the other are known to be zero.
It then tries to peel away redundant ANDs from the upper 32 bits.

Since AND masks are canonicalized to exclude known-zero bits,
the test ORs the mask and the known-zero bits together before
checking for redundancy. The problem was that it was using the
wrong node when checking for known-zero bits, so could drop ANDs
that were still needed.

------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196268 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
d975a82e08ab15242724bc46e53d58b4ff3e4815 06-Nov-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Handle vectors in getSetCCResultType

I don't have a standalone testcase for this, but it should allow r193676
to be reapplied.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194148 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
d1a4f579bf45aec933c79292b6b9663581438738 16-Oct-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Improve handling of SETCC

We previously used the default expansion to SELECT_CC, which in turn would
expand to "LHI; BRC; LHI". In most cases it's better to use an IPM-based
sequence instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192784 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
e3ba15c794839abe076e3e2bdf6c626396a19d4d 12-Oct-2013 Will Dietz <wdietz2@illinois.edu> Add missing #include's to cctype when using isdigit/alpha/etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192519 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
00f5335ea0b62f0921d215a4d04e2fe5f33771ce 01-Oct-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Extend pseudo conditional 8- and 16-bit stores to high words

As the comment says, we always want to use STOC for 32-bit stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191767 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
5fb8d3144fa5da2b8392b56136163809d8df0527 01-Oct-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Optimize 32-bit FPR<->GPR moves for z196 and above

Floats are stored in the high 32 bits of an FPR, and the only GPR<->FPR
transfers are full-register transfers. This patch optimizes GPR<->FPR
float transfers when the high word of a GPR is directly accessible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
b9dcca8265e9da01119c47e65f114c3adc972ba6 01-Oct-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Allow integer AND involving high words


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191762 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
1ff62e182e648c72e6fce4f9d7911f2edfd914d2 01-Oct-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Allow integer XOR involving high words


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
1c831f7f1f7e869516f5a70c1e6dd8896bef76f5 01-Oct-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Allow integer OR involving high words


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
47086570973e82fe5ea8ace9637ae73c2469e1da 01-Oct-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Allow selects with a high-word destination


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191751 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
55d7d83b6c9e55fa73d667660c8e90f92999385b 01-Oct-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use upper words of GR64s for codegen

This just adds the basics necessary for allocating the upper words to
virtual registers (move, load and store). The move support is parameterised
in a way that makes it easy to handle zero extensions, but the associated
zero-extend patterns are added by a later patch.

The easiest way of testing this seemed to be add a new "h" register
constraint for high words. I don't expect the constraint to be useful
in real inline asms, but it should work, so I didn't try to hide it
behind an option.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
745ca1eed7dc0a056b066f16aea750ce6fa8a530 30-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Rename subregs and add subreg_h32

Use subreg_hNN and subreg_lNN for the high and low NN bits of a register.
List the low registers first, so that subreg_l32 also means the low 32
bits of a 128-bit register.

Floats are stored in the upper 32 bits of a 64-bit register, so they
should use subreg_h32 rather than subreg_l32.

No behavioral change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
514756983e9ba3684a89ed583bf5a98ffb20c203 30-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Rename 32-bit GPR registers

I'm about to add support for high-word operations, so it seemed better
for the low-word registers to have names like R0L rather than R0W.
No behavioral change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191655 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
8dac19c0708c9bd0da0b832014918e00ded44d86 27-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Improve handling of PC-relative addresses

The backend previously folded offsets into PC-relative addresses
whereever possible. That's the right thing to do when the address
can be used directly in a PC-relative memory reference (using things
like LRL). But if we have a register-based memory reference and need
to load the PC-relative address separately, it's better to use an anchor
point that could be shared with other accesses to the same area of the
variable.

Fixes a FIXME.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191524 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
259a6006e89576704e52e7392ef2bfd83f277ce3 25-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Define the GR64 low-word logic instructions as pseudo aliases.

Another patch to avoid duplication of encoding information. Things like
NILF, NILL and NILH are used as both 32-bit and 64-bit instructions.
Here the 64-bit versions are defined as aliases of the 32-bit ones.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191369 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
e39a156b921f47a374f091b43205555ee90cd555 25-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use subregs for 64-bit truncating stores

Another patch to reduce the duplication of encoding information.
Rather than define separate patterns for truncating 64-bit stores,
use the 32-bit stores with a subreg. No behavioral changed intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191365 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
7c7b431d2fa3ead0a2a24c4dd81fc92f293203dd 13-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use getTarget{Insert,Extract}Subreg rather than getMachineNode

Just a clean-up, no behavioral change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190673 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
856bf594338567a592086fe782f2f51650e4e294 13-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Try to fold shifts into TMxx

E.g. "SRL %r2, 2; TMLL %r2, 1" => "TMLL %r2, 4".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190672 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
299fdd814f4c2850d44387d24c440980c5377d3e 10-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add TM and TMY

The main complication here is that TM and TMY (the memory forms) set
CC differently from the register forms. When the tested bits contain
some 0s and some 1s, the register forms set CC to 1 or 2 based on the
value the uppermost bit. The memory forms instead set CC to 1
regardless of the uppermost bit.

Until now, I've tried to make it so that a branch never tests for an
impossible CC value. E.g. NR only sets CC to 0 or 1, so branches on the
result will only test for 0 or 1. Originally I'd tried to do the same
thing for TM and TMY by using custom matching code in ISelDAGToDAG.
That ended up being very ugly though, and would have meant duplicating
some of the chain checks that the common isel code does.

I've therefore gone for the simpler alternative of adding an extra
operand to the TM DAG opcode to say whether a memory form would be OK.
This means that the inverse of a "TM;JE" is "TM;JNE" rather than the
more precise "TM;JNLE", just like the inverse of "TMLL;JE" is "TMLL;JNE".
I suppose that's arguably less confusing though...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190400 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
aff1c6427ce22125adfa29de4145030aa3214a2e 06-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Tweak integer comparison code

The architecture has many comparison instructions, including some that
extend one of the operands. The signed comparison instructions use sign
extensions and the unsigned comparison instructions use zero extensions.
In cases where we had a free choice between signed or unsigned comparisons,
we were trying to decide at lowering time which would best fit the available
instructions, taking things like extension type into account. The code
to do that was getting increasingly hairy and was also making some bad
decisions. E.g. when comparing the result of two LLCs, it is better to use
CR rather than CLR, since CR can be fused with a branch while CLR can't.

This patch removes the lowering code and instead adds an operand to
integer comparisons to say whether signed comparison is required,
whether unsigned comparison is required, or whether either is OK.
We can then leave the choice of instruction up to the normal isel code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190138 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
16277c4698f36a756c540fae326874774156aaed 05-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add NC, OC and XC

For now these are just used to handle scalar ANDs, ORs and XORs in which
all operands are memory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190041 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
8bce43648be1156fdced590beb81aed3915762f1 03-Sep-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add support for TMHH, TMHL, TMLH and TMLL

For now this just handles simple comparisons of an ANDed value with zero.
The CC value provides enough information to do any comparison for a
2-bit mask, and some nonzero comparisons with more populated masks,
but that's all future work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189819 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
477168192c98e1f75a5bc6db3d34a177f327bd34 28-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add support for TMHH, TMHL, TMLH and TMLL

For now just handles simple comparisons of an ANDed value with zero.
The CC value provides enough information to do any comparison for a
2-bit mask, and some nonzero comparisons with more populated masks,
but that's all future work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189469 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
47e70960945ecb33a361987a9745e3dc80a1c78c 28-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Extend memcmp support to all constant lengths

This uses the infrastructure added for memcpy and memmove in r189331.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189458 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
842a1be06c53757e7498c9894abc1431b633a92f 27-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Extend memcpy and memset support to all constant lengths

Lengths up to a certain threshold (currently 6 * 256) use a series of MVCs.
Lengths above that threshold use a loop to handle X*256 bytes followed
by a single MVC to handle the excess (if any). This loop will also be
needed in future when support for variable lengths is added.

Because the same tablegen classes are used to define MVC and CLC,
the patch also has the side-effect of defining a pseudo loop instruction
for CLC. That instruction isn't used yet (and wouldn't be handled correctly
if it were). I'm planning to use it soon though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189331 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
a550b51bac50493db75a7b5788a3f2c3b62fd913 23-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add basic prefetch support

Just the instructions and intrinsics for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189100 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
35c93e4e42d7a35a90e89211fa62f478e25ba0a4 23-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Try reversing comparisons whose first operand is in memory

This allows us to make more use of the many compare reg,mem instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189099 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
df40f8e8ad0aa93defa44b8a136e8d871cfd44ea 21-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Define remainig *MUL_LOHI patterns

The initial port used MLG(R) for i64 UMUL_LOHI but left the other three
combinations as not-legal-or-custom. Although 32x32->{32,32}
multiplications exist, they're not as quick as doing a normal 64-bit
multiplication, so it didn't seem like i32 SMUL_LOHI and UMUL_LOHI
would be useful. There's also no direct instruction for i64 SMUL_LOHI,
so it needs to be implemented in terms of UMUL_LOHI.

However, not defining these patterns means that we don't convert
division by a constant into multiplication, so this patch fills
in the other cases. The new i64 SMUL_LOHI sequence is simpler
than the one that we used previously for 64x64->128 multiplication,
so int-mul-08.ll now tests the full sequence.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188898 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
d95865a2a2daeb7dd8b80c18e7409b28e7e4738a 21-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use FI[EDX]BRA for codegen


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188895 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
8c20158fb0e1e5d747077f065eb0170c5af1fbfa 20-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use SRST to optimize memchr

SystemZTargetLowering::emitStringWrapper() previously loaded the character
into R0 before the loop and made R0 live on entry. I'd forgotten that
allocatable registers weren't allowed to be live across blocks at this stage,
and it confused LiveVariables enough to cause a miscompilation of f3 in
memchr-02.ll.

This patch instead loads R0 in the loop and leaves LICM to hoist it
after RA. This is actually what I'd tried originally, but I went for
the manual optimisation after noticing that R0 often wasn't being hoisted.
This bug forced me to go back and look at why, now fixed as r188774.

We should also try to optimize null checks so that they test the CC result
of the SRST directly. The select between null and the SRST GPR result could
then usually be deleted as dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188779 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
80f54784da0bd42fb79176bbf447a31d69287fe3 19-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add support for sibling calls

This first cut is pretty conservative. The final argument register (R6)
is call-saved, so we would need to make sure that the R6 argument to a
sibling call is the same as the R6 argument to the calling function,
which seems worth keeping as a separate patch.

Saying that integer truncations are free means that we no longer
use the extending instructions LGF and LLGF for spills in int-conv-09.ll
and int-conv-10.ll. Instead we treat the registers as 64 bits wide and
truncate them to 32-bits where necessary. I think it's unlikely we'd
use LGF and LLGF for spills in other situations for the same reason,
so I'm removing the tests rather than replacing them. The associated
code is generic and applies to many more instructions than just
LGF and LLGF, so there is no corresponding code removal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188669 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
19262ee0725a09b7c621a3d2eb66ba1513ae932a 16-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use SRST to implement strlen and strnlen

It would also make sense to use it for memchr; I'm working on that now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188547 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
4fc7355a21e1fa838406e15459aaf54a58fcf909 16-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use MVST to implement strcpy and stpcpy


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188546 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
e1b2af731e2a45344a7c502232f66c55cd746da0 16-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use CLST to implement strcmp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188544 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
ac168b8bc8773a083a10902f64e4ae57a925aee4 12-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use CLC and IPM to implement memcmp

For now this is restricted to fixed-length comparisons with a length
in the range [1, 256], as for memcpy() and MVC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188163 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
e03a56d62fc623e2f72d623b816f91b293d5904b 12-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add a definition of the CLC instruction


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188162 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
8f0ad5ae8f2699f6ab13a229941a0b192273cae8 01-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Reuse CC results for integer comparisons with zero

This also fixes a bug in the predication of LR to LOCR: I'd forgotten
that with these in-place instruction builds, the implicit operands need
to be added manually. I think this was latent until now, but is tested
by int-cmp-45.c. It also adds a CC valid mask to STOC, again tested by
int-cmp-45.c.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187573 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
3237f88882eed8a67fa679f7071a5441c4306ac3 01-Aug-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Prefer comparisons with zero

Convert >= 1 to > 0, etc. Using comparison with zero isn't a win on its own,
but it exposes more opportunities for CC reuse (the next patch).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187571 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
04ded924f3583438c6633823eddb87761fa73cce 31-Jul-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Implement isLegalAddressingMode()

The loop optimizers were assuming that scales > 1 were OK. I think this
is actually a bug in TargetLoweringBase::isLegalAddressingMode(),
since it seems to be trying to reject anything that isn't r+i or r+r,
but it has no default case for scales other than 0, 1 or 2. Implementing
the hook for z means that z can no longer test any change there though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187497 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
6824f127f90197b26af93cf5d6c13b7941567e54 31-Jul-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Be more careful about inverting CC masks

System z branches have a mask to select which of the 4 CC values should
cause the branch to be taken. We can invert a branch by inverting the mask.
However, not all instructions can produce all 4 CC values, so inverting
the branch like this can lead to some oddities. For example, integer
comparisons only produce a CC of 0 (equal), 1 (less) or 2 (greater).
If an integer EQ is reversed to NE before instruction selection,
the branch will test for 1 or 2. If instead the branch is reversed
after instruction selection (by inverting the mask), it will test for
1, 2 or 3. Both are correct, but the second isn't really canonical.
This patch therefore keeps track of which CC values are possible
and uses this when inverting a mask.

Although this is mostly cosmestic, it fixes undefined behavior
for the CIJNLH in branch-08.ll. Another fix would have been
to mask out bit 0 when generating the fused compare and branch,
but the point of this patch is that we shouldn't need to do that
in the first place.

The patch also makes it easier to reuse CC results from other instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187495 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
0416e3c599c22dc656a1115ac983116ad0b2d9da 31-Jul-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Move compare-and-branch generation even later

r187116 moved compare-and-branch generation from the instruction-selection
pass to the peephole optimizer (via optimizeCompare). It turns out that even
this is a bit too early. Fused compare-and-branch instructions don't
interact well with predication, where a CC result is needed. They also
make it harder to reuse the CC side-effects of earlier instructions
(not yet implemented, but the subject of a later patch).

Another problem was that the AnalyzeBranch family of routines weren't
handling compares and branches, so we weren't able to reverse the fused
form in cases where we would reverse a separate branch. This could have
been fixed by extending AnalyzeBranch, but given the other problems,
I've instead moved the fusing to the long-branch pass, which is also
responsible for the opposite transformation: splitting out-of-range
compares and branches into separate compares and long branches.

I've added a test for the AnalyzeBranch problem. A test for the
predication problem is included in the next patch, which fixes a bug
in the choice of CC mask.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187494 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
ea14085be54540be2f5cb4b1444d972972d22c5f 25-Jul-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Rework compare and branch support

Before the patch we took advantage of the fact that the compare and
branch are glued together in the selection DAG and fused them together
(where possible) while emitting them. This seemed to work well in practice.
However, fusing the compare so early makes it harder to remove redundant
compares in cases where CC already has a suitable value. This patch
therefore uses the peephole analyzeCompare/optimizeCompareInstr pair of
functions instead.

No behavioral change intended, but it paves the way for a later patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187116 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
b284e1bf08d24deb20b7deab71fce6f3034cc89a 25-Jul-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add STOC and STOCG

These instructions are allowed to trap even if the condition is false,
so for now they are only used for "*ptr = (cond ? x : *ptr)"-style
constructs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187111 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
a0ec3f9b7b826b9b40b80199923b664bad808cce 14-Jul-2013 Craig Topper <craig.topper@gmail.com> Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186274 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
5e009541973b7935386055066689902aa7134e2d 12-Jul-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Fix parsing of inline asm registers

GPR and FPR constraints like "{r2}" and "{f2}" weren't handled correctly
because the name-to-regno mapping depends on the value type and
(because of that) the internal names in RegStrings are not the
same as the AsmName.

CC constraints like "{cc}" didn't work either because there was no
associated register class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186148 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
e54885af9b54bfc7436a928a48d3db1ef88a2a70 09-Jul-2013 Stephen Lin <stephenwlin@gmail.com> AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and all
in-tree implementations of TargetLoweringBase::isFMAFasterThanMulAndAdd in
order to resolve the following issues with fmuladd (i.e. optional FMA)
intrinsics:

1. On X86(-64) targets, ISD::FMA nodes are formed when lowering fmuladd
intrinsics even if the subtarget does not support FMA instructions, leading
to laughably bad code generation in some situations.

2. On AArch64 targets, ISD::FMA nodes are formed for operations on fp128,
resulting in a call to a software fp128 FMA implementation.

3. On PowerPC targets, FMAs are not generated from fmuladd intrinsics on types
like v2f32, v8f32, v4f64, etc., even though they promote, split, scalarize,
etc. to types that support hardware FMAs.

The function has also been slightly renamed for consistency and to force a
merge/build conflict for any out-of-tree target implementing it. To resolve,
see comments and fixed in-tree examples.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185956 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
f6ea5e0d8007234fc74c1ff6ac2c3ca316c41d92 09-Jul-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use "STC;MVC" for memset

Use "STC;MVC" for memsets that are too big for two STCs or MV...Is yet
small enough for a single MVC. As with memcpy, I'm leaving longer cases
till later.

The number of tests might seem excessive, but f33 & f34 from memset-04.ll
failed the first cut because I'd not added the "?:" on the calculation
of Size1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185918 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
ce1c30ce39f6b1e3008376578d3cf593a4e90d87 08-Jul-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Remove unwanted part from last commit

I was originally going to use MVC for memmove too, but that's less of
a clear win. Remove some accidental left-overs in the previous commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185804 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
dff0009d0ced62b92cb5900bc2203ec40142ba15 08-Jul-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use MVC for memcpy

Use MVC for memcpy in cases where a single MVC is enough. Using MVC is
a win for longer copies too, but I'll leave that for later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185802 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
f349a6e9e6ee0b589c403e0c5785266da121d05c 04-Jul-2013 Jakob Stoklund Olesen <stoklund@2pi.dk> Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.

These exception-related opcodes are not used any longer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185625 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
c93822901aef17aaf8bb1303f27b47025fd1d582 04-Jul-2013 Jakob Stoklund Olesen <stoklund@2pi.dk> Revert r185595-185596 which broke buildbots.

Revert "Simplify landing pad lowering."
Revert "Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes."

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185600 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
62204220e1dc2dc21256adf765728ae257b33eac 04-Jul-2013 Jakob Stoklund Olesen <stoklund@2pi.dk> Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.

These exception-related opcodes are not used any longer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185596 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
35b7bebe1162326c38217ff80d4a49fbbffcc365 02-Jul-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Use DSGFR over DSGR in more cases

Fixes some cases where we were using full 64-bit division for (sdiv i32, i32)
and (sdiv i64, i32).

The "32" in "SDIVREM32" just refers to the second operand. The first operand
of all *DIVREM*s is a GR128.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185435 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
722e9e6d0a5b67d136be40bc015abc5b0b32f97b 27-Jun-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add conditional store patterns

Add pseudo conditional store instructions, so that we use:

branch foo:
store
foo:

instead of:

load
branch foo:
move
foo:
store

z196 has real 32-bit and 64-bit conditional stores, but we don't use
any z196 instructions yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185065 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
5b3fca50a08865f0db55fc92ad1c037a04e12177 22-Jun-2013 Chad Rosier <mcrosier@apple.com> The getRegForInlineAsmConstraint function should only accept MVT value types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184642 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
14a926f13b768ee3771bb944bbbb29529a40dbe1 30-May-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Enable unaligned accesses

The code to distinguish between unaligned and aligned addresses was
already there, so this is mostly just a switch-on-and-test process.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182920 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
6e0b2a0cb0d398f175a5294bf0ad5488c714e8c2 30-May-2013 Andrew Trick <atrick@apple.com> Order CALLSEQ_START and CALLSEQ_END nodes.

Fixes PR16146: gdb.base__call-ar-st.exp fails after
pre-RA-sched=source fixes.

Patch by Xiaoyi Guo!

This also fixes an unsupported dbg.value test case. Codegen was
previously incorrect but the test was passing by luck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
2d664abbfca8b9fa3d99e8a2f74bd52faf007f12 29-May-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Immediate compare-and-branch support

This patch adds support for the CIJ and CGIJ instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182846 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
d50bcb2162a529534da42748ab4a418bfc9aaf06 28-May-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Register compare-and-branch support

This patch adds support for the CRJ and CGRJ instructions. Support for
the immediate forms will be a separate patch.

The architecture has a large number of comparison instructions. I think
it's generally better to concentrate on using the "best" comparison
instruction first and foremost, then only use something like CRJ if
CR really was the natual choice of comparison instruction. The patch
therefore opportunistically converts separate CR and BRC instructions
into a single CRJ while emitting instructions in ISelLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
ac6d9bec671252dd1e596fa71180ff6b39d06b5d 25-May-2013 Andrew Trick <atrick@apple.com> Track IR ordering of SelectionDAG nodes 2/4.

Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
dbd8eb26ce1e7de9b69f5c46f45ba011a706c9b9 22-May-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Rename PSW to CC

Addresses a review comment from Ulrich Weigand. No functional change intended.

I'm not sure whether the old TODO that this patch touches still holds,
but that's something we'd get to when adding a targetted scheduling
description.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182474 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
44b486ed78c60b50aa14d4eed92ee828d4d44293 20-May-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add long branch pass

Before this change, the SystemZ backend would use BRCL for all branches
and only consider shortening them to BRC when generating an object file.
E.g. a branch on equal would use the JGE alias of BRCL in assembly output,
but might be shortened to the JE alias of BRC in ELF output. This was
a useful first step, but it had two problems:

(1) The z assembler isn't traditionally supposed to perform branch shortening
or branch relaxation. We followed this rule by not relaxing branches
in assembler input, but that meant that generating assembly code and
then assembling it would not produce the same result as going directly
to object code; the former would give long branches everywhere, whereas
the latter would use short branches where possible.

(2) Other useful branches, like COMPARE AND BRANCH, do not have long forms.
We would need to do something else before supporting them.

(Although COMPARE AND BRANCH does not change the condition codes,
the plan is to model COMPARE AND BRANCH as a CC-clobbering instruction
during codegen, so that we can safely lower it to a separate compare
and long branch where necessary. This is not a valid transformation
for the assembler proper to make.)

This patch therefore moves branch relaxation to a pre-emit pass.
For now, calls are still shortened from BRASL to BRAS by the assembler,
although this too is not really the traditional behaviour.

The first test takes about 1.5s to run, and there are likely to be
more tests in this vein once further branch types are added. The feeling
on IRC was that 1.5s is a bit much for a single test, so I've restricted
it to SystemZ hosts for now.

The patch exposes (and fixes) some typos in the main CodeGen/SystemZ tests.
A later patch will remove the {{g}}s from that directory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182274 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
12cba852f550ae2d2fdb6b6be28d087aae585a76 16-May-2013 Aaron Ballman <aaron@aaronballman.com> Fixing a 64-bit conversion warning in MSVC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182018 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
1d09d56fe1e3f3faadd4bf4ccf3e585ddb3c3b07 06-May-2013 Ulrich Weigand <ulrich.weigand@de.ibm.com> [SystemZ] Add back end

This adds the actual lib/Target/SystemZ target files necessary to
implement the SystemZ target. Note that at this point, the target
cannot yet be built since the configure bits are missing. Those
will be provided shortly by a follow-on patch.

This version of the patch incorporates feedback from reviews by
Chris Lattner and Anton Korobeynikov. Thanks to all reviewers!

Patch by Richard Sandiford.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181203 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
29074ccf6cb00a3cbe32a3b7809d970ecaf8c9bf 25-Oct-2011 Dan Gohman <gohman@apple.com> Remove the SystemZ backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
28b77e968d2b01fc9da724762bd8ddcd80650e32 06-Sep-2011 Duncan Sands <baldrick@free.fr> Add codegen support for vector select (in the IR this means a select
with a vector condition); such selects become VSELECT codegen nodes.
This patch also removes VSETCC codegen nodes, unifying them with SETCC
nodes (codegen was actually often using SETCC for vector SETCC already).
This ensures that various DAG combiner optimizations kick in for vector
comparisons. Passes dragonegg bootstrap with no testsuite regressions
(nightly testsuite as well as "make check-all"). Patch mostly by
Nadav Rotem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
33390848a7eca75301d04a59b89b516d83e19ee0 08-Jul-2011 Cameron Zwarich <zwarich@apple.com> Add an intrinsic and codegen support for fused multiply-accumulate. The intent
is to use this for architectures that have a native FMA instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
471e4224809f51652c71f319532697a879a75a0d 09-Jun-2011 Eric Christopher <echristo@apple.com> Add a parameter to CCState so that it can access the MachineFunction.

No functional change.

Part of PR6965


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132763 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
fc5d305597ea6336d75bd7f3b741e8d57d6a5105 06-May-2011 Eli Friedman <eli.friedman@gmail.com> Make the logic for determining function alignment more explicit. No functionality change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131012 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
7a2bdde0a0eebcd2125055e0eacaca040f0b766c 15-Apr-2011 Chris Lattner <sabre@nondot.org> Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
95771afbfd604ad003fa3723cac66c9370fed55d 25-Feb-2011 Owen Anderson <resistor@mac.com> Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126518 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
16c29b5f285f375be53dabaa73e3e91107485fe4 10-Jan-2011 Anton Korobeynikov <asl@math.spbu.ru> Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
f1b4eafbfec976f939ec0ea3e8acf91cef5363e3 21-Dec-2010 Chris Lattner <sabre@nondot.org> rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
something that just glues two nodes together, even if it is
sometimes used for flags.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122310 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
bf17cfa3f904e488e898ac2e3af706fd1a892f08 23-Nov-2010 Wesley Peck <peckw@wesleypeck.com> Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
d0c38176690e9602a93a20a43f1bd084564a8116 18-Nov-2010 Anton Korobeynikov <asl@math.spbu.ru> Move hasFP() and few related hooks to TargetFrameInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119740 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
6229d0acb8f395552131a7015a5d1e7b2bae2111 21-Sep-2010 Chris Lattner <sabre@nondot.org> update a bunch of code to use the MachinePointerInfo version of getStore.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114461 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
d1c24ed81c43635d00ff099844a9d0614021a72b 21-Sep-2010 Chris Lattner <sabre@nondot.org> convert the targets off the non-MachinePointerInfo of getLoad.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114410 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
c9403659a98bf6487ab6fbf40b81628b5695c02e 07-Jul-2010 Dan Gohman <gohman@apple.com> Split the SDValue out of OutputArg so that SelectionDAG-independent
code can do calling-convention queries. This obviates OutputArgReg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107786 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
0d881dabc1a4e1aefad6dd38de166d8358285638 07-Jul-2010 Devang Patel <dpatel@apple.com> Propagate debug loc.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107710 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
14152b480d09c7ca912af7c06d00b0ff3912e4f5 06-Jul-2010 Dan Gohman <gohman@apple.com> Reapply r107655 with fixes; insert the pseudo instruction into
the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107691 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
258c58cc6257cf61c9bdbb9c4cea67ba2691adf0 06-Jul-2010 Dan Gohman <gohman@apple.com> Revert r107655.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107668 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
b81c771c0d9ab5a980caf3383932b051eafd1a39 06-Jul-2010 Dan Gohman <gohman@apple.com> Fix a bunch of custom-inserter functions to handle the case where
the pseudo instruction is not at the end of the block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107655 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
ed2ae136d29dd36122d2476801e7d7a86e8301e3 03-Jul-2010 Evan Cheng <evan.cheng@apple.com> Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107550 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
211ffa13519cadfb7f9baf4c8447fa055bf38fe8 19-May-2010 Evan Cheng <evan.cheng@apple.com> Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104147 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
af1d8ca44a18f304f207e209b3bdb94b590f86ff 01-May-2010 Dan Gohman <gohman@apple.com> Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
d858e90f039f5fcdc2fa93035e911a5a9505cc50 17-Apr-2010 Dan Gohman <gohman@apple.com> Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.

SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.

And PIC16's AsmPrinter no longer uses TargetLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
46510a73e977273ec67747eb34cbdb43f815e451 15-Apr-2010 Dan Gohman <gohman@apple.com> Add const qualifiers to CodeGen's use of LLVM IR constructs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
75361b69f3f327842b9dad69fa7f28ae3b688412 08-Apr-2010 Chris Lattner <sabre@nondot.org> rename llvm::llvm_report_error -> llvm::report_fatal_error



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100709 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
362dd0bef5437f85586c046bc53287b6fbe9c099 15-Feb-2010 Anton Korobeynikov <asl@math.spbu.ru> Move TLOF implementations to libCodegen to resolve layering violation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96288 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
7720155bec59b6d418d30576b3d54d79d2a352dd 15-Feb-2010 David Greene <greened@obbligato.org> Remove an assumption of default arguments. This is in anticipation of a
change to SelectionDAG build APIs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96238 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
022d9e1cef7586a80a96446ae8691a37def9bbf4 03-Feb-2010 Evan Cheng <evan.cheng@apple.com> Revert 95130.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95160 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
942619695f4bd77934c09a1cae0fb39ae59edac3 02-Feb-2010 Evan Cheng <evan.cheng@apple.com> Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95130 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
0c439eb2c8397996cbccaf2798e598052d9982c8 27-Jan-2010 Evan Cheng <evan.cheng@apple.com> Eliminate target hook IsEligibleForTailCallOptimization.

Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94626 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
3f2bf85d14759cc4b28a86805f566ac805a54d00 12-Nov-2009 David Greene <greened@obbligato.org> Add a bool flag to StackObjects telling whether they reference spill
slots. The AsmPrinter will use this information to determine whether to
print a spill/reload comment.

Remove default argument values. It's too easy to pass a wrong argument
value when multiple arguments have default values. Make everything
explicit to trap bugs early.

Update all targets to adhere to the new interfaces..


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87022 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
8f9b0f6e881a63875e7c41319eca31751588799a 07-Nov-2009 Chris Lattner <sabre@nondot.org> add some missing #includes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
a1eaa3c52b75d4fe2bcd4f7c52e56c405ee91d3c 28-Oct-2009 Evan Cheng <evan.cheng@apple.com> Add a second ValueType argument to isFPImmLegal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85361 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
aa123224c40078e6230bb2bc0943ddaf483376b9 28-Oct-2009 Dan Gohman <gohman@apple.com> Update SystemZ to use PSW following the way x86 uses EFLAGS. Besides
eliminating a use of MVT::Flag, this is needed for an upcoming CodeGen
change.

This unfortunately requires SystemZ to switch to the list-burr
scheduler, in order to handle the physreg defs properly, however
that's what LLVM has available at this time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85357 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
eb2f969a4ddfb0bc8fdcb5bce3b52e53abff321d 27-Oct-2009 Evan Cheng <evan.cheng@apple.com> Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85281 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
6553155172a2e74feff1253837daa608123de54a 17-Oct-2009 Evan Cheng <evan.cheng@apple.com> Revert 84315 for now. Re-thinking the patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84321 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
bf125583f8bd8196a34921276add7f304b7c1433 17-Oct-2009 Evan Cheng <evan.cheng@apple.com> Rename getFixedStack to getStackObject. The stack objects represented are not
necessarily fixed. Only those will negative frame indices are "fixed."


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84315 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
ce31910eae5bd4896fa6c27798e7b26885691d3b 19-Sep-2009 Evan Cheng <evan.cheng@apple.com> Fix PR4926. When target hook EmitInstrWithCustomInserter() insert new basic blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82311 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
fb2e752e4175920d0531f2afc93a23d0cdf4db14 18-Sep-2009 Evan Cheng <evan.cheng@apple.com> Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes.
Not functionality change yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82273 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
65c3c8f323198b99b88b109654194540cf9b3fa5 02-Sep-2009 Sandeep Patel <deeppatel1987@gmail.com> Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80773 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
4437ae213d5435390f0750213b53ec807c047f22 23-Aug-2009 Chris Lattner <sabre@nondot.org> eliminate uses of cerr()


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79834 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
fc9489a4c6a7ecb8ac4b8567a7d7876b83379b78 21-Aug-2009 Anton Korobeynikov <asl@math.spbu.ru> Expand few nodes until someone will be crazy enough to implement them natively :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
3c2734c82bbd9fd6524a541a85c4a228c6648b9d 21-Aug-2009 Anton Korobeynikov <asl@math.spbu.ru> Handle 'r' inline asm constraint

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79648 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
825b72b0571821bf2d378749f69d6c4cfb52d2f9 11-Aug-2009 Owen Anderson <resistor@mac.com> Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
the latter is capable of representing either a primitive or an extended type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
e50ed30282bb5b4a9ed952580523f2dda16215ac 11-Aug-2009 Owen Anderson <resistor@mac.com> Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
98ca4f2a325f72374a477f9deba7d09e8999c29b 05-Aug-2009 Dan Gohman <gohman@apple.com> Major calling convention code refactoring.

Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.

This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.

This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
f0144127b98425d214e59e4a1a4b342b78e3642b 28-Jul-2009 Chris Lattner <sabre@nondot.org> Rip all of the global variable lowering logic out of TargetAsmInfo. Since
it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.

Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.

This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
CStringSection_. Factor the code better.
5. fixes some bugs in string lowering on ELF targets.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77294 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
e922c0201916e0b980ab3cfe91e1413e68d55647 22-Jul-2009 Owen Anderson <resistor@mac.com> Get rid of the Pass+Context magic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76702 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
e748285e1bd5f2565ed2653919380216619dc5cd 21-Jul-2009 Eli Friedman <eli.friedman@gmail.com> Missed a piece of the commit to remove the shift flavor.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
6323a83e2c5e5434a1646e2a08a7901dd7bd8147 18-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Expand frem

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76315 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
6d94eff354278c398caed16fb992d9df59c69336 18-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Turn abort() into unreachable

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76314 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
31e874490a259a19c31c4dad9ee3365ea2c0cd8f 18-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Turn few asserts into errors / unreachable's

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76313 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
0cca06905b6b426df60dda50f944de90c98a813b 18-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Provide expansion for ct* intrinsics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76311 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
e37a37de77c7ad2708b057ae5a158abe67fc730e 18-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Expand sext_inreg for i1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76310 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
7df8462038c4393771a0961c60a2686169e4fd9a 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Unbreak

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76064 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
bb8a04806d6409fdeae04d1f662e0f0682596d41 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Expand 32-bit bitconverts via memory

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76050 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
c1a1e4adb72b547bbd80c7ad2594baa581542111 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> i32 values are passed extended also on stack. Handle this in generic way

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76047 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
159ac63ba19f17f82df8975208bdad16ebd01c0f 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> We definitely have 1-0 bools

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76046 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
361a78756b35c886aa3d01d3bd40c2adcf56cce2 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Out GR128 regclass is not a 'real' i128 one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76044 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
05a0b8bc661b5a1565c54e021c353ef191fa3f61 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Handle bitconverts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76042 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
98db78a28b73d01af809be71cbacc9f4093acd74 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Expand fp_to_uint too

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76040 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
20d062fcc1151a8660db6e4132e7defea95ee150 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> We don't have FP truncstores

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76039 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
a89430e468a10b990306af9ab75dff83d7ec0928 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Expand uint_to_fp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76038 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
1ada84daaf34ea8e30e5dcb8a7970416606fdd83 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Make FP zero to be legal FP immediate via LOAD ZERO

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76034 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
85c5c3f138257eb8db8f7afc9c0543ee48d88201 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Proper FP extloads

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76028 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
299dc78d67c63d9ea365a3b39a418998c26096ab 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Add proper PWS impdef's

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76027 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
da723d7d9191b5710ea783f4a57c83a0c7087748 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Propagate FP select_cc to dag inserters

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
9b4ae577ce292e9bca419cc90120d4df0a861589 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> We don't have native sine / cosine instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76021 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
23eff5c75a3d1ab9d2901a1cd39e0b1302957007 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> We don't have any FP extloads

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76018 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
10c086cd776f94c75e996f8d56165b6bdd439241 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Implement all comparisons

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76017 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
ae53567de16cae164f98d2b06317e062d96c728a 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Add constpool lowering / printing

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76016 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
0e31d5cf80b6efb6f7a9ca7778503c575a8038e9 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Allow FP arguments pass / return

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76015 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
2c97ae8826371dc5b4dc119d7576443ebd39b7b2 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Register FP regclasses

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76014 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
6fe326c713c25e33e7e3ea3d1202ba19a19090c5 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Implement 'large' PIC model

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76006 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
48e8b3cc5841f0652430aa9f0ce3eb9fa09bdcda 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Implement shifts properly (hopefilly - finally!)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76005 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
0a42d2b4376526dbef25834b29a39fa684f9a902 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Properly handle divides. As a bonus - implement memory versions of them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76003 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
980d5503c3ff586209df7a1744212b59c72787cf 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Emit proper lowering of load from arg stack slot

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75986 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
c772c4408e85afad5c239b7212503e5746e2450b 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Implement dynamic allocas

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75985 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
c16cdc5de7a319523d69f4e335ffbfe21ec9348b 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Add jump tables

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75984 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
983d3a1ee521d8d3ecbbd03a379f33a00a3d0690 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Exapnd br_jt into indirect branch. Provide pattern for indirect branches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75983 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
22836d1b31e553ef3b60cede659889365aaf672a 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Proper lower 'small' results

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75962 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
bad769f11aadb0b4aef1c998d2cbbfdb47de12da 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Lower addresses of globals

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75960 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
8d1837d9bebdc36fb67e0291cb23bc6bce43d44d 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Provide "wide" muls and divs/rems

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75958 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
dd0239b42c8dc94fd3ab264ed11c4036bf3eda03 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Preliminary mul lowering

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75951 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
bf0221771f6e58eeb60e9b259788e651a1b46089 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> More extloads

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75950 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
7d1e39b7c62265637ea821136e83aa66afa2aad4 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> SELECT_CC lowering

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75948 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
4ec3e5ffd10b23c3614cd9a766c2a3ec1fe62ba4 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Conditional branches and comparisons

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75947 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
c7b71bede49dc1eae107c79a74b5c618c39506ac 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Emit correct offset for PseudoSourceValue

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75946 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
656ac6f0f6f728ddc178f92c25b2278d23ff4e61 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Provide proper stack offsets for outgoing arguments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75945 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
ba249e41f3ffa9e947b9173e3965385ec6324ffb 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Some preliminary call lowering

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75941 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
c8301d17a861ef47c7b01a486391f288b035e692 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Add mem-imm stores

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75933 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
9e4816e09f50e3c4ef7368a188966944b8167ab4 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Add shifts and reg-imm address matching

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75927 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
a51752cbea5d57956f177470f463baeeee33f3d7 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Add bunch of 32-bit patterns... Uffff :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75926 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
e0167c1d5a5418dbcd61716164688bdd21a716ac 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Add 32 bit subregs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75923 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
87a24e3ee43559fc4d1c6a7f442d49d1e3ccf663 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Minimal lowering for formal_arguments / ret

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75911 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
4403b930f867f61b48304a23a6843026b0b9a32a 16-Jul-2009 Anton Korobeynikov <asl@math.spbu.ru> Let's start another backend :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75909 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp