| dbe13c105faafed6823c32ed37596f530577be91 |
|
02-Oct-2012 |
Oliver McFadden <oliver.mcfadden@linux.intel.com> |
Revert "i965: Implement guardband clipping on Sandybridge."
This reverts commit 85cd30406ff8414bc6ac6de1064d059a4c564160.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55523
Signed-off-by: Oliver McFadden <oliver.mcfadden@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
|
| 6d7ebb21f8848a4a407e458e2772a45f9c3bd28a |
|
18-Jun-2012 |
Paul Berry <stereotype441@gmail.com> |
i965/msaa: Adapt clip setup for centroid noperspective interpolation.
To save time, we only instruct the clip stage of the pipeline to
compute noperspective barycentric coordinates if those coordinates are
needed by the fragment shader. Previously, we would determine whether
the coordinates were needed by seeing whether the fragment shader used
the BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC interpolation mode.
However, with MSAA, it's possible that the fragment shader might use
BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC instead. In the future,
when we support ARB_sample_shading, it might use
BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC.
This patch modifies the upload_clip_state() functions to check for all
three possible noperspective interpolation modes.
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| 85cd30406ff8414bc6ac6de1064d059a4c564160 |
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05-May-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Implement guardband clipping on Sandybridge.
Improves performance in Citybench:
- 320x240: 19.8008% +/- 0.937818%
- 1280x480: 6.53856% +/- 0.859083%
No apparent difference in OpenArena nor Xonotic.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| 83871566207d6692d1f20e4b666adb5dd0628dc3 |
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15-Feb-2012 |
Eric Anholt <eric@anholt.net> |
i965/gen6+: Avoid recomputing whether we use noperspective.
Improves VS state change microbenchmark performance 2.38246% +/-
1.15046% (n=20).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| 7b36c68ba6899c7f30fd56b7ef07a78b027771ac |
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26-Jan-2012 |
Chad Versace <chad.versace@linux.intel.com> |
i965: Rewrite the HiZ op
The HiZ op was implemented as a meta-op. This patch reimplements it by
emitting a special HiZ batch. This fixes several known bugs, and likely
a lot of undiscovered ones too.
==== Why the HiZ meta-op needed to die ====
The HiZ op was implemented as a meta-op, which caused lots of trouble. All
other meta-ops occur as a result of some GL call (for example, glClear and
glGenerateMipmap), but the HiZ meta-op was special. It was called in
places that Mesa (in particular, the vbo and swrast modules) did not
expect---and were not prepared for---state changes to occur (for example:
glDraw; glCallList; within glBegin/End blocks; and within
swrast_prepare_render as a result of intel_miptree_map).
In an attempt to work around these unexpected state changes, I added two
hooks in i965:
- A hook for glDraw, located in brw_predraw_resolve_buffers (which is
called in the glDraw path). This hook detected if a predraw resolve
meta-op had occurred, and would hackishly repropagate some GL state
if necessary. This ensured that the meta-op state changes would not
intefere with the vbo module's subsequent execution of glDraw.
- A hook for glBegin, implemented by brwPrepareExecBegin. This hook
resolved all buffers before entering
a glBegin/End block, thus preventing an infinitely recurring call to
vbo_exec_FlushVertices. The vbo module calls vbo_exec_FlushVertices to
flush its vertex queue in response to GL state changes.
Unfortunately, these hooks were not sufficient. The meta-op state changes
still interacted badly with glPopAttrib (as discovered in bug 44927) and
with swrast rendering (as discovered by debugging gen6's swrast fallback
for glBitmap). I expect there are more undiscovered bugs. Rather than play
whack-a-mole in a minefield, the sane approach is to replace the HiZ
meta-op with something safer.
==== How it was killed ====
This patch consists of several logical components:
1. Rewrite the HiZ op by replacing function gen6_resolve_slice with
gen6_hiz_exec and gen7_hiz_exec. The new functions do not call
a meta-op, but instead manually construct and emit a batch to "draw"
the HiZ op's rectangle primitive. The new functions alter no GL
state.
2. Add fields to brw_context::hiz for the new HiZ op.
3. Emit a workaround flush when toggling 3DSTATE_VS.VsFunctionEnable.
4. Kill all dead HiZ code:
- the function gen6_resolve_slice
- the dirty flag BRW_NEW_HIZ
- the dead fields in brw_context::hiz
- the state packet manipulation triggered by the now removed
brw_context::hiz::op
- the meta-op workaround in brw_predraw_resolve_buffers (discussed
above)
- the meta-op workaround brwPrepareExecBegin (discussed above)
Note: This is a candidate for the 8.0 branch.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Paul Berry <stereotype441@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43327
Reported-by: xunx.fang@intel.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44927
Reported-by: chao.a.chen@intel.com
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| 12498553462c7807034814cf843d86d52c407380 |
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16-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
i965/gen6: Manipulate state batches for HiZ meta-ops [v4]
A lot of the state manipulation is handled by the meta-op state setup.
However, some batches need manual intervention.
v2:
Do not special-case the 3DSTATE_DEPTH_STENCIL.Depth_Test_Enable bit
for HiZ in gen6_upload_depth_stencil(). The HiZ meta-op sets
ctx->Depth.Test, just read the value from that.
v3:
Add a new dirty flag, BRW_STATE_HIZ, for brw_tracked_state. Flag it
immediately before and after executing the HiZ operation in
gen6_resolve_slice(). Add the flag to the the dirty bits for the
following state packets:
gen6_clip_state
gen6_depth_stencil_state
gen6_sf_state
gen6_wm_state
v4:
- Add BRW_NEW_STATE_HIZ to the dirty bit table in brw_state_upload.c.
This is needed for INTEL_DEBUG=state.
- Align brw dirty bit for gen6_depth_stencil_state.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| 5aa96286e7e1a5380673eb75e8653616b48751fd |
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22-Oct-2011 |
Paul Berry <stereotype441@gmail.com> |
i965/gen6+: Add support for noperspective interpolation.
This required the following changes:
- WM setup now makes the appropriate set of barycentric coordinates
(perspective vs. noperspective) available to the fragment shader,
based on whether the shader requires perspective interpolation,
noperspective interpolation, both, or neither.
- The fragment shader backend now uses the appropriate set of
barycentric coordiantes when interpolating, based on the
interpolation mode returned by
ir_variable::determine_interpolation_mode().
- SF setup now uses gl_fragment_program::InterpQualifier to determine
which attributes are to be flat shaded (as opposed to the old logic,
which only flat shaded colors).
- CLIP setup now ensures that the clipper outputs non-perspective
barycentric coordinates when they are needed by the fragment shader.
Fixes the remaining piglit tests of interpolation qualifiers that were
failing:
- interpolation-flat-*-smooth-none
- interpolation-flat-other-flat-none
- interpolation-noperspective-*
- interpolation-smooth-gl_*Color-flat-*
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| 018ea68d8780ab5baeef0b8122b8410e5e55ae6d |
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27-Sep-2011 |
Paul Berry <stereotype441@gmail.com> |
i965 Gen6+: De-compact clip planes.
Previously, if the user enabled a non-consecutive set of clip planes
(e.g. 0, 1, and 3), the driver would compact them down to a
consecutive set starting at 0. This optimization was of dubious
value, and complicated the implementation of gl_ClipDistance.
This patch changes the driver so that with Gen6 and later chipsets, we
no longer compact the clip planes. However, we still discard any clip
planes beyond the highest number that is in use, so performance should
not be affected for applications that use clip planes consecutively
from 0.
With chipsets previous to Gen6, we still compact the clip planes,
since the pre-Gen6 clipper thread relies on this behavior.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| c163072197b56e76b656cc472bbe6df650cf11ba |
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28-Sep-2011 |
Paul Berry <stereotype441@gmail.com> |
mesa: Create _mesa_bitcount_64() to replace i965's brw_count_bits()
The i965 driver already had a function to count bits in a 64-bit uint
(brw_count_bits()), but it was buggy (it only counted the bottom 32
bits) and it was clumsy (it had a strange and broken fallback for
non-GCC-like compilers, which fortunately was never used). Since Mesa
already has a _mesa_bitcount() function, it seems better to just
create a _mesa_bitcount_64() function rather than special-case this in
the i965 driver.
This patch creates the new _mesa_bitcount_64() function and rewrites
all of the old brw_count_bits() calls to refer to it.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| a864b82a04efd0642f5b2a9489b3c20dac46551f |
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21-Sep-2011 |
Paul Berry <stereotype441@gmail.com> |
i965: allow for nonconsecutive elements of gl_ClipDistance to be enabled.
When using user-defined clipping planes, the i965 driver compacts the
array of clipping planes so that disabled clipping planes do not
appear in it--this saves precious push constant space and makes it
easier to generate the pre-GEN6 clip program. As a result, when
enabling clipping planes in GEN6+ hardware, we always enable clipping
planes 0 through n-1 (where n is the number of clipping planes
enabled), regardless of which clipping planes the user actually
requested.
However, we can't do this when using gl_ClipDistance, because it would
be prohibitively complex to compact the gl_ClipDistance array inside
the user-supplied vertex shader. So, when enabling clipping planes in
GEN6+ hardware, if gl_ClipDistance is in use, we need to pass the
user-supplied enable flags directly through to the hardware rather
than just enabling the first n planes.
Fixes Piglit test vs-clip-distance-enables.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| c6175d78705aaca23fc5561a3a73be0b6a952b27 |
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17-May-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Add _NEW_LIGHT to Gen6 clip state dirty bits.
ctx->Light.ProvokingVertex depends on _NEW_LIGHT.
Found by inspection.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| e6e5c1f46d374015d924522ed0b2bf2443c3e6d4 |
|
24-Feb-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Increase Sandybridge point size clamp in the clip state.
255.875 matches the hardware documentation. Presumably this was a typo.
NOTE: This is a candidate for the 7.10 branch, along with
commit 2bfc23fb86964e4153f57f2a56248760f6066033.
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| e31defc825ee94f1d1092e277954abad7097c552 |
|
04-Jan-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Rename various gen6 #defines to match the documentation.
This should make it easier to cross-reference the code and hardware
documentation, as well as clear up any confusion on whether constants
like CMD_3D_WM_STATE mean WM_STATE (pre-gen6) or 3DSTATE_WM (gen6+).
This does not rename any pre-gen6 defines.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| 9977297ad9bc0e816810bd3a39d89e5c1cffff72 |
|
04-Jan-2011 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
i965: Fix provoking vertex select in clip state for sandybridge
Triangle fan provoking vertex for first convention should be
'vertex 1' in sandybridge clip state.
Partly fix glean/clipFlat case
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| 5ff6ed2b975d56e0e9ab363e2dc756ce93c78803 |
|
07-Dec-2010 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: set minimum/maximum Point Width on Sandybridge
It is used for point width on vertex. This fixes mesa demo spriteblast and pointblast.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| e30a3e7aa09c373c0a02df555d090693718f0fe8 |
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27-Oct-2010 |
Eric Anholt <eric@anholt.net> |
i965: Add user clip planes support to gen6.
Fixes piglit user-clip, and compiz desktop switching when dragging a
window and using just 2 desktops. Bug #30446.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| 2595589f1df351895bc5b1a92f19e995a19da15b |
|
19-Oct-2010 |
Eric Anholt <eric@anholt.net> |
i965: Remove the gen6 emit_mi_flushes I sprinkled around the driver.
These were for debugging in bringup. Now that relatively complicated
apps are working, they haven't helped debug anything in quite a while.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
|
| f9995b30756140724f41daf963fa06167912be7f |
|
12-Oct-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Drop GLcontext typedef and use struct gl_context instead
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
|
| f31771343259d195ba243ce8d307831e495d5a2c |
|
02-Oct-2010 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Fix incorrect batchbuffer size in gen6 clip state command.
FORCE_ZERO_RTAINDEX should be in the fourth (and final) dword.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| 03218a00932e83f0ffd0c3077bbbe65a7765c572 |
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17-Sep-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
i965: force zero in clipper to ignore RTAIndex on sandybridge
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| 10069916c71d55ddaeca793f5dade203a8b42da5 |
|
22-Mar-2010 |
Eric Anholt <eric@anholt.net> |
i965: Enable normal clipping on SNB.
Rejecting all doesn't seem to be helping get the pipeline lit up.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| c76d4db25260dd68684bf784efacd7323c7cab8b |
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26-Feb-2010 |
Vinson Lee <vlee@vmware.com> |
i965: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| 0fbc0b0c172060ce5dd946fe33a43d9194ab45d0 |
|
17-Dec-2009 |
Eric Anholt <eric@anholt.net> |
i965: Enable clip stats.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| d971375bc1872cb2d95a710e3d62f5b037fbe7f7 |
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29-Jan-2010 |
Eric Anholt <eric@anholt.net> |
i965: Giant pile of flushing to track down SNB bringup issues.
This should go away before we push the code.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
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| f58fbcf7618bcc6ef9da8e8939100b14ea4d584b |
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29-Jan-2010 |
Eric Anholt <eric@anholt.net> |
i965: Add untested REJECT_ALL clip state.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_clip_state.c
|