| 67e9ae856355be532455c1cf1211d59b3a4c5992 |
|
27-Aug-2012 |
Eric Anholt <eric@anholt.net> |
i965: Disable the swrast context setup on GL 3.1 core.
I've reviewed the code, and the swrast callsites remaining are all in
drawpixels/copypixels/bitmap/accum, or _swrast_BlitFramebuffer that shouldn't
be hit. A piglit run with the context setup disabled on legacy GL and GLES2
showed regressions only in the copypixels and drawpixels tests.
If the context type is forced, this reduces the shader_runner maximum heap
size for glsl-algebraic-add-add-1.shader_test from 15,137,496b to 4,165,376b.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| b0d23b66cf2514949650bdfa9c918ab2fb1d8986 |
|
27-Aug-2012 |
Eric Anholt <eric@anholt.net> |
intel: Move RenderMode fallback func to i915 driver.
The Fallback field of the context struct doesn't work that way on i965, and
it's the only caller of FALLBACK() in the driver.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 5e3c093ff866b74fbf6483ece671edbf5eb3ae7a |
|
27-Aug-2012 |
Eric Anholt <eric@anholt.net> |
i965: Drop support for forcing drawing through sw fallbacks.
It turns out it hasn't worked since at least 8.0.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1938501fbfb5052b1de7d78dc7ca8a8738f814e2 |
|
09-Aug-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Fix rendering to a multisample front buffer
We need to downsample before flushing BUFFER_FAKE_FRONT_LEFT to
BUFFER_FRONT_LEFT in intel_flush_front.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a43599d1d1a583b25c0a63c28c0a5001387fa518 |
|
09-Aug-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Clean up intel_flush_front
Stop repeating ourselves. Replace the 4 instances of
`driContext->driDrawablePriv` with `driDrawable`.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 38b748ce29a6415558bbe4886589134e3db047c8 |
|
09-Aug-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Refactor intel_downsample_for_dri2_flush
Move it from intel_screen.c to intel_context.c. Redeclare as non-static.
A future commit will use it in multiple files.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 79198063b8adb23536b291081f8df8571926950e |
|
12-Jul-2012 |
Eric Anholt <eric@anholt.net> |
intel: Rename INTEL_DEBUG=fall to INTEL_DEBUG=perf.
I want to introduce some more debug output for performance surprises that
includes fallbacks, but aren't necessarily software rasterization. Leave
INTEL_DEBUG=fall in place for those that have used that flag before.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f4873babdc27f697df9f4642209eca21a02ac476 |
|
19-Jul-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Allocate miptree for multisample DRI2 buffers
Immediately after obtaining, with DRI2GetBuffersWithFormat, the DRM buffer
handle for a DRI2 buffer, we wrap that DRM buffer handle with a region and
a miptree. This patch additionally allocates an accompanying multisample
miptree if the DRI2 buffer is multisampled.
Since we do not yet advertise multisample GL configs, the code for
allocating the multisample miptree is currently inactive.
This patch adds the following fields to intel_mipmap_tree:
singlesample_mt
needs_downsample
and the following function stubs:
intel_miptree_downsample
intel_miptree_upsample
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 4b40375c438f9a10231dabedcf72bf6f27bbe327 |
|
06-Aug-2012 |
Paulo Zanoni <paulo.r.zanoni@intel.com> |
i965: add more Haswell PCI IDs
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| fadc9eaf97c0916d5680c1d3b47e80532ede22c1 |
|
04-Jul-2012 |
Eric Anholt <eric@anholt.net> |
intel: Add a comment explaining why we early return on matching BO names.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 2b311fd8024ab20065568236bdc60b9f69706d4c |
|
04-Jul-2012 |
Eric Anholt <eric@anholt.net> |
intel: Drop other checks for old loader version.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1b4374d364f877d1b7d01e1231adeee2e0f63a4d |
|
04-Jul-2012 |
Eric Anholt <eric@anholt.net> |
intel: Replace the non-getBuffersWithFormat compat path with an error message.
It's been broken (using NULL getBuffersWithFormat() instead of
getBuffers()) due to a copy and paste error for a year now.
GetBuffersWithFormat has been around since 2009, so I don't feel any
guilt in not supporting it.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| bce58e155db7202a98642c10e6132dee4e08162b |
|
04-Jul-2012 |
Eric Anholt <eric@anholt.net> |
intel: Convert to using private depth/stencil buffers (v2)
This means that GLX buffer sharing of these no longer works. On the
other hand, just *look* at this code reduction.
v2:
- [chad] Fix intelCreateBuffer for gen < 6. When the branch for
!screen->hw_has_separate_stencil was taken,
intel_create_private_renderbuffer was incorrectly not used.
- [chad] Remove all code in intel_process_dri2_buffer for processing
depth, stencil, and hiz buffers. That code is now dead.
CC: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| fb79ecb62d41332c535bd5fd9c229a85c79c468b |
|
01-Jun-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Change vendor string to "Intel Open Source Technology Center".
Tungsten Graphics has not existed for several years, and the majority of
ongoing development and support is done by Intel. I chose to include
"Open Source Technology Center" to distinguish it from, say, the closed
source Windows OpenGL driver.
The one downside to this patch is that applications that pattern match
against "Intel" may start applying workarounds meant for the Windows
driver. However, it does seem like the right thing to do.
This does change oglconform behavior.
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Acked-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 88128516d43be5d25288ff5b64db63cda83c04b3 |
|
24-May-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Gut the separate OpenGL ES extension enabling.
We should just set the bits of functionality that we support; the
GL/ES1/ES2 flags in extensions.c will take care of advertising the
appropriate extensions for the current API.
This enables the GL_EXT_texture_compression_dxt1 extension on ES1/ES2
when libtxc_dxtn is installed or the force_s3tc driconf option is set.
The main extension code set this up properly, but the ES-specific code
failed to do so.
Otherwise, the extension strings reported by es1_info, es2_info, and
glxinfo all remain the same.
This patch manually disables the ARB_framebuffer_object bit on ES
to preserve the behavior of 1c0f5d8324c4db2720247989ddc4a45315b55a85.
v2: Rebase, fix the i915 Makefile, and unconditionally set the
OES_draw_texture bit as core Mesa will only apply it to ES1 now.
Tested-by: Daniel Charles <daniel.charles@intel.com> [v1]
Reviewed-by: Chad Versace <chad.versace@linux.intel.com> [v1]
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1b87a93983c4f217bf7cb4e422de39e418291e39 |
|
06-May-2012 |
Paul Berry <stereotype441@gmail.com> |
intel: When AUB dumping, flush before emitting final bitmap command.
When we are generating an AUB dump, we make a final call to
aub_dump_bmp() as the context is being destroyed, to ensure that any
rendering performed before the application exits can be seen during a
simulation run. However, we were doing this before flushing the batch
buffer; as a result simulation runs would not always see the effect of
all rendering commands.
This patch flushes the batch buffer just before making the final call
to aub_dump_bmp(), to ensure that all rendering is properly captured
in the final bitmap.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 4433b0302d0aa9dc61002e8bb4fd1b752b0be338 |
|
20-Apr-2012 |
Brian Paul <brianp@vmware.com> |
intel: use _mesa_is_winsys/user_fbo() helpers
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a27c7d80afc3160a0face4b8781bf921229bc3cc |
|
06-Apr-2012 |
Paul Berry <stereotype441@gmail.com> |
i965: Stop lying about cpp and height of a stencil buffer.
When using a separate stencil buffer, i965 requires that the pitch of
the buffer (in the 3DSTATE_STENCIL_BUFFER command) be specified as 2x
the actual pitch.
Previously this was accomplished by doubling the "cpp" and "pitch"
values stored in the intel_region data structure, and halving the
height. However, this was confusing, and it led to a subtle (but
benign) bug: since a stencil buffer is W-tiled, its true height must
be aligned to a multiple of 64; we were accidentally aligning its faux
height to a multiple of 64, causing memory to be wasted.
Note that for window system stencil buffers, the DDX also doubles the
cpp and pitch values. To facilitate fixing this DDX server bug in the
future, we fix the cpp and pitch values we receive from the X server
only if cpp has the "incorrect" value of 2.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
v2: Clarify comments about the DDX.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 252d3118dd40e9e3c577702b4c65a2d6cfd343b6 |
|
30-Mar-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
i965/aub: Dump a final bitmap from DestroyContext.
Certain applications don't call SwapBuffers before exiting. Yet, we'd
really like to see a bitmap containing the final rendered image even if
they choose never to present it.
In particular, Piglit tests (at least with -auto -fbo) fall into this
category. Many of them failed to dump any images at all.
Dumping one final image at context destruction time seems to work.
We may wish to pursue a more elegant solution later.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a45247fb1b8c30c5be21c3baf84943920ae17bfb |
|
31-Mar-2012 |
Eugeni Dodonov <eugeni.dodonov@intel.com> |
intel: add PCI IDs for Ivy Bridge GT2 server variant
Those IDs are used by Bromolow.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| bd2410b48df261251f75c2c69785c8cc3182d94d |
|
19-Mar-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Add some PCI IDs for Haswell.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1ba8c6ad03a3f03ecc6b66e1c0e10a4d6010122f |
|
07-Mar-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Disable HiZ on Haswell for now.
Getting HiZ working means updating all the state packets for resolves
and clears. It's not worth doing until we get the basics working.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 180aecb6dce1df55eae674f0f72adbc6f4d872b9 |
|
13-Aug-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Add initial IS_HASWELL() macros.
For now, these all return 0, as I don't yet want to enable Haswell
support. Eventually they will be filled in with proper PCI IDs.
Also add an is_haswell field similar to is_g4x to make it easy to
distinguish Gen7 and Gen7.5.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 8d9decb75f0df564abaf9888d9fc5c77de8059cd |
|
16-Mar-2012 |
Dylan Noblesmith <nobled@dreamwidth.org> |
intel: fix null dereference processing HiZ buffer
Or technically, a near-null dereference.
https://bugs.freedesktop.org/show_bug.cgi?id=46303
https://bugs.freedesktop.org/show_bug.cgi?id=46739
NOTE: This is a candidate for the 8.0 branch.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 0247d89183e26fbd07e4176ff6f8d1b4989e24ab |
|
07-Mar-2012 |
Eric Anholt <eric@anholt.net> |
intel: Ask libdrm to dump an AUB file if INTEL_DEBUG=aub.
It also asks for BMPs in the aub file at SwapBuffers time.
Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| d09fce51f0cf91c9c07f69063fe2180cc319d8df |
|
06-Mar-2012 |
Eric Anholt <eric@anholt.net> |
i965: Change the hiz-override env var to a driconf option.
The force-enable option is dropped, now that the hardware we were
concerned about has HiZ on by default. Now, instead of doing
INTEL_HIZ=0 to test disabling hiz, you can set hiz=false.
v2: Disable separate stencil on gen6 when HIZ is turned off.
(previously, this had to be done manually in addition).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 67d3ff760a33f3f98b89d3a6422bb85c199a9963 |
|
06-Mar-2012 |
Eric Anholt <eric@anholt.net> |
intel: Drop the INTEL_STRICT_CONFORMANCE environment variable.
If you want to test the graphics driver, you want to test it under the
conditions that users will see, not some set of additional fallbacks.
If you want to test swrast, run the swrast driver (or no_rast=true)
instead.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f172eae8b23d0612865895c52af745021ae20a4c |
|
02-Mar-2012 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
i965: fixup W-tile offset computation to take swizzling into account
There's even a comment in the code containing the right swizzling
computations!
Previously this has not been noticed because we need to manually
enabled swizzling on snb/ivb (kernel 3.4 will do that) and we
don't use the separate stencil on ilk (where the bios enables
swizzling). This fixes
piglit ./bin/fbo-stencil readpixels GL_DEPTH32F_STENCIL8 -auto
on recent drm-intel-next kernels.
Also remove the comment about ivb, it's stale now.
Swizzling detection is done by allocating a temporary x-tiled
buffer object. Unfortunately kernels before v3.2 lie on snb/ivb
because they claim that swizzling is enable, but it isn't. The
kernel commit that fixes this for backport to pre-v3.2 is
commit acc83eb5a1e0ae7dbbf89ca2a1a943ade224bb84
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Mon Sep 12 20:49:16 2011 +0200
drm/i915: fix swizzling on gen6+
But if the kernel doesn't lie, this now works on swizzling and
not swizzling machines.
NOTE: This is a candidate for the 8.0 branch.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 3ff527fb6860f23795f86e9b85f3f66475796543 |
|
20-Feb-2012 |
Brian Paul <brianp@vmware.com> |
intel: remove MAX_WIDTH usage in intelInitContext()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 7def293204977c41ea35198af147f743a31b1889 |
|
01-Feb-2012 |
Eugeni Dodonov <eugeni.dodonov@intel.com> |
intel: verify if hardware has LLC support
Rely on libdrm HAS_LLC parameter to verify if hardware supports it. In
case the libdrm version does not supports this check, fallback to older
way of detecting it which assumed that GPUs newer than GEN6 have it.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 69c8f468ba93dc2999d4fde8909f8051e910929a |
|
24-Jan-2012 |
Marek Olšák <maraeo@gmail.com> |
mesa: remove ctx->Const.sRGBCapable
It always had the same value as ctx->Extensions.EXT_framebuffer_sRGB.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 9f8ed9d66298e2dc5dff508e3ea723469fe06d93 |
|
16-Jan-2012 |
Brian Paul <brianp@vmware.com> |
intel: derive intel_renderbuffer from swrast_renderbuffer
Drivers that rely on swrast need to do this, as with swrast_texture_image.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 924de7dc96f4607cb3d833637b5f69f4b9e2a6d0 |
|
16-Jan-2012 |
Brian Paul <brianp@vmware.com> |
intel: use intel_rb_format() to get renderbuffer format
This will make future changes cleaner and less invasive.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| b890f1090c6d640605d5c45cfcf71cef91d59865 |
|
16-Dec-2011 |
Eric Anholt <eric@anholt.net> |
intel: Make the batchbuffer flush debug more useful.
We were printing out the line triggering the flush, but a variety of
different causes just printed the line number for intel_flush()'s call
of intel_batchbuffer_flush(). Plumb the line numbers from the caller
of intel_flush() on through.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 27505a105a4bf8b7329b87d29e1625e545508e4e |
|
16-Nov-2011 |
Eric Anholt <eric@anholt.net> |
i915: Move the texture format setup for this driver out of shared code.
The i965 driver is now enabling all of these formats on its own from
the surface format table.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 899e6ea8d3cac3f60c60935d59e020094b4b79a7 |
|
16-Nov-2011 |
Eric Anholt <eric@anholt.net> |
i965: Drop intel_context.c's texture format set up for this driver.
This is a no-op change on gen6, but should result in some
actually-unsupported formats on gen4 no longer being chosen (like
RGBA_FLOAT32 now being RGBA_FLOAT16).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a2e44b0813e956440c451c107cf5564b56cbe98e |
|
17-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Replace intel_mipmap_tree::hiz_region with a miptree [v2]
This is required to correctly implement HiZ for mipmapped and
multi-layered textures.
v2: Accomodate refcount fixes in intel_process_dri2_buffer_*() that were
introduced in v2 of commit
intel: Replace intel_renderbuffer::region with a miptree [v2]
Reviewed-by: Eric Anholt <eric@anholt>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| da2816a45e6e3a33246a341fee72e6f893f315d9 |
|
16-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Replace intel_renderbuffer::region with a miptree [v3]
Essentially, this patch just globally substitutes `irb->region` with
`irb->mt->region` and then does some minor cleanups to avoid segfaults
and other problems.
This is in preparation for
1. Fixing scatter/gather for mipmapped separate stencil textures.
2. Supporting HiZ for mipmapped depth textures.
As a nice benefit, this lays down some preliminary groundwork for easily
texturing from any renderbuffer, even those of the window system.
A future commit will replace intel_mipmap_tree::hiz_region with a miptree.
v2:
- Return early in intel_process_dri2_buffer_*() if region allocation
fails.
- Fix double semicolon.
- Fix miptree reference leaks in the following functions:
intel_process_dri2_buffer_with_separate_stencil()
intel_image_target_renderbuffer_storage()
v3:
- [anholt] Fix check for hiz allocation failure. Replace
``if (!irb->mt)` with ``if(!irb->mt->hiz_region)``.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 50b33560784dde428fbb5dfe7d428255874c496c |
|
15-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Fix region dimensions for stencil buffers received from DDX
I changed the dimensions of the stencil buffer's region, as allocated by
the DDX, at xf86-video-intel commit
commit 3e55f3e88b40471706d5cd45c4df4010f8675c75
dri: Do not tile stencil buffer
But I forgot to make the analogous update to the Intel DRI2 glue in Mesa.
This patch makes that update.
Surprisingly, the mismatch did not cause any bugs. But the mismatch, if
left unfixed, *would* create bugs in the next commit.
Note: This is a candidate for the 7.11 branch.
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a00c5a71cd95d340f9ba54a0360f654414d627d2 |
|
05-Oct-2011 |
Eric Anholt <eric@anholt.net> |
i965: Enable ChooseTexFormat for supported GL_EXT_texture_integer formats.
v2: s/GL_TRUE/true/, and re-enable RGB_INT32 based on discussion
yesterday about required RB formats vs texture formats.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| e56aecf2492e3ca63ea70332a346f3f8414cba6c |
|
08-Nov-2011 |
Eric Anholt <eric@anholt.net> |
i965: Add support for 16-bit unorm L, A, and I textures.
While not required by any particular spec version, mplayer was asking
for L16 and hoping for actual L16 without checking. The 8 bits
allocated led to 10-bit planar video data stored in the lower 10 bits
giving only 2 bits of precision in video. While it was an amusing
effect, give them what they actually wanted instead.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41461
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 875a757ddd103722cfe9a2b21035024aa5a23d32 |
|
03-Nov-2011 |
George Sapountzis <gsapountzis@gmail.com> |
dri: unify __DRIscreenRec
Also drop DriverAPI field, this is a static symbol and I don't see why it
should be accessed through __DRIscreenRec
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| ac6a376f528e4867b8422e42fd36c10e4fa79cfb |
|
19-Oct-2011 |
Eric Anholt <eric@anholt.net> |
intel: Don't force a batchbuffer flush in readpixels.
Renderbuffer mapping handles flushing the batchbuffer if required, so
all we need to do is make sure any pending rendering has reached the
batchbuffer.
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a14bb89d3ffda49ec8e64453640b42b670cb43a7 |
|
28-Oct-2011 |
Kristian Høgsberg <krh@bitplanet.net> |
dri: Drop unused dri renderbuffer helper functions
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| d24b81e0e0f4109f3256dc45b0adc5ffd59fb749 |
|
28-Oct-2011 |
Kristian Høgsberg <krh@bitplanet.net> |
dri: Remove cliprect information from __DRIdrawable
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 96db07e28c165610b809a9fd88410a82a24a893e |
|
17-Oct-2011 |
Eric Anholt <eric@anholt.net> |
intel: Enable stripping of texture borders.
This replaces software rendering of textures with the deprecated
1-pixel border (which is always bad, since mipmapping is rather broken
in swrast, and GLSL 1.30 is unsupported) with hardware rendering that
just pretends there was never a border (so you have potential seams on
apps that actually intentionally used the 1-pixel borders, but correct
rendering otherwise).
This doesn't regress any piglit tests on gen6 (since the texwrap
border/bordercolor cases already failed due to broken border color
handling), but regresses texwrap border cases on original gen4 since
those end up sampling the border color instead of the border pixels.
It's a small price to pay for not thinking about texture borders any
more.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 47f1d9deffee8aeb2d73d8e06f829d32125f944c |
|
24-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Remove "single threaded" INTEL_DEBUG mode.
According to the docs for 3DSTATE_PS (Gen7+) and 3DSTATE_WM (Gen6),
there is a platform dependent value for the minimum number of pixel
shader threads. It may also vary based on whether WIZ Hashing is on.
For example, Ivybridge requires at least 4 threads if WIZ hashing is
disabled, and 8 if it's enabled. Programming it to use less threads is
illegal. Sandybridge appears to have similar restrictions.
So on newer platforms, INTEL_DEBUG=sing will probably just hang the GPU.
Rather than try to patch it up for newer platforms and extend it to
support geometry shaders, just remove it as it isn't that useful anyway.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 2e5a1a254ed81b1d3efa6064f48183eefac784d0 |
|
07-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Convert from GLboolean to 'bool' from stdbool.h.
I initially produced the patch using this bash command:
for file in {intel,i915,i965}/*.{c,cpp,h}; do [ ! -h $file ] && sed -i
's/GLboolean/bool/g' $file && sed -i 's/GL_TRUE/true/g' $file && sed -i
's/GL_FALSE/false/g' $file; done
Then I manually added #include <stdbool.h> to fix compilation errors,
and converted a few functions back to GLboolean that were used in core
Mesa's function pointer table to avoid "incompatible pointer" warnings.
Finally, I cleaned up some whitespace issues introduced by the change.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chad Versace <chad@chad-versace.us>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 490e6470a09c3a6049e5e859d72b0b679ef5d070 |
|
24-Sep-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Introduce a new intel_context::gt field to go along with gen.
It seems that GT1/GT2 sorts of variations are here to stay, and more
special cases will likely be required in the future. Checking by PCI ID
via the IS_xxx_GTx macros is cumbersome; introducing a new 'gt' field
analogous to intel->gen will make this easier.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 3f9f1b365967a41f09431f724f43b59ca0e753b8 |
|
24-Sep-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Remove intel_context::has_xrgb_textures/has_luminance_srgb.
Seeing as they were only used once (in the same function they were
defined), having them as context members seemed rather pointless.
Remove them entirely (rather than using local variables) since the
chipset generation checks are actually just as straightforward.
While we're at it, clean up the remainder of the if-tree that set them.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 604173fb1c4c7705681e77bbd862b9f953dbc6d4 |
|
13-Sep-2011 |
Paul Berry <stereotype441@gmail.com> |
i965: Increase MaxClipPlanes to 8 for gen6+.
This is necessary for GLSL 1.30 compliance.
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 03e623a27b95ef228fb4fca71c6d7c7a21630033 |
|
21-Sep-2011 |
Eric Anholt <eric@anholt.net> |
i965: Add support for GL_EXT_packed_float.
This doesn't cover support for this format as a renderbuffer yet. The
spec allows implementations to not support it, though it is something
we do want to support.
Only one failure in piglit on gen6, which is texwrap with bordercolor
(as usual).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 2fd8c4e3edf989c6f7dd1261a67b01f06979feab |
|
21-Sep-2011 |
Eric Anholt <eric@anholt.net> |
i965: Add support for GL_EXT_texture_shared_exponent.
Only one failure in piglit on gen6, which is texwrap with bordercolor
(as usual).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 0a5478c1d9f9a892371d9ff004976e783a086694 |
|
22-Aug-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Move S3TC extension enable bits to intel_extensions.c
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 17fa6772d7e223f940dd8ec4e4f6cf8cab9a03c7 |
|
26-Aug-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Silence "warning: unused parameter ‘fb’"
The gl_framebuffer was not used in intel_draw_buffer, so remove it.
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 6b9e4b6ca7bec9dbafe4f4368f2f33bbeda6cb5c |
|
21-Aug-2011 |
Chia-I Wu <olv@lunarg.com> |
intel: fix GLESv1 support
Add intelInitExtensionsES1 to enable required and optional GLESv1
extensions.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 69595283b64d1f01b33022c38468376ad8596ea7 |
|
18-Aug-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Abort when DRI2 separate stencil handshake fails
When intel_context requires separate stencil but the DRI2 separate stencil
handshake fails, then abort and emit an error instructing the user to
upgrade the DDX to 2.16.0.
CC: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f7dbcba280e4397cadb14f230aa925b4143cdde4 |
|
18-Jul-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Fix stencil buffer to be W tiled
Until now, the stencil buffer was allocated as a Y tiled buffer, because
in several locations the PRM states that it is. However, it is actually
W tiled. From the PRM, 2011 Sandy Bridge, Volume 1, Part 2, Section
4.5.2.1 W-Major Format:
W-Major Tile Format is used for separate stencil.
The GTT is incapable of W fencing, so we allocate the stencil buffer with
I915_TILING_NONE and decode the tile's layout in software.
This fix touches the following portions of code:
- In intel_allocate_renderbuffer_storage(), allocate the stencil
buffer with I915_TILING_NONE.
- In intel_verify_dri2_has_hiz(), verify that the stencil buffer is
not tiled.
- In the stencil buffer's span functions, the tile's layout must be
decoded in software.
This commit mutually depends on the xf86-video-intel commit
dri: Do not tile stencil buffer
Author: Chad Versace <chad@chad-versace.us>
Date: Mon Jul 18 00:38:00 2011 -0700
On Gen6 with separate stencil enabled, fixes the following Piglit tests:
bugs/fdo23670-drawpix_stencil
general/stencil-drawpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX16-copypixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX16-drawpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX16-readpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX1-copypixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX1-drawpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX1-readpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX4-copypixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX4-drawpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX4-readpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX8-copypixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX8-drawpixels
spec/EXT_framebuffer_object/fbo-stencil-GL_STENCIL_INDEX8-readpixels
spec/EXT_packed_depth_stencil/fbo-stencil-GL_DEPTH24_STENCIL8-copypixels
spec/EXT_packed_depth_stencil/fbo-stencil-GL_DEPTH24_STENCIL8-readpixels
spec/EXT_packed_depth_stencil/readpixels-24_8
Note: This is a candidate for the 7.11 branch.
Signed-off-by: Chad Versace <chad@chad-versace.us>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 35d5d5df72a2747262e00e521e650c8974d6c64d |
|
06-May-2011 |
Eric Anholt <eric@anholt.net> |
intel: Make our context structure be a ralloc context.
This will let me hang cached compiler structs off of the context
without having to worry about cleaning them up at destroy time.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f39476b234960cd0fb794a43a3eece440367cba2 |
|
29-Jun-2011 |
John <jpsinthemix@verizon.net> |
i915: Fix leak of ViewportMatrix data on context destroy.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30217
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| c7ef5e8498550e6ed4d609641ca6deb932882485 |
|
29-Jun-2011 |
Eric Anholt <eric@anholt.net> |
intel: Remove now trivial intel_renderbuffer_set_{hiz_,}region().
As a result of this cleanup, a bug in
intel_process_dri2_buffer_no_separate_stencil() became quite apparent.
We were associating the NULL pointer after an unreference with the
STENCIL attachment -- clarify the logic and attach the right region.
Reviewed-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 86e62b2357447b7c97f434be4834f4b50aa0764d |
|
15-Jun-2011 |
Eric Anholt <eric@anholt.net> |
intel: Mark MESA_FORMAT_X8_Z24 as always supported.
This prevents developer surprise at seeing a GL_DEPTH_COMPONENT
texture have stencil bits, and avoids the metaops path accidentally
copying stencil bits around in glCopyTexImage(GL_DEPTH_COMPONENT) (and
being broken because swrast's glReadPixels(GL_UNSIGNED_INT_24_8) is
broken).
Acked-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 3541cc0d40f86d8ea63a876b7215831335ec677d |
|
22-Jun-2011 |
Eric Anholt <eric@anholt.net> |
i965: Don't bother telling swrast_setup about state updates until fallback.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 6cf3d1cace770a3b4a0bff0d44db3b9e1da4cb09 |
|
22-Jun-2011 |
Eric Anholt <eric@anholt.net> |
i965: Don't bother telling tnl about state updates unless we fall back.
This was sucking up 1% of the CPU on 3DMMES.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 23ed3b90c7f9056182307f9a69a56f748da331a3 |
|
09-Jun-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Unconditionally enable support for S8_Z24 texture format
Commit b5c847c7ca06823af3b72324056a2e478caca70b erroneously disabled
support for S8_Z24 texture format when the context required separate
stencil (intel_context.must_use_separate_stencil).
But the GL spec requires implementations to support GL_DEPTH24_STENCIL8.
So we better find a way to fake it...
From page 180 (196 of pdf) of the OpenGL 3.0 spec:
In addition, implementations are required to support the following
sized internal [texture] formats.
[...]
- Combined depth+stencil formats: DEPTH32F_STENCIL8 and and
DEPTH24_STENCIL8.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| dfada714f8db3deea2fea3583c3c166a78db1117 |
|
18-Jun-2011 |
Eric Anholt <eric@anholt.net> |
i965/gen6: Use an BO instead of writing to address 0 for PIPE_CONTROL W/A.
This was spectacularly unsafe. On my system, address 0 happens to be
the hardware status page for the render ring, and the first quadword
of that happens to contain nothing we ever look at, but I sure didn't
look forward to having to debug some day when, for example, the kernel
happened to bind the ringbuffer before binding the hwsp.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| aea2236af60aee329e6ea73a41f2410d8eacc7b6 |
|
04-Jun-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Request DRI2 buffers for separate stencil and hiz
When it is sensible to do so,
1) intelCreateBuffer() now attaches separate depth and stencil
buffers
to the framebuffer it creates.
2) intel_update_renderbuffers() requests for the framebuffer
a separate stencil buffer (DRI2BufferStencil).
The criteria for "sensible" is:
- The GLX config has nonzero depth and stencil bits.
- The hardware supports separate stencil.
- The X driver supports separate stencil, or its support has not yet
been determined.
If the hardware supports hiz too, then intel_update_renderbuffers()
also requests DRI2BufferHiz.
If after requesting DRI2BufferStencil we determine that X driver did not
actually support separate stencil, we clean up the mistake and never ask
for DRI2BufferStencil again.
CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 89d34cfd3e7c96cefc489fbb995124e2dc4a97ec |
|
04-Jun-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Refactor intel_update_renderbuffers()
Extract the code that queries DRI2 to obtain the DRIdrawable's buffers
into intel_query_dri2_buffers_no_separate_stencil().
Extract the code that assigns the DRI buffer's DRM region to the
corresponding renderbuffer into
intel_process_dri2_buffer_no_separate_stencil().
Rationale
---------
The next commit enables intel_update_renderbuffers() to query for separate
stencil and hiz buffers. Without separating the separate-stencil and
no-separate-stencil paths, intel_update_renderbuffers() degenerates into
an impenetrable labyrinth of if-trees.
CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| beb8b7da20c862549b96a500226caf3a610342d9 |
|
02-Jun-2011 |
Chad Versace <chad@chad-versace.us> |
intel/intel_context.c: Remove unused functions
Remove functions intel_override_hiz() and
intel_override_separate_stencil(). They are now located in intel_screen.c.
CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 6b2bf272ee173bd8ee6c731500861de21fa01b5f |
|
27-May-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Add flags to intel_screen for hiz and separate stencil
Add the fields below to intel_screen. The expression in parens is the
value to which intelInitScreen2() currently sets the field.
GLboolean hw_has_separate_stencil (true iff gen >= 7)
GLboolean hw_must_use_separate_stencil (true iff gen >= 7)
GLboolean hw_has_hiz (always false)
enum intel_dri2_has_hiz dri2_has_hiz (INTEL_DRI2_HAS_HIZ_UNKNOWN)
The analogous fields in intel_context now inherit their values from
intel_screen.
When hiz and separate stencil become completely implemented for a given
chipset, then the respective fields need to be enabled.
CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 23b6f9606dc247488835745668b3686218612536 |
|
31-May-2011 |
Eric Anholt <eric@anholt.net> |
intel: Implement glFinish() correctly by waiting on all previous rendering.
Before, we were waiting for (most of) the current framebuffer to be
done, which is not quite the same thing.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| b5c847c7ca06823af3b72324056a2e478caca70b |
|
23-May-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Change supported texture formats for separate stencil
When hardware supports separate stencil, enable support for separate
depth/stencil texture formats in the table
intel_context.ctx.TextureFormatsSupported. If the hardware must use
separate stencil, then disable support for combined depth/stencil formats.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 76f77cb07edf9c6a548f782c709de70aa0a41458 |
|
23-May-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Add flags to intel_context for hiz and separate stencil
Add the following flags:
intel_context.has_separate_stencil
intel_context.must_use_separate_stencil
intel_context.has_hiz
The flags are currently set to false, and will be enabled for a given
chipset once the feature is completely implemented.
Since it may be some time before these features are completed, their
values can be overridden with environment variables INTEL_HIZ and
INTEL_SEPARATE_STENCIL. Valid values for these environment variables are
"0" and "1".
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1b3d354743269ac1da80984da55d7545974f7345 |
|
23-Mar-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Recognize new Ivybridge PCI IDs.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 89a82d72cafc1efbcf099e5229ba9b1cb53504f0 |
|
17-May-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Initial IS_GEN7 plumbing.
Currently, IS_GEN7, IS_IVYBRIDGE, IS_IVB_GT1, and IS_IVB_GT2 all return
false. This allows me to write the code for them before actually adding
the PCI IDs and thus enabling the hardware.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| aa3e1c25d3e4fc7e79236c717deaa838182e68c9 |
|
25-Apr-2011 |
Eric Anholt <eric@anholt.net> |
Revert "intel: use throttle ioctl for throttling"
This reverts commit 50ade6ea697953bb17e3ca7210515fbd0411cd1e.
Fixes jerky rendering again on apps that don't block on the GPU per
frame and are GPU bound (e.g. 3DMMES on Ironlake). The whole point of
this complicated throttle scheme is to wait on frame n-1 to have
started rendering before starting frame n's rendering. Otherwise, the
GPU-bound app will race ahead and call the GL to draw many
nearly-identical frames, then >0ms later get stuck waiting for them
(all dispatched at about the same time) to retire, then render a new
batch of nearly-identical frames.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 7363088f9f9558b2bad3ac6da48947514a8cd790 |
|
25-Apr-2011 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Set gen in intelInitScreen, just copy value in intelInitContext
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 4093fdce6d7b8370bfe3ff5119dc0ef0acb32054 |
|
18-Apr-2011 |
Eric Anholt <eric@anholt.net> |
i965: Add support for ARB_texture_compression_rgtc.
Tested with rgtc-teximage-0[12].
EXT_texture_compression_rgtc/fbo-generatemipmap-formats fails in NPOT
just like S3TC does.
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 87478cd6e3e6349abc2688b390f8845d1e21af3d |
|
15-Apr-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add support for ARB_texture_float.
For 1 and 2-channel formats the hardware only supports rendering to R
and RG. To do I and L render targets we just call them R and
everything works out. For A, we would need to rewrite the CC to do
the alpha channel's blending on color instead, and send the fragment
alpha down the red channel. For LA, there doesn't seem to be any
hope, because we can't do independent color/alpha blending while
treating the LA surface as RG.
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 0fe34b7bbc9a8e089bbb4d0fe401b09095a571eb |
|
01-Mar-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
dri: Remove driver date from renderer string
Reviewed-by: Corbin Simpson <MostAwesomeDude@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| ad3fbac00bb4430aa26f4dbd3a795715b0fc7fef |
|
03-Apr-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
i965: Add the missing supportable EXT_texture_snorm formats
This class of hardware can natively sample all of the snorm surface
formats that DX10 requires, but it can't do some of the legacy GL
formats. In particular, all of the alpha, luminance, and intensity
formats are unsupported.
This partially fixes the breakage in glean's pixelFormats test since
GL_EXT_texture_snorm support was added to Mesa.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a2029a78c39427f9bd7e24bbe5a5ff124f9d446b |
|
24-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: Protect against waiting on a NULL render target bo
If we fall back to software rendering due to the render target being
absent (GPU hang or other error in creating the named target), then we
do not need to nor should we wait upon the results.
Reported-by: Magnus Kessler <Magnus.Kessler@gmx.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34656
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 671018aa99528a41955654f62120eeea0c5517e1 |
|
24-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: gen3 is particular sensitive to batch size
... and prefers a small batch whereas gen4+ prefer a large batch to
carry more state.
Tuning using openarena/padman indicate that a batch size of just 4096 is
best for those cases.
Bugzilla: https://bugs.freedesktop.org/process_bug.cgi
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 50ade6ea697953bb17e3ca7210515fbd0411cd1e |
|
30-Dec-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: use throttle ioctl for throttling
Rather than waiting on the first batch after the last swapbuffers to be
retired, call into the kernel to wait upon the retirement of any request
less than 20ms old. This has the twofold advantage of (a) not blocking
any other clients from utilizing the device whilst we wait and (b) we
attain higher throughput without overloading the system.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 8d68a90e225d831a395ba788e425cb717eec1f9a |
|
10-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: use pwrite for batch
It's faster. Not only is the memcpy more efficiently performed in the
kernel (making up for the system call overhead), but by not using mmap
we remove the greater overhead of tracking the vma of every batch.
And it means we can read back from the batch buffer without incurring
the cost of a uncached read through the GTT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 47589c17b0ea34f2c77c8c9e633349af6d1a2f10 |
|
12-Feb-2011 |
Eric Anholt <eric@anholt.net> |
intel: Remove setup of the old dri/ meta code, which is now unused.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 5e4ca1ccc9029fd75bb7676dc128e33d12da9665 |
|
09-Feb-2011 |
Brian Paul <brianp@vmware.com> |
mesa: remove _mesa_initialize_context_for_api()
Just add the gl_api parameter to _mesa_initialize_context().
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 88ffa9ce5b8e5fe2b93238f8b9a7a888be28324e |
|
28-Jan-2011 |
Dave Airlie <airlied@gmail.com> |
mesa/965: add support for GL_EXT_framebuffer_sRGB (v2)
This adds i965 support for GL_EXT_framebuffer_sRGB, it introduces a new
constant to say that the driver can support sRGB enabled FBOs since enabling
the extension doesn't mean the driver can actually support sRGB.
Also adds the suggested state flush in the core code suggested by Brian.
fix the ARB_fbo color encoding.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 372dc4cd6c666c88bcf587202458cd73bda9a244 |
|
08-Jan-2011 |
Eric Anholt <eric@anholt.net> |
i915: Don't claim to support AL1616 when neither 830 nor 915 does it.
Fixes an abort in fbo-generatemipmap-formats.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 06cb1a6a5bdba5654408e3568584e1ab168266b7 |
|
05-Jan-2011 |
Eric Anholt <eric@anholt.net> |
i965: Add support for SRGB DXT1 formats.
This makes
fbo-generatemipmap-formats GL_EXT_texture_sRGB-s3tc
match
fbo-generatemipmap-formats GL_EXT_texture_compression_s3tc
and swrast in bad DXT1_RGBA alpha=0 handling, but it means we won't
unpack and repack someone's textures into uncompressed SARGB8 format.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 5dbb856e960f9448ec4e322f936f5f6763ee77e2 |
|
04-Jan-2011 |
Eric Anholt <eric@anholt.net> |
intel: Merge our choosetexformat fallbacks into core.
We now share the type/format -> MESA_FORMAT_* mappings with software
mesa, and the core supports most of the fallbacks hardware drivers
will want.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| b01b73c482474609aceb6bb13b083e96c06ba353 |
|
25-Dec-2010 |
Eric Anholt <eric@anholt.net> |
intel: Only do frame throttling at glFlush time when using frontbuffer.
This is the hack for input interactivity of frontbuffer rendering
(like we do for backbuffer at intelDRI2Flush()) by waiting for the n-2
frame to complete before starting a new one. However, for an
application doing multiple contexts or regular rebinding of a single
context, this would end up lockstepping the CPU to the GPU because
every unbind was considered the end of a frame.
Improves WOW performance on my Ironlake by 48.8% (+/- 2.3%, n=5)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 4538ce915ba4c43290f4341ad80040b4b735eab3 |
|
11-Nov-2010 |
Eric Anholt <eric@anholt.net> |
i965: Remove INTEL_DEBUG=glsl_force now that there's no brw_wm_glsl.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 4ac2f09e2034d8940a0ce9426a8d5c5d74bc63bd |
|
03-Dec-2010 |
Eric Anholt <eric@anholt.net> |
intel: Add an env var override to execute for a different GPU revision.
Sometimes I'm on the train and want to just read what's generated
under INTEL_DEBUG=vs,wm for some code on another generation. Or, for
the next gen enablement we'll want to dump aub files before we have
the actual hardware. This will let us do that.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| e8b2d367234f554dafa968455b8d0d3e332058eb |
|
21-Oct-2010 |
Robert Hooker <robert.hooker@canonical.com> |
intel: Add a new B43 pci id.
Signed-off-by: Robert Hooker <robert.hooker@canonical.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 00391c79416ffd4b6f3af0ad911b7b8210f746d1 |
|
09-Nov-2010 |
Eric Anholt <eric@anholt.net> |
Revert "intel: Fix the client-side swapbuffers throttling."
This reverts commit 76360d6abc9e0195bc5c373101ae616e68b2e6e6. On
second thought, it turned out that sync objects also used the
wait_rendering API like this, and would need the same treatment, and
so wait_rendering itself is fixed in libdrm now.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 76360d6abc9e0195bc5c373101ae616e68b2e6e6 |
|
09-Nov-2010 |
Eric Anholt <eric@anholt.net> |
intel: Fix the client-side swapbuffers throttling.
We were asking for a wait to GTT read (all GPU rendering to it
complete), instead of asking for all GPU reading from it to be
complete. Prevents swapbuffers-based apps from running away with
rendering, and produces a better input experience.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| bb1540835056cdea5db6f55b19c0c87358f14cd1 |
|
03-Nov-2010 |
Eric Anholt <eric@anholt.net> |
intel: Annotate debug printout checks with unlikely().
This provides the optimizer with hints about code hotness, which we're
quite certain about for debug printouts (or, rather, while we
developers often hit the checks for debug printouts, we don't care
about performance while doing so).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f9995b30756140724f41daf963fa06167912be7f |
|
12-Oct-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Drop GLcontext typedef and use struct gl_context instead
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| d3491e775fb07f891463b2185d74bbad62f3ed24 |
|
12-Oct-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Rename GLvisual and __GLcontextModes to struct gl_config
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 0c86e1f29483d9557f30796c03b94a34d965c095 |
|
30-Sep-2010 |
Adam Jackson <ajax@redhat.com> |
i965: Update renderer strings for sandybridge
Signed-off-by: Adam Jackson <ajax@redhat.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| c58bf2cee5b0f14a585089084fec7767f33887a7 |
|
17-Sep-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
i965: only allow SIMD8 kernel on sandybridge now
Until we fixed SIMD16 kernel, force to SIMD8 on sandybridge now.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 99907303f6a1e9abe02977664ad8457c122213ce |
|
21-Sep-2010 |
Timo Wiren <timo.wiren@gmail.com> |
Fix typos in comments and debug output strings.
Bug #30208.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| b4bb6680200b5a898583392f4c831c02f41e63f7 |
|
08-Sep-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
dri: Unset current context and dispatch table when unbinding
Otherwise, when we switch to an indirect glx context and then back, it looks
like we're still current.
https://bugs.freedesktop.org/show_bug.cgi?id=29977#c7
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 9087ba128089ed0dc00e6eb38f37126fb7557d3b |
|
04-Jun-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Take an intel_screen pointer in intel_alloc_region_* functions
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| e0564d56b1d3bc339b7a9cd232df4b042a93aab2 |
|
24-Aug-2010 |
Eric Anholt <eric@anholt.net> |
intel: Add support for MAX_SAMPLES=1 EXT_framebuffer_multisample.
The spec specifically sets the minimum MAX_SAMPLES at 1 to allow exposing
the extension on all implementations, so do so.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 11fce3a821b64e1d53f893e82e5c92f549f3ab1d |
|
30-Jul-2010 |
Vinson Lee <vlee@vmware.com> |
intel: Add missing header to intel_context.c.
Fixes "implicit declaration of function
_mesa_get_incomplete_framebuffer" warning.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 9456e22c7a8803bed1146a89e7581badf0ae8064 |
|
04-Jun-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Implement EGL_KHR_surfaceless extension
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 7d349f588af88f9c5cfe37a331bcef6292a9111e |
|
27-Jul-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove unused intel/server files
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 44ad62b86c1bb204562d517d5fa7d7675d0e77e3 |
|
13-Jun-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove long-dead comment about releasing texture heaps.
BOs are stored in the bufmgr, which is freed as part of the screen
structure.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 34474fa4119378ef9fbb9fb557cc19c0a1ca1f7e |
|
07-Jun-2010 |
Eric Anholt <eric@anholt.net> |
intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.
The slightly less mechanical change of converting the emit_reloc calls
will follow.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f0ff214bee64a705d3ef6610e9dc25bc1a46a460 |
|
04-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i915: Don't use XRGB8888 on 830 and 845.
The support for XRGB8888 appeared in the 855 and 865, and this format
is reserved on 830/845. This should fix a regression from
b4a6169412819cc3a027c6a118f0537911145a30 that caused hangs in etracer
on 845s.
Bug #26557.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 9b775c1e589b7ce95a1ec3e85e45bb9288ceb289 |
|
23-May-2010 |
Eric Anholt <eric@anholt.net> |
i965: Add support for all 8 possible ARB_draw_buffers in Mesa.
We should be able to do 16, but are limited by Mesa's static buffer
allocations.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| e67c338b415c983bee570e6644b9684d8d1fc99b |
|
19-May-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Throttle after doing copyregion/swapbuffers round trip
Before we would throttle in the flush callback prior to round-tripping
to the server to do copyregion or swapbuffer. Now, instead just note
that we need to throttle and do it in intel_prepare_render(), which
will be called after receiving the response from the server but before
we start rendering the next frame. Even if the server also throttles
us in swapbuffer, this just makes the throttling a no-op when we hit
intel_prepare_render(). With that we can drop the
using_dri2_swapbuffers hack and just always throttle.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| b8b2670fef4790d650939fece8c7e6c7b76c3171 |
|
18-May-2010 |
Eric Anholt <eric@anholt.net> |
i965: Add SF program disasm under INTEL_DEBUG=sf.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 2386d41648d78925b139aea9562325c5b22007eb |
|
17-May-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Call intel_draw_buffer() again after _mesa_make_current()
The initial call to intel_draw_buffers() happens when
intel->ctx.DrawBuffer is still NULL. Call it again after
calling _mesa_make_current().
https://bugs.freedesktop.org/show_bug.cgi?id=28112
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| c1423e34f910026d1c37a64e64d15277a4dd1258 |
|
14-May-2010 |
Eric Anholt <eric@anholt.net> |
i965: Add program dumping for INTEL_DEBUG=gs.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 562e2d114ec0cba879463980522d1d54af9444e6 |
|
14-May-2010 |
Eric Anholt <eric@anholt.net> |
i965: Support INTEL_DEBUG=clip to dump the clip program.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 61aa9c86c20b1bc9957aa9fe9976703a93cc4d3c |
|
13-May-2010 |
Eric Anholt <eric@anholt.net> |
intel: Don't update window system renderbuffers on TexImage.
While sometimes rendering occurs in the form of blits for TexImage, it
doesn't interact with the window system renderbuffers, so skip it.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| db2993faa0211b60efd46016de5d07110cb9777a |
|
11-May-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop viewport hack when we can
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 12bc39f30c2cc27fe9bc4d33c7c79919d895537d |
|
11-May-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Also flush front buffer in glFinish()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| c4775a27e3aaa2006b98f225387499b79bc609ef |
|
10-May-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop intelFlush()
Now that intel_flush() deosn't use the needs_mi_flush argument, we can
finally drop one of the two flush functions.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a86e4852f463c289eba019a4d231fbd6cae82f27 |
|
10-May-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Only flush fake front buffer on API level glFlush()
Without this patch, any old intel_flush() call will cause a round trip to
the server and do a copy from fake to real front. We only actually
guarantee that frontbuffer results show up when glFlush() ia called, so
move the flushing to intel_glFlush().
We also need to flush fake to front before getting new buffers, but
we just handle that manually.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 32942d2b1c80d3f16048d6acfedf7dbcf5e2f8cb |
|
10-May-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Mark frontbuffer dirty in intel_prepare_render()
Now that we have intel_prepare_render() in place, we can use it to mark
the front buffer dirty if we're rendering to the front buffer once we
get there.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| ce914fff0817cb3c25a2d715f8435c6b6d6fbcdd |
|
05-May-2010 |
Eric Anholt <eric@anholt.net> |
i965: When an RB gets a new region, clear the old from the state cache.
This prevents memory usage explosion in blender due to the state cache
hanging on to old fake frontbuffer regions. Sigh at blender still
using frontbuffer rendering.
Bug #24119.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a5107b0a5cb1ac9f112aa498f57c13580bd56cb3 |
|
27-Apr-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Only register ES2 extensions for ES2 contexts
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 4b69100bdcf26dbb5be4d600b7ca5f5cdf6e8f20 |
|
27-Apr-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
dri: Add DRI entrypoints to create a context for a given API
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| cdcef6cbf4dd80047819e9098e34a3b98bd502a4 |
|
19-Apr-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
intel: Clean up chipset name and gen num for Ironlake
Rename old IGDNG to Ironlake, and set 'gen' number for
Ironlake as 5, so tracking the features with generation num
instead of special is_ironlake flag.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 4afed821baa6993d85a07c67d42ea40d4e9a600a |
|
31-Mar-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Bump intel driver date to later than the date on the 7.8 branch
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| ff6bce552a1522160c64d10677a36a7ad6cf5f88 |
|
30-Mar-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove redundant fields from struct intel_context
All these pointers are in the __DRIcontext struct, which we point to.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 864f2bd61d2bad31b49a680a168fc6d7c04d1de1 |
|
19-Mar-2010 |
Eric Anholt <eric@anholt.net> |
i965: Add INTEL_DEBUG=glsl_force to force brw_wm_glsl.c.
I keep finding the desire to force this path to debug it instead of
cooking up goofy-looking testcases to do so.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 6de8e563ac4dad818fc2bfea23f557919ed36234 |
|
18-Mar-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Call _mesa_make_current() after getting initial buffers
The default viewport is the window rectangle, which is set up by
_mesa_make_current(). To be able to do that we need to get the
window dimension (and buffers) first, so we have to call
intel_prepare_render() before we can call into _mesa_make_current().
Fixes #26676 and #26678.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| bb35000b4b6dfe60048b2f5d60bc102c4a7fd791 |
|
05-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove non-kernel-exec-fencing support.
Shaves 60k off the driver from removing the broken spans code. This
means we now require 2.6.29, which seems fair given that it's a year
old and we've removed support for non-KMS already in the last release
of 2D.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 8417528e3a5b9f2aed783222091ca96b56e8c37a |
|
02-Mar-2010 |
Brian Paul <brianp@vmware.com> |
intel: passs correct context type to intel_prepare_render() call
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1489f108f4a9b53b42d3d4123da64ccdb7aafdde |
|
21-Dec-2009 |
Eric Anholt <eric@anholt.net> |
i965: Fix up some Sandybridge define checks for the structure rebase.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 554a8f4026459406e7d3ed4e7017a88a57492ddf |
|
03-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Start adding defines and some bits for sandybridge bringup.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| db9c151d77d02729d7387213c3f4ee96c65dd0cc |
|
24-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Call intel_prepare_render() in intelMakeCurrent()
This restores old behaviour, where we end up doing a DRI2GetBuffers()
call from intelMakeCurrent(). The idea was that we could do this
lazily, just before we start rendering. However, if we don't do the
DRI2GetBuffers() round-trip we don't get the drawable size and higher
level mesa ends up short-cutting a number of GL calls, such as glClear().
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 5abee283d310a70efa4c713707f06624d5462322 |
|
21-Jan-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: Check that we have a bufmgr or bail out when initializing the context.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| da43aa84c8abc13bb8a2c8d0af57471862881523 |
|
19-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Set buffer stamp before getting new buffers
This way, if we get an invalidate as we update the buffers, we
don't clobber the drawable stamp and ignore the invalidate.
Pointed-out-by: Francisco Jerez
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 298be2b028263b2c343a707662c6fbfa18293cb2 |
|
19-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Replace the _mesa_*printf() wrappers with the plain libc versions
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| d449627829e1a4a3250a1a723af2f4e3cd5fd194 |
|
18-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Implement the DRI2 invalidate function properly
This uses a stamp mechanisms to mark the DRI drawable as invalid.
Instead of immediately updating the buffers we just bump the drawable
stamp and call out to DRI2GetBuffers "later".
"Later" used to be at LOCK_HARDWARE time, and this patch brings back
callouts at the points where we used to call LOCK_HARDWARE. A new function,
intel_prepare_render(), is called where we used to call LOCK_HARDWARE,
and if the buffers are invalid, we call out to DRI2GetBuffers there.
This lets us invalidate buffers only when notified instead of on
every glViewport() call. If the loader calls the DRI invalidate
entrypoint, we disable viewport triggered buffer invalidation.
Additionally, we can clean up the old viewport mechanism a bit,
since we can just invalidate the buffers and not worry about
reentrancy and whatnot.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 61d26bc82e7c4100acfb551cbb0ba9d84bbc4ba5 |
|
08-Feb-2010 |
Francisco Jerez <currojerez@riseup.net> |
dri2: Event driven buffer validation.
When a buffer invalidation event is received from the X server, the
"invalidate" hook of the DRI2 flush extension is executed: A generic
implementation (dri2InvalidateDrawable) is provided that just bumps
the "pStamp" sequence number in __DRIdrawableRec.
For old servers not supporting buffer invalidation events, the
invalidate hook will be called before flushing the fake front/back
buffer (that's typically once per frame -- not a lot worse than the
situation we were in before).
No effort has been made on preserving backwards compatibility with
version 2 of the flush extension, but I think it's acceptable because
AFAIK no released stack is making use of it.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 4be324386c50ddc67f95bbcd870a0577ceb814ab |
|
12-Feb-2010 |
Vinson Lee <vlee@vmware.com> |
intel: Remove unused variable.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 2f517b8e5ac1943f4ac60a8313ec53064cf6cc6a |
|
11-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Avoid dri_bo_flink() in intel_update_renderbuffers()
Now that we track the global name in struct intel_region, we can just
look it up there.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| cc57baff5f40ba0ab3d3044c4fcd867e5b0e640e |
|
11-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
i915: Remove always-true irq_active struct intel_screen field
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 5777dee02c6497207e6b4b9d68de072e7be7c06e |
|
11-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
i915: Drop intelScreenPrivate typedef and just call it struct intel_screen
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| c6e26d76c7f59b51be00c960112c85ad4b3d2334 |
|
31-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
intel: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 7aed23c36288c2b343073d6d06ca0ea167805cd3 |
|
25-Jan-2010 |
Eric Anholt <eric@anholt.net> |
intel: Don't do client-side frame throttling with DRI2 SwapBuffers.
The server side does the throttling on our behalf now by putting the
client to sleep, so we don't need our previous hacks for limiting the
number of outstanding frames. Same effect as
7d4e674b212c9dc6408c13913a399bd4a2b9a1e3.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| c7fc9bfb2207638a479ddaff3ad108ffd9cd294a |
|
25-Jan-2010 |
Eric Anholt <eric@anholt.net> |
Revert "intel: Use the new DRI2 flush invalidate entrypoint to signal frame done."
This reverts commit 7d4e674b212c9dc6408c13913a399bd4a2b9a1e3. It broke
throttling in the non-new-DRI2 case.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 9b22427911ad27efc1f36faee9462c6082d0417c |
|
25-Jan-2010 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_7_branch'
Conflicts:
src/mesa/drivers/dri/intel/intel_screen.c
src/mesa/drivers/dri/intel/intel_swapbuffers.c
src/mesa/drivers/dri/r300/r300_emit.c
src/mesa/drivers/dri/r300/r300_ioctl.c
src/mesa/drivers/dri/r300/r300_tex.c
src/mesa/drivers/dri/r300/r300_texstate.c
|
| fb6bff3712d71cfe131fbf70154d326cdf39e7c8 |
|
23-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
intel: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 7d4e674b212c9dc6408c13913a399bd4a2b9a1e3 |
|
19-Jan-2010 |
Eric Anholt <eric@anholt.net> |
intel: Use the new DRI2 flush invalidate entrypoint to signal frame done.
Previously for frame throttling we would wait on the first batch after
a swap before emitting another swap, because we had no hook after a
swap was emitted. This meant that if an app managed to squeeze
everything it for a frame had into one batch, it would lock-step with
the GPU. With the swapbuffers changes, we now have the entrypoint we
want.
This takes the WoW intro screen from 25% GPU idle and visibly jerky to
4-5% GPU idle and rather smooth. Other apps such as OpenArena have
run into this problem as well.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| c6ef705e414c8e93ee471f50d15ada3492a9b067 |
|
11-Jan-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
Merge branch 'master' of ssh://people.freedesktop.org/~jbarnes/mesa
Conflicts due to DRI1 removal:
src/mesa/drivers/dri/intel/intel_context.c
src/mesa/drivers/dri/intel/intel_screen.c
|
| 7c50d29f7ced3d60e52ee0146d982b49ea421de2 |
|
08-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel/DRI2: add DRI2flushExtension support with invalidate hook
Needed to support the SwapBuffers code properly.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 5a0b60aa1b9c1c4ce15c6b461e24622e9f71286d |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove remaining dri2.enabled tests
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| d282128ff68cc58bc3f5b808031c5fe7325bd69b |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove struct intel_framebuffer
With the vsync fields no longer relevant and by refactoring the code
to no longer use color_rb[0-1] we can just use struct gl_framebuffer
directly.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a6e1d3edac90016ca9662ca0a9707a2d4fba1726 |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove client-side vblank code
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 5bc4b886e412e01260af9cf9c8bd7c01f1dece19 |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop intelWindowMoved()
Everything this functions does under DRI2 is also taken care of
by intel_draw_buffer(), which is always called where intelWindowMoved()
is called.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f55d0920cd8e504a09e3741716fc47381c03f6ac |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop DRI1 static regions
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 01dc463e5d5513e059eea601710cd4babe02610d |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop LOCK/UNLOCK_HARDWARE()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| d61f07318c8678901b948fdaa8ccdf37aa3203e9 |
|
01-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Remove leftover __DRI{screen,drawable,context}Private references
As part of the DRI driver interface rewrite I merged __DRIscreenPrivate
and __DRIscreen, and likewise for __DRIdrawablePrivate and
__DRIcontextPrivate. I left typedefs in place though, to avoid renaming
all the *Private use internal to the driver. That was probably a
mistake, and it turns out a one-line find+sed combo can do the mass
rename. Better late than never.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1e4677a61f0576c32e65e9202fa08e81e1162f65 |
|
27-Dec-2009 |
Eric Anholt <eric@anholt.net> |
intel: Remove dead fthrottle_mode option. We only do IRQ waits.
Noticed by clang.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f67748038935e609aa85450b20d550b4813c9429 |
|
17-Dec-2009 |
Eric Anholt <eric@anholt.net> |
intel: Replace some gen3 IS_* checks with context structure usage.
Shaves 400 bytes or so from i915_dri.so.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 0b87f143c466f7e5bd730895ee29f1cd20a68f9b |
|
17-Dec-2009 |
Eric Anholt <eric@anholt.net> |
intel: Replace IS_G4X() across the driver with context structure usage.
Saves ~2KB of code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1c96e85c9d6b8c636b0636f3320d1057ab5357b3 |
|
16-Dec-2009 |
Eric Anholt <eric@anholt.net> |
intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync.
Saves ~480 bytes of code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 71678a7ede11062b62e8786daf4ba451f5e4fe87 |
|
22-Dec-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Replace release info in DRIVER_DATE with "DEVELOPMENT"
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a4b6b428855e73b35f754a9f64647c6edc1a88fa |
|
22-Dec-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
Merge branch 'mesa_7_7_branch'
Conflicts:
src/mesa/main/version.h
|
| 164b5838521bc7ab4af83bb6de8c8711ff40901c |
|
22-Dec-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Bump driver date to reflect status as final Q4 driver RC
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 827ba44f6ee83ab21c6a2b09323f6f1df4a7d4c8 |
|
18-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Remove non-GEM support.
This really isn't supported at this point. GEM's been in the kernel for
a year, and the fake bufmgr never really worked.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 667760f53c16fae45ab29881c5ea12eef5fcda54 |
|
18-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Remove dead intel_context members and move some packing around.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a736d3f4399a99b54d6af140f2227253f2ee262b |
|
13-Nov-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Remove unused enable_imaging parameter to intelInitExtensions
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| caf3038123d6d29afd7d1f0cd6db98a2282c3ca1 |
|
26-Oct-2009 |
Eric Anholt <eric@anholt.net> |
Make a convenient int for what chipset generation we're on.
gen2/3/4 are easier to say than "8xx, 915-945/g33/pineview, 965/g45/misc",
and compares on generation are often easier than stringing together a bunch
of chipset checks.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 6eb6a0e9cbed6ba5543d54e277f7ac11a0612070 |
|
26-Oct-2009 |
Eric Anholt <eric@anholt.net> |
intel: Don't bother MI_FLUSHing on glFlush in the DRI2 case.
We only need it when drawing to the front buffer, which we never do for
DRI2. No significant performance difference, but the flush is definitely
gone from the end of every batchbuffer.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1f196b786d6bd0c6a5dbdc638574ff716cc3d4de |
|
29-Oct-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'texformat-rework'
Conflicts:
src/mesa/drivers/dri/radeon/radeon_fbo.c
src/mesa/drivers/dri/s3v/s3v_tex.c
src/mesa/drivers/dri/s3v/s3v_xmesa.c
src/mesa/drivers/dri/trident/trident_context.c
src/mesa/main/debug.c
src/mesa/main/mipmap.c
src/mesa/main/texformat.c
src/mesa/main/texgetimage.c
|
| ab9d1011f5549502a4b960c2067cde69856a2719 |
|
23-Oct-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_6_branch'
|
| 55058652b886b95bfc24109a9edb04d274c01c1a |
|
23-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: flush old context before binding new context
Per the GLX spec, when changing rendering contexts, the old context
should first be flushed.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| ea659f891740fab1943eca219ffbdd5ed3d1906c |
|
23-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: Fallback field is a bitmask, use GLbitfield
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 45e76d2665b38ba3787548310efc59e969124c01 |
|
09-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: remove a bunch of gl_renderbuffer fields
_ActualFormat is replaced by Format (MESA_FORMAT_x).
ColorEncoding, ComponentType, RedBits, GreenBits, BlueBits, etc. are
all replaced by MESA_FORMAT_x queries.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 55770d09c18c4d33403abb97dfef4f897efbbe2a |
|
05-Oct-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_6_branch'
Conflicts:
src/gallium/auxiliary/util/u_cpu_detect.c
|
| 3b29dcbb5e1f0641cdfab22b5e578d933e9dbf35 |
|
05-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: remove a buffer equality test in _mesa_make_current()
Before, if we called glXMakeCurrent() to change a context's window binding
while an FBO was bound, we weren't updating the intel->driDrawable and
intel->driReadDrawable fields. This could cause us to dereference a null
pointer elsewhere.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| c67bb22fe7b4a7176efd9177d8de413d7c1a9192 |
|
21-Sep-2009 |
Michel Dänzer <daenzer@vmware.com> |
Merge branch 'mesa_7_6_branch'
|
| 1d4dbd8d9b00cdba8c4aef4a3994d8763fea0dff |
|
21-Sep-2009 |
Michel Dänzer <daenzer@vmware.com> |
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
|
| 999592745f40a96a7307da374cab4d68254acf75 |
|
21-Sep-2009 |
Michel Dänzer <daenzer@vmware.com> |
intel: Fix crash in intel_flush().
Since commit 2921a2555d0a76fa649b23c31e3264bbc78b2ff5 ('intel: Deassociated
drawables from private context struct in intelUnbindContext'),
intel->driDrawable may be NULL in intel_flush().
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| da9d8f192431b0142e65bceb5ca8a2e52e21ac90 |
|
21-Sep-2009 |
Brian Paul <brianp@vmware.com> |
Revert "mesa: move _mesa_meta_init/free() calls to core Mesa"
This reverts commit 651cffd626a82d9bf539437ca4bdf8ea4b396fab.
The commit inadvertantly introduced a new gallium dependency on the meta code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 651cffd626a82d9bf539437ca4bdf8ea4b396fab |
|
19-Sep-2009 |
Brian Paul <brianp@vmware.com> |
mesa: move _mesa_meta_init/free() calls to core Mesa
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 5ce72c559c027ea03513ed9c0038706733b0586e |
|
16-Sep-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
Merge branch 'mesa_7_6_branch'
|
| 88e3a5760559e6ced00a57b7157abe156c22be2e |
|
16-Sep-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
Conflicts:
src/mesa/main/dlist.c
|
| 2921a2555d0a76fa649b23c31e3264bbc78b2ff5 |
|
16-Sep-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Deassociated drawables from private context struct in intelUnbindContext
The generic DRI infrastructure makes sure that __DRIcontextRec::driDrawablePriv
and __DRIcontextRec::driReadablePriv are set to NULL after unbinding a
context. However, the intel_context structure keeps cached copies of
these pointers. If these cached pointers are not NULLed and the
drawable is actually destroyed after unbinding the context (typically
by way of glXDestroyWindow), freed memory will be dereferenced in
intelDestroyContext.
This should fix bug #23418.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 3c3104943946904d0e205166bc4baf28ff2bf81b |
|
11-Sep-2009 |
Brian Paul <brianp@vmware.com> |
intel: remove unneeded driver function assignments
These default swrast functions are already installed by
_mesa_init_driver_functions().
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 8398535331dae39ff5f52e94a69abdbf7507a343 |
|
10-Sep-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
Conflicts:
src/mesa/drivers/dri/intel/intel_context.c
|
| 2dd3da3a4a2233332219f9da60d18fec79b4b6c7 |
|
07-Sep-2009 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
intel: add B43 chipset support
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Hopefully this will be one of the last cherry-picks.
(cherry picked from commit ca246dd186f9590f6d67038832faceb522138c20)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| ca246dd186f9590f6d67038832faceb522138c20 |
|
07-Sep-2009 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
intel: add B43 chipset support
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 58a57e3fc48b4ba081caa6ffaec24dfad9ed002a |
|
04-Sep-2009 |
Eric Anholt <eric@anholt.net> |
Revert "intel: helper to debug bufmgr (disabled)"
This reverts commit e0ec405a9fa6fbc1cf2ac531ed5efd1a64e01f18.
This is already available in INTEL_DEBUG=bufmgr in the environment.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| cf820a045f0626718ec147ebb26e31f82ec0b4fb |
|
20-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Also get the DRI2 front buffer when doing front buffer reading.
(cherry picked from commit df70d3049a396af3601d2a1747770635a74120bb)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| afd6141934a0fb52fc1739a2a9992db3ac34682b |
|
01-Sep-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add support for ARB_sync.
We currently weasel out of supporting the timeout parameter, but otherwise
this extension looks ready, and should make the common case happy.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| e0ec405a9fa6fbc1cf2ac531ed5efd1a64e01f18 |
|
03-Sep-2009 |
Brian Paul <brianp@vmware.com> |
intel: helper to debug bufmgr (disabled)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 0109e1b9f37fa33c9a24ae42799e51e28a60e4b9 |
|
10-Aug-2009 |
Brian Paul <brianp@vmware.com> |
intel: add missing \n to fprintf()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 8cb389ce354944a69418ca1d402791eef8fbf239 |
|
10-Aug-2009 |
Brian Paul <brianp@vmware.com> |
intel: use new _mesa_meta_blit_framebuffer() function
The previous version of framebuffer blit was a quick hack. The new meta
version works pretty well.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 61673aebb0c92bf187189c496e6c3a856825eceb |
|
04-Aug-2009 |
Brian Paul <brianp@vmware.com> |
intel: Fix inverted test for disabling flushing of front buffer output.
The comment disagreed with the code, and nicely drew my eyes to what was
going wrong.
Bug #21774 (blender)
Bug #21788 (readpix)
(cherry picked from master, commit fd65418f600874b05f902b622078b40bc1abb24a)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f5f8be8bb2dae91e0eb748b6f062eeb345605063 |
|
04-Aug-2009 |
Brian Paul <brianp@vmware.com> |
intel: Wait on the last swapbuffers to complete before queuing a new one.
This fixes jerkiness in doom3 and other apps since the kernel change to
throttle less absurdly, which led to a thundering herd of frames.
Because this is a rather minimal fix, there is at least one downside: If
the whole scene completes in one batchbuffer, we'll end up stalling the GPU.
Thanks to Michel Dänzer for suggesting using glFlush to signal frame end
instead of going to all the effort of adding a new DRI2 extension.
(cherry picked from master, commit 0828579a658af01a64b5e699175dc9bbbedcd685)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| fd65418f600874b05f902b622078b40bc1abb24a |
|
03-Aug-2009 |
Eric Anholt <eric@anholt.net> |
intel: Fix inverted test for disabling flushing of front buffer output.
The comment disagreed with the code, and nicely drew my eyes to what was
going wrong.
Bug #21774 (blender)
Bug #21788 (readpix)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 0828579a658af01a64b5e699175dc9bbbedcd685 |
|
21-Jul-2009 |
Eric Anholt <eric@anholt.net> |
intel: Wait on the last swapbuffers to complete before queuing a new one.
This fixes jerkiness in doom3 and other apps since the kernel change to
throttle less absurdly, which led to a thundering herd of frames.
Because this is a rather minimal fix, there is at least one downside: If
the whole scene completes in one batchbuffer, we'll end up stalling the GPU.
Thanks to Michel Dänzer for suggesting using glFlush to signal frame end
instead of going to all the effort of adding a new DRI2 extension.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 722d136f7bd3390c72bca175831647d93393e92d |
|
27-Jul-2009 |
Brian Paul <brianp@vmware.com> |
intel: Clean up leak of driver context structure on context destroy.
(cherry picked from commit ddef7dc87b2001fbe117ee5f24a0c645ee95a03c)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f6f0e117a45a64464e49290ebc9f75b9a976070a |
|
15-Jul-2009 |
Dave Airlie <airlied@redhat.com> |
intel/radeon: add common metaops code.
Move all the metaops to a dri_metaops file and port radeon/intel
to use the new common meta ops code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 9615daa9324341f6a56932dc46b807f402d18283 |
|
13-Jul-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_5_branch'
|
| 022e8e582ee408845bc622d56487b220b27df9a6 |
|
13-Jul-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Bump driver data, add RC3 tag
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 2995bf0d68f1b28ba68b81e9dc79e3ab52bc2795 |
|
13-Jul-2009 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: add support for new chipsets
1. new PCI ids
2. fix some 3D commands on new chipset
3. fix send instruction on new chipset
4. new VUE vertex header
5. ff_sync message (added by Zou Nan Hai <nanhai.zou@intel.com>)
6. the offset in JMPI is in unit of 64bits on new chipset
7. new cube map layout
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| ddef7dc87b2001fbe117ee5f24a0c645ee95a03c |
|
02-Jul-2009 |
Eric Anholt <eric@anholt.net> |
intel: Clean up leak of driver context structure on context destroy.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| b8c479d4b0519bde0e395ea669b017b6a6188146 |
|
29-Jun-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_5_branch'
|
| 4e43126a5915b1233c89c61400c8270d23d48ea3 |
|
29-Jun-2009 |
Brian Paul <brianp@vmware.com> |
intel: added null ptr check
This fixes a segfault seen with piglit's fdo20701 test.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a96f86831e666dd3942828abd156805c242e44f6 |
|
29-Jun-2009 |
Eric Anholt <eric@anholt.net> |
Revert "intel: Remove unneded pthread mutex in LOCK_HARDWARE."
This reverts commit de447afff26706e3bf8bdcd5cfb8b1daf49b4b21 but
puts the lock under DRI1-only.
From keithw:
> It's there because the DRI1 code doesn't actually achieve the mutexing
> which it looks as if it should. For multi-threaded applications it was
> always possible to get two threads inside locked regions -- I have no
> idea how, but it certainly was and presumably still is possible.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 94008088c1e6758a44a2f48c5a94db1f072d255a |
|
29-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Move note_unlock() implementation to the one place it's needed.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| de447afff26706e3bf8bdcd5cfb8b1daf49b4b21 |
|
29-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Remove unneded pthread mutex in LOCK_HARDWARE.
This would cause LOCK_HARDWARE to mutex all contexts in this process on
both DRI1 and DRI2. On DRI1, LOCK_HARDWARE already does it for all
processes on the system. On DRI2, LOCK_HARDWARE doesn't, but there shouldn't
be any state outside the context that needs any additional protection.
Notably, the bufmgr is protected by its own mutex and not
LOCK_HARDWARE.
This code was originally introduced with the i915tex code dump, so it's not
clear what it was there for.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 3927874d9c7fafb61651d0fc69547c8e010181f5 |
|
29-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Make LOCK_HARDWARE recursive to avoid hand-rolling recursiveness.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 2d86503471cb8691ce266342810237fc1b15a7b2 |
|
26-Jun-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
intel / DRI2: Additional flush of fake front-buffer to real front-buffer
To maintain correctness, the server will copy the real front-buffer to
a newly allocated fake front-buffer in DRI2GetBuffersWithFormat.
However, if the DRI2GetBuffersWithFormat is triggered by glViewport,
this will copy stale data into the new buffer. Fix this by flushing
the current fake front-buffer to the real front-buffer in
intel_viewport.
Fixes bug #22288.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 61a2c9668fd59dc301c2b61d46b48c974d0f0109 |
|
10-May-2009 |
Eric Anholt <eric@anholt.net> |
intel: Skip the DRI2 renderbuffer update when doing Viewport on an FBO.
(cherry picked from commit d4a42b0ce6455d03be70aa56aacd779be193aca4)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a18e209edb5348eb167e9d7184597031bbbbe622 |
|
27-Jun-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_5_branch'
Conflicts:
Makefile
src/gallium/drivers/softpipe/sp_screen.c
src/mesa/main/version.h
|
| a9b03aaebf7ada116d0c63a0f00b50e7b5b2f1eb |
|
22-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Refuse to do texture tiling if we don't have the kernel support.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| df70d3049a396af3601d2a1747770635a74120bb |
|
20-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Also get the DRI2 front buffer when doing front buffer reading.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| dd26899ca39111e0866afed9df94bfb1618dd363 |
|
19-Jun-2009 |
Michel Dänzer <daenzer@vmware.com> |
intel: Fixups for 'mesa: create/destroy buffer objects via driver functions'.
Initialize all driver function hooks before calling _mesa_initialize_context(),
and handle all buffer objects in intel_buffer_object().
Fixes assertion failure when running glxinfo.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| b30dc2c66aeaad6661eef515a08a3da89aa07cb2 |
|
10-Jun-2009 |
Eric Anholt <eric@anholt.net> |
i915: Add an option for testing the effect of early Z in classic mode.
The early Z stuff is supposed to be unsafe without some more work in the
enable/disable path (in particular, how do we want to get it disabled on
the way out to the X Server?), but at the moment is 6% in OA.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 89205a8760b8a4651962b1ff0206699cbcd78d75 |
|
09-Jun-2009 |
Brian Paul <brianp@vmware.com> |
intel: make a bunch of glTexImage-related functions static
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1ba96651e12b3c74fb9c8f5a61b183ef36a27b1e |
|
03-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add support for tiled textures.
This is about a 30% performance win in OA with high settings on my GM45,
and experiments with 915GM indicate that it'll be around a 20% win there.
Currently, 915-class hardware is seriously hurt by the fact that we use
fence regs to control the tiling even for 3D instructions that could live
without them, so we spend a bunch of time waiting on previous rendering in
order to pull fences off. Thus, the texture_tiling driconf option defaults
off there for now.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 9178b31546e9817a0c9712f702b21f8c54efbd84 |
|
22-May-2009 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: Override MaxRenderbufferSize with hardware constraints
Limit the maximum renderbuffer size to 8192 on i965 and to 2048 on
earlier hardware.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| ca327b1688a8f70a4d01bf80d11508c90aafe64f |
|
13-May-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_5_branch'
|
| 99960393edb3d6c0d3702cf51b59c2e4189117c7 |
|
13-May-2009 |
Brian Paul <brianp@vmware.com> |
intel: added null ptr check
Fixes segfault in context tear-down when glClear was never called.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 3039acfc5db67f3935f9c30a9f17193ab52b20a9 |
|
13-May-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_5_branch'
Conflicts:
src/mesa/main/arrayobj.c
src/mesa/main/arrayobj.h
src/mesa/main/context.c
|
| 2e4e34689022ecfcc7dc107427db90cc52a94d63 |
|
13-May-2009 |
Brian Paul <brianp@vmware.com> |
intel: create a private gl_array_object for intel_clear_tris(), fix bug 21638
gl_array_object encapsulates a set of vertex arrays (see the
GL_APPLE_vertex_array_object extension).
Create a private gl_array_object for drawing the quad for intel_clear_tris()
so we don't have to worry about the user's vertex array state.
This fixes the no-op glClear bug #21638 and removes the need to call
_mesa_PushClientAttrib() and _mesa_PopClientAttrib().
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| d4a42b0ce6455d03be70aa56aacd779be193aca4 |
|
10-May-2009 |
Eric Anholt <eric@anholt.net> |
intel: Skip the DRI2 renderbuffer update when doing Viewport on an FBO.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| fc6d89145df6fc7a1c2ce648b474c3f203ca87c7 |
|
08-May-2009 |
Robert Ellison <papillo@vmware.com> |
i965: fix memory leak in context/renderbuffer region management
A temporary change to the intelMakeCurrent() function to make
it work with frame buffer objects causes the static regions
associated with the context (the front_region, back_region,
and depth_region) to take on an additional reference, with
no corresponding release. This causes a memory leak if a
program repeatedly creates and destroys contexts.
The fix is the corresponding hack, to unreference these
regions when the context is deleted, but only if the
framebuffer objects are still present and the same
regions are still referenced within.
Both sets of code have comment blocks referring to each
other.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 43d9020ff1e975e7f4f9480d9ef24f0b9fb2141f |
|
28-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: avoid segfault in intel_update_renderbuffers() if using DRI1
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 022319b92ccd2f3bfc4aca54ebc7e39aeddd8b21 |
|
25-Apr-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Fix more issues with the combined depth-stencil attachment
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 302ba83116a24dbcd09a5f8d10edaaf862127873 |
|
25-Apr-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Initialize region ptr to prevent assertion in intel_region_reference
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f2272b5b2fd9195fe8f9eccfdd2e3c13d18a35e7 |
|
21-Apr-2009 |
Ian Romanick <idr@freedesktop.org> |
intel / DRI2: When available, use DRI2GetBuffersWithFormat
This interface gives the driver two important features. First, it can
allocate the (fake) front-buffer only when needed. Second, it can
tell the buffer allocator the format of buffers being allocated. This
enables support for back-buffer and depth-buffer with different bits
per pixel.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@redhat.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 50853be894aa3edd1e9271f7d625f319209e340f |
|
22-Apr-2009 |
Roland Scheidegger <sroland@vmware.com> |
intel: fix max anisotropy supported
i915 actually supports up to 4 (according to header file - not tested),
i965 up to 16 (code already handled this but slightly broken), so don't use 2
for all chips, even though angular dependency is very high.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| ded05d32d5f948770ece088ea0ed6363c0055a4c |
|
10-Apr-2009 |
Brian Paul <brianp@vmware.com> |
intel: added screen->dri2.loader null pointer check in intel_flush()
Fixes segfaults when rendering to front buffer.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 6a6e478e5555714226c6f15c63c393f5c0d74de4 |
|
07-Apr-2009 |
Ian Romanick <idr@freedesktop.org> |
intel / DRI2: Accept fake front-buffer from loader
Handle the loader returning a fake front-buffer. Since the driver
never specifically requests a fake front-buffer, the driver assumes
that it will never receive both a fake and a real front-buffer.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@redhat.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 43cf0d1eebb9f425e1a0e176394b64e2cb406709 |
|
06-Apr-2009 |
Ian Romanick <idr@freedesktop.org> |
intel / DRI2: Track and flush front-buffer rendering
Track two flags: whether or not front-buffer rendering is currently
enabled and whether or not front-buffer rendering has been enabled
since the last glFlush. If the second flag is set, the front-buffer
is flushed via a loader call back. If the first flag is cleared, the
second flag is cleared at this time.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@redhat.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 6b187cc8a5041fe2bba1ecc34aa86516ebe8b1b0 |
|
06-Apr-2009 |
Eric Anholt <eric@anholt.net> |
intel: Avoid dri2 GetBuffers round-trips for internal Viewport calls.
This gets us the savings for driver-internal viewport calls that
dd1c68f15123a889a3ce9d2afe724e272d163e32 was attempting, without relying
on Xlib internals or clients handling X events.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 40bc2748c2781600c748e546160bcc2aab637825 |
|
06-Mar-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add always_flush_batch driconf option for making small batchbuffers.
This can improve debugging with INTEL_DEBUG=batch,sync by giving smaller
batchbuffers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f3687284c12f34268172b9c60e2effd697162129 |
|
06-Mar-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add always_flush_cache driconf option for debugging cache flush failure.
I keep wanting to hack this knob in as a one-time thing, so it seemed useful
to have all the time.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 34683150878e0af0859c94d0c1f0c4bf8395b042 |
|
05-Mar-2009 |
Robert Ellison <papillo@vmware.com> |
i965: add software fallback for conformant 3D textures and GL_CLAMP
The i965 hardware cannot do GL_CLAMP behavior on textures; an earlier
commit forced a software fallback if strict conformance was required
(i.e. the INTEL_STRICT_CONFORMANCE environment variable was set) and
2D textures were used, but it was somewhat flawed - it could trigger
the software fallback even if 2D textures weren't enabled, as long
as one texture unit was enabled.
This fixes that, and adds software fallback for GL_CLAMP behavior with
1D and 3D textures.
It also adds support for a particular setting of the INTEL_STRICT_CONFORMANCE
environment variable, which forces software fallbacks to be taken *all*
the time. This is helpful with debugging. The value is:
export INTEL_STRICT_CONFORMANCE=2
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 40290745ea645b52d30f866abfe25ac5d58a755c |
|
23-Feb-2009 |
Shaohua Li <shaohua.li@intel.com> |
i915: Add support for a new G33-like chipset.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 60953059ea2319eae4d737831824dbce08ee1725 |
|
11-Feb-2009 |
Eric Anholt <eric@anholt.net> |
intel: Clean up several 965 memory leaks on context destroy.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 01bc4d441fd6821ad9fc20d5e9544e4e587e4ff0 |
|
10-Feb-2009 |
Eric Anholt <eric@anholt.net> |
intel: Don't do the extra MI_FLUSH in flushing except when doing glFlush().
Everything other than "make sure the last rendering ends up visible on the
screen" doesn't need that behavior.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f82f1ffba9f2e5971a6a3f3927ae3b22b798bab2 |
|
08-Feb-2009 |
Eric Anholt <eric@anholt.net> |
intel: don't crash when dri2 tells us about buffers we don't care about.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| d555cdbe3ed6b503863886a2d4499c812bee5acb |
|
26-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: remove old #includes
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 4006c5e4526a1cdb910500764590e39d32750967 |
|
26-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: move intelInitExtensions() and related code into new intel_extensions.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 4451eb2e7533a41f67ed21d05a8d9ab5efec77e9 |
|
26-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: move glClear-related code into new intel_clear.c file
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 6fcebbe719eab1f8e292c8dcd6c3e898b0f8d261 |
|
26-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: Move swap-related functions from intel_buffers.c to new intel_swapbuffers.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| cba5ce166523a8bb6888a0ea28a26e30204f30a4 |
|
24-Jan-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'tex_combine4'
|
| 96ee3db6f76f25f8dcf36b365f6be93341d90472 |
|
24-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: enable GL_NV_texture_env_combine4 extension
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 39b4061bb9be540dfb51891e22c505bc235ec8a2 |
|
21-Jan-2009 |
Owain G. Ainsworth <oga@openbsd.org> |
intel: Prevent an "irq is not working" printf when only pipe B is enabled.
intelMakeCurrent is called before intelWindowMoved (in fact, it calls
it), so calculation of the correct vblank crtc has not happened yet.
Fix this by making a function that fixes up a set of vblank flags and
call if from both functions.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| b8fc605cdb741bd409dbca44150a7ba262b6f157 |
|
23-Jan-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'vertex_array_bgra'
|
| dab586b0755bffa7c4da0fdc571e0f504f4066c2 |
|
23-Jan-2009 |
Brian Paul <brianp@vmware.com> |
i965: enable GL_EXT_vertex_array_bgra
Simply a matter of choosing the right surface/vertex format for GLubyte/GL_BGRA arrays.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f7265e7a57bf49285dd226cf1effc75bf0cd54c0 |
|
10-Jan-2009 |
Ian Romanick <idr@freedesktop.org> |
965: Enable GL_EXT_stencil_two_side
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a7f98f4c7e9e20ec23ded82881360ec307881509 |
|
21-Jan-2009 |
Brian Paul <brianp@vmware.com> |
i965: enable GL_ARB_framebuffer_object
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 6d2e1f6a2cd25107ad9bd88b1decd05fc8000f78 |
|
22-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: add GL_EXT_framebuffer blit extension
This functionality is required by GL_ARB_framebuffer_object.
For now, implement it in terms of glCopyPixels(). This will need to be
revisted though.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 39e6d0d8108fe6d222865e7bb9de1e3cea18b4c4 |
|
20-Jan-2009 |
Timo Aaltonen <tjaalton@cc.hut.fi> |
[intel] Go back to using the typedef for the sarea struct
The upstream linux kernel headers and libdrm kernel headers disagree on the
tag name for the sarea struct: _drm_i915_sarea vs drm_i915_sarea. They
both typedef it to drm_i915_sarea_t though, so just use that.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| c157a5bb9131dc95f2e5519fda19cf8c3567543a |
|
14-Jan-2009 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: bump driver date
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 0c4346e63258bcaaae6f3045bc44d0e24073dd0e |
|
30-Dec-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: disable ATI_texture_env_combine3 for i830( and related device).
Thanks to Eric for pointing it out.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 0674a238547f9f4f9de9c6cf5d72015e5960aa9e |
|
29-Dec-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: enable ATI_texture_env_combine3. Fixes #17707
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| b359350017a8f0328912f19d233bcdcc256aded1 |
|
20-Dec-2008 |
Dave Airlie <airlied@redhat.com> |
Remove third buffer support from Mesa.
This is part of the deprecated pageflipping infrastructure.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 2adef553f2549e30b4a1894e7f9077ac339ea61c |
|
14-Nov-2008 |
Eric Anholt <eric@anholt.net> |
i915: Don't overwrite i915's Viewport function from generic code.
Instead, have i965 and i915 both call the generic function from their Viewport.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 0cade4de4f74f6b0e86fb6622e2fc370c73fd840 |
|
20-Oct-2008 |
Eric Anholt <eric@anholt.net> |
intel: Don't keep intel->pClipRects, and instead just calculate it when needed.
This avoids issues with dereferencing stale cliprects around intel_draw_buffer
time. Additionally, take advantage of cliprects staying constant for FBOs and
DRI2, and emit cliprects in the batchbuffer instead of having to flush batch
each time they change.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| e7002694418cd0decb1cd0d9121f634480e5f0d6 |
|
10-Oct-2008 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: GLSL 1.20 is broken in Mesa, so disable it in the i965 driver
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| c157cfc6376f7469ab272b18868183e5ff9ac754 |
|
07-Oct-2008 |
Eric Anholt <eric@anholt.net> |
i965: Add ARB_occlusion_query support.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| db9ba91971a1f279b040b30bf8fd5d13a70f0a03 |
|
03-Oct-2008 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Don't advertise unsupported extensions on pre-965 hardware
Move GL_ARB_texture_non_power_of_two and GL_ATI_separate_stencil
from the generic extension list to the 965-specific list. Neither
extension is supported on i830-class hardware, and
GL_ATI_separate_stencil is not supported on i915-class hardare.
GL_ARB_texture_non_power_of_two is supported on i915-class hardare and
is already in the i915-specific list.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 4741dbcbbc2514de370a760f4b78a17491014555 |
|
02-Oct-2008 |
Ian Romanick <ian.d.romanick@intel.com> |
Unify ARB_depth_texture and SGIX_depth_texture
The ARB extension is a superset of the older SGIX extension. Any
hardware that can support the SGIX version can also support the ARB
version. In Mesa, any driver that supports one also supports the
other. This unification just simplifies some bits of code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 08b9e29c1d4d28fee13658b0421b4522d9c36b3a |
|
30-Sep-2008 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Clean-up the extension string madness!
- Sort extensions by ARB, then EXT, then vendor by name
- Remove redundant (only one of GL_{ARB,EXT,NV}_texture_rectangle) or
duplicate extension strings
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 7d99ddcb2bb09f1f54d91e6e20e42d217a5bccdf |
|
26-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Fix a number of memory leaks on context destroy.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 7ce597508e7400e962c8fdb2d255f9887cb9c710 |
|
20-Sep-2008 |
Keith Whitwell <keith@tungstengraphics.com> |
mesa: improved driver query interface
Brought over from gallium-0.2 branch.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| ecadb51bbcb972a79f3ed79e65a7986b9396e757 |
|
18-Sep-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 904f31a62444d9f7e9b12ddafaa4beeb7fed6dfa |
|
17-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Destroy bufmgr in screen destroy, not context.
Caused server crashes on second context creation since
7e0bbdcf033981282978554c2e68ce48b55aa291.
Bug #17600.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 8db761409dadc2e899d4e7107eff3aa07b07aa11 |
|
13-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Add a width field to regions, and use it for making miptrees in TFP.
Otherwise, we would use the pitch as width of the texture, and compiz would
render the pitch padding on the right hand side.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 34bba445a12f7b81654a416fd1630c8890cfc178 |
|
12-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Don't segfault on TFP from a bad drawable.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| b2e083eba2668517e40bc94e3a19cd15824ce93c |
|
12-Sep-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: Add support for G41 chipset which is another 4 series.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 35fd72756a05463568d94862f4fcd234903e1204 |
|
08-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: track move of bo_exec from drivers to bufmgr.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 3628185f566e178a12b493fb89abf52b4b281f99 |
|
06-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: track bufmgr move to libdrm_intel and bufmgr_fake irq emit/wait change.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 7e0bbdcf033981282978554c2e68ce48b55aa291 |
|
04-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Move the bufmgr back to the screen.
Mesa requires that we be able to share objects between contexts, which means
that the objects need to be created by the same bufmgr, and the bufmgr
internally requires pthread protection for thread safety.
Rely on the bufmgr having appropriate locking.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 06537296f18750a9442e3007fe7d8b2b966dd2cc |
|
05-Sep-2008 |
Dave Airlie <airlied@redhat.com> |
intel: only enable occlusion query if the drm has defines.
This interface has to be re-written to not be dumb and to work
for multiple apps.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| e32721c46a713f55a8fd70e61f9cb066eeb69211 |
|
03-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Fix refcounting on depth buffer initialization in DRI2.
(Reverts a change to work around the problem on 965).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 3bb2a24921af0ec419afc928ee5b279982aa01ea |
|
03-Sep-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: Fix a crash if dri2 is disabled.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f56b569e9af356c11869ee49a4669bb01b75397e |
|
13-Aug-2008 |
Kristian Høgsberg <krh@redhat.com> |
DRI2: Drop sarea, implement swap buffers in the X server.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f75843a517bd188639e6866db2a7b04de3524e16 |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Revert "Merge branch 'drm-gem'""
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Merge branch 'drm-gem'"
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03.
Conflicts:
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| b17b110716936c32d20910cb9589038062b4f527 |
|
20-Aug-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: Enable GL_ARB_fragment_program_shadow and fix key->shadowtex_mask. (bug #16852, #16853)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| c9120a0d1928f8ca6114923fd307fbc5c358eb0b |
|
30-Jul-2008 |
Eric Anholt <eric@anholt.net> |
intel-gem: Use new getparam to detect kernel GEM support.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1e645b365900cf1c71ca5594bd6b549a1f203040 |
|
26-Jul-2008 |
Ian Romanick <ian.d.romanick@intel.com> |
Merge branch 'master' into drm-gem
Conflicts:
src/mesa/drivers/dri/common/dri_bufmgr.c
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
|
| 99fe0c222c2853a612b73aa6fcffb0a532ce5747 |
|
18-Jul-2008 |
Ian Romanick <ian.d.romanick@intel.com> |
intel-gem: Bump driver date
Bump the driver date and insert the string "GEM". When running tests,
this make it much easier to know that the right driver is being used.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 29cb89d0c2cb17e2fa38563fc93794a6ebd75cf9 |
|
16-Jul-2008 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Clean-up ARB_texture_env_crossbar
Enable support for ARB_texture_env_crossbar in the master extension
list instead of in every single device-specific list.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 2e841880cfc1006a2818d4a8bfefd21136dc39a9 |
|
11-Jul-2008 |
Eric Anholt <eric@anholt.net> |
drm-gem: Use new GEM ioctls for tiling state, and support new swizzle modes.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 92c075eeb7c330ea420400d1c2bae57356b19f03 |
|
08-Jul-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: official name for GM45 chipset
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a995bdced20a55759dffd901c10ec5fb251191cf |
|
02-Jul-2008 |
Eric Anholt <eric@anholt.net> |
intel-gem: Emit an MI_FLUSH at glFlush() so frontbuffer rendering is flushed.
We have something similar in the X Server that covers X Server rendering, this
is the equivalent here for rendering to the front buffer. If we cared about
avoiding this at glFlush time, we could only do this when some actual
frontbuffer rendering had occurred.
Bug #16392.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| e74f54793e45dd2e36474f6fc527456647f32efd |
|
02-Jul-2008 |
Eric Anholt <eric@anholt.net> |
intel-gem: Move bit 6 x tiling swizzle to a driconf option, and add new mode.
It turns out that it's not just deviceID dependent, and there's some additional
undefined factor that determines the bit 6 swizzling. It's now controllable
with swizzle_mode=[012] until we get a response on how to automatically detect.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 93f701bc3619864ac6f067d37212e96545a57e16 |
|
26-Jun-2008 |
Eric Anholt <eric@anholt.net> |
intel: Replace sprinkled intel_batchbuffer_flush with MI_FLUSH or nothing.
Most of these were to ensure that caches got synchronized between 2d (or meta)
rendering and later use of the target as a source, such as for texture
miptree setup. Those are replaced with intel_batchbuffer_emit_mi_flush(),
which just drops an MI_FLUSH. Most of the remainder were to ensure that
REFERENCES_CLIPRECTS batchbuffers got flushed before the lock was dropped.
Those are now replaced by automatically flushing those when dropping the lock.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f6abe8f0f2fba3073b58b96ed38aae163c765b4a |
|
24-Jun-2008 |
Eric Anholt <eric@anholt.net> |
Merge commit 'origin/master' into drm-gem
|
| 744357e29c6a51b9e1770e0340eee5105f6b5585 |
|
24-Jun-2008 |
Eric Anholt <eric@anholt.net> |
intel: Same pixel function init for everyone now.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a42dac187973cbc17be6c59db89264cbc935ab91 |
|
24-Jun-2008 |
Eric Anholt <eric@anholt.net> |
i915: Accumulate the VB into a local buffer and subdata it in.
This lets GEM use pwrite, for an additional 4% or so speedup.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 654258a4fe5e7114022c6e02f2844fc469fcc6f3 |
|
18-Jun-2008 |
Eric Anholt <eric@anholt.net> |
Merge commit 'origin/master' into drm-gem
|
| 3e8aadee8beffaabd4e0c60c289b98124e288dcd |
|
18-Jun-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: add support for Intel 4 series chipsets
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 64adeb163d7da6d75b5664cd2ee3783cadaf63d8 |
|
17-Jun-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Fix no_rast option on non-965.
The no_rast fallback was getting partially overwritten by later TNL init,
resulting in a segfault when things were in a mixed-up state.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 4b5b008d54e86ac4f0a2176429d062100978ca8c |
|
03-Jun-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Convert drivers to using libdrm bufmgr code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 200fd13d4a605bea07857d6c3e7c85ee07d663cb |
|
23-May-2008 |
Eric Anholt <eric@anholt.net> |
Remove stale comment about glFlush().
We don't need an MI_FLUSH there, because everything that's been flushed in the
batch will eventually hit the hardware.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 6cefae5354fb3015c5a14677071871613faa9c3a |
|
20-May-2008 |
Eric Anholt <eric@anholt.net> |
Add back a mostly-correct glFinish for GEM and fake.
The right solution would probably be keeping a list of regions which have been
rendered to.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
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| ab50ddaa9173ae108833db0edb209045788efc41 |
|
07-May-2008 |
Eric Anholt <eric@anholt.net> |
GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags.
The GEM flags are much more descriptive for what we need. Since this makes
bufmgr_fake rather device-specific, move it to the intel common directory.
We've wanted to do device-specific stuff to it before.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 537bbe6dec780f6f85838fe7e6036579c509f8a6 |
|
06-May-2008 |
Keith Packard <keithp@keithp.com> |
[intel-GEM] Add tiling support to swrast.
Accessing tiled surfaces without using the fence registers requires that
software deal with the address swizzling itself.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| eb10cdc838fc31ea2cf59f556f6f7d8b072f5bae |
|
02-May-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Fix build for GEM. TTM is now disabled, and fencing is gone.
Fencing was used in two places: ensuring that we didn't get too many frames
ahead of ourselves, and glFinish. glFinish will be satisfied by waiting on
buffers like we would do for CPU access on them. The "don't get too far ahead"
is now the responsibility of the execution manager (kernel).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| e82dd8c6e1fa2fff5b960de26961080ba5e9651d |
|
27-Mar-2008 |
Kristian Høgsberg <krh@redhat.com> |
DRI interface changes and DRI2 direct rendering support.
Add DRI2 direct rendering support to libGL and add DRI2 client side
protocol code. Extend the GLX 1.3 create drawable functions in
glx_pbuffer.c to call into the DRI driver when possible.
Introduce __DRIconfig, opaque struct that represents a DRI driver
configuration. Get's rid of the open coded __GLcontextModes in the
DRI driver interface and the context modes create and destroy
functions that the loader was requires to provide. glcore.h is no
longer part of the DRI driver interface. The DRI config is GL binding
agnostic, that is, not specific to GLX, EGL or other bindings.
The core API is now also an extension, and the driver exports a list
of extensions as the symbol __driDriverExtensions, which the loader
must dlsym() for. The list of extension will always include the DRI
core extension, which allows creating and manipulating DRI screens,
drawables and contexts. The DRI legacy extension, when available,
provides alternative entry points for creating the DRI objects that
work with the XF86DRI infrastructure.
Change DRI2 client code to not use drm drawables or contexts. We
never used drm_drawable_t's and the only use for drm_context_t was as
a unique identifier when taking the lock. We now just allocate a
unique lock ID out of the DRILock sarea block. Once we get rid of the
lock entirely, we can drop this hack.
Change the interface between dri_util.c and the drivers, so that the
drivers now export the DriverAPI struct as driDriverAPI instead of the
InitScreen entry point. This lets us avoid dlsym()'ing for the DRI2
init screen function to see if DRI2 is supported by the driver.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 0e34dcc6dfb466537f0e74d6c267d2f8bf795b66 |
|
25-Mar-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: fix the issue "VBO: Cannot allocate memory for a BO" on
965 after merging intel_context.c from i915 and i965. fix bug# 15152.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 947312e464edf4257c06e9889c976e268d43dd97 |
|
19-Mar-2008 |
Zou Nan hai <nanhai.zou@intel.com> |
[i915] arb point sprite only support in i965
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 2d5ea175f7fcd65de71b7589435b9a908f998d51 |
|
10-Mar-2008 |
Kristian Høgsberg <krh@sasori.boston.redhat.com> |
DRI2: Pass the context instead of the screen to __dri2ParseEvents().
Makes a lot more sense, since the screen is always implicit in the
DRI drawable, but it may not be possible to track down a context from
just a drawable.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1e6943cf5592186c3721dfefbdcf1a519a79bd8f |
|
07-Mar-2008 |
Kristian Høgsberg <krh@redhat.com> |
[intel] Only enable GL_EXT_texture_sRGB on i965.
Fixes #14799.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| fe91c05b5494b889c8adda77ff562712116d2e59 |
|
05-Mar-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Add a driconf option to cache freed buffer objects for reuse.
This is defaulted off as it has potentially large memory costs for a modest
performance gain. Ideally we will improve DRM performance to the point where
this optimization is not worth the memory cost in any case, or find some
middle ground in caching only limited numbers of certain buffers. For now,
this provides a modest 4% improvement in openarena on GM965 and 10% in openarena
on GM945.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 6cb3f5c4d8618a14bb7ad1d9df10ed7e648a7b2b |
|
28-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
Use __DRIextension mechanism providing loader functionality to the driver.
Instead of passing in a fixed struct, the loader now passes in a list
of __DRIextension structs, to advertise the functionality it can provide
to the driver. Each extension is individually versioned and can be
extended or phased out as the interface develops.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 16242a8007f41ab63f9a28bb9a750857c8cdb8af |
|
26-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
Reduce the versioning madness required to create a DRI2 screen.
Right now the DRI2 screen constructor takes 3 different versions:
DRI, DDX and DRM. This is mostly useless, though:
DRI: The DRI driver doesn't actually care about the DRI protocol,
it only talks to the loader, which in turn speaks DRI protocol. Thus,
the DRI protocol version is of not interest to the DRI driver, but it
needs to know what functionality the loader provides. At this point
that's reflected in the __DRIinterfaceMethods struct and the
internal_version integer.
DDX: The DDX version number is essentially used to track extensions
to the SAREA. With DRI2 the SAREA consists of a number of versioned,
self-describing blocks, so the DDX version is no longer interesting.
DRM: We have the fd, lets just ask the kernel ourselves.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 5197a31b8e64a047d058c4cb174efb9c8b816652 |
|
29-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
intel: Set the lock flag early to avoid deadlock.
Another regression from the intel_context.c merge.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 60c0f09abb9421de359cd92e094a943d650fc7fa |
|
27-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
intel: Always use intelInitExtensions() for initializing extensions.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 45a800a2e7eb5d8d87820ef32d60ae912729cbb0 |
|
25-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
intel: Only enable GL_ARB_occlusion_query on i965.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| dd1d66fc4ab5d7064113a2017a431c3461598b91 |
|
23-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
intel: Merge intel_context.c from i915 and i965.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| c99fa92ff84e927c82e1231d96921fda9a2b0852 |
|
22-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
Merge {i915,i965}/intel_context.h as intel/intel_context.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|