Searched defs:Load1 (Results 1 - 11 of 11) sorted by relevance

/external/llvm/unittests/Analysis/
H A DAliasAnalysisTest.cpp82 auto *Load1 = new LoadInst(Addr, "load", BB); local
89 CheckModRef(Load1, AliasAnalysis::ModRefResult::Ref);
/external/skia/src/opts/
H A DSk4px_NEON.h17 inline Sk4px Sk4px::Load1(const SkPMColor px[1]) { function in class:Sk4px
H A DSk4px_SSE2.h16 inline Sk4px Sk4px::Load1(const SkPMColor px[1]) { return Sk16b(_mm_cvtsi32_si128(*px)); } function in class:Sk4px
H A DSk4px_none.h28 inline Sk4px Sk4px::Load1(const SkPMColor px[1]) { function in class:Sk4px
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPUInstrInfo.cpp187 bool AMDGPUInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, argument
/external/llvm/lib/Transforms/Scalar/
H A DMergedLoadStoreMotion.cpp266 LoadInst *Load1 = dyn_cast<LoadInst>(Inst); local
270 AliasAnalysis::Location Loc1 = AA->getLocation(Load1);
271 if (AA->isMustAlias(Loc0, Loc1) && Load0->isSameOperationAs(Load1) &&
272 !isLoadHoistBarrierInRange(BB1->front(), *Load1, Load1) &&
274 return Load1;
/external/llvm/lib/Target/R600/
H A DAMDGPUInstrInfo.cpp212 bool AMDGPUInstrInfo::shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, argument
H A DSIInstrInfo.cpp77 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, argument
80 if (!Load0->isMachineOpcode() || !Load1->isMachineOpcode())
84 unsigned Opc1 = Load1->getMachineOpcode();
93 if (getNumOperandsNoGlue(Load0) != getNumOperandsNoGlue(Load1))
97 if (Load0->getOperand(1) != Load1->getOperand(1))
101 if (findChainOperand(Load0) != findChainOperand(Load1))
112 Offset1 = cast<ConstantSDNode>(Load1->getOperand(2))->getZExtValue();
117 assert(getNumOperandsNoGlue(Load0) == getNumOperandsNoGlue(Load1));
120 if (Load0->getOperand(0) != Load1->getOperand(0))
126 dyn_cast<ConstantSDNode>(Load1
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/external/llvm/include/llvm/Target/
H A DTargetInstrInfo.h822 virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, argument
834 /// have already been scheduled after Load1.
835 virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, argument
/external/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp1527 bool ARMBaseInstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, argument
1533 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode())
1536 switch (Load1->getMachineOpcode()) {
1578 if (Load1->getOperand(0) != Load2->getOperand(0) ||
1579 Load1->getOperand(4) != Load2->getOperand(4))
1583 if (Load1->getOperand(3) != Load2->getOperand(3))
1587 if (isa<ConstantSDNode>(Load1->getOperand(1)) &&
1589 Offset1 = cast<ConstantSDNode>(Load1->getOperand(1))->getSExtValue();
1604 /// have already been scheduled after Load1.
1608 bool ARMBaseInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNod argument
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/external/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp5639 X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, argument
5641 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode())
5643 unsigned Opc1 = Load1->getMachineOpcode();
5721 if (Load1->getOperand(0) != Load2->getOperand(0) ||
5722 Load1->getOperand(5) != Load2->getOperand(5))
5725 if (Load1->getOperand(4) != Load2->getOperand(4))
5728 if (Load1->getOperand(1) == Load2->getOperand(1) &&
5729 Load1->getOperand(2) == Load2->getOperand(2)) {
5730 if (cast<ConstantSDNode>(Load1->getOperand(1))->getZExtValue() != 1)
5734 if (isa<ConstantSDNode>(Load1
5744 shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const argument
[all...]

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