Searched defs:PReg (Results 1 - 6 of 6) sorted by relevance

/external/llvm/lib/Target/R600/
H A DR600ExpandSpecialInstrs.cpp122 unsigned PReg = AMDGPU::R600_ArrayBaseRegClass.getRegister( local
134 DstReg, MI.getOperand(3 + (Chan % 2)).getReg(), PReg);
151 unsigned PReg = AMDGPU::R600_ArrayBaseRegClass.getRegister( local
163 DstReg, MI.getOperand(3 + (Chan % 2)).getReg(), PReg);
181 unsigned PReg = AMDGPU::R600_ArrayBaseRegClass.getRegister( local
187 TRI.getSubReg(DstReg, TRI.getSubRegFromChannel(Chan)), PReg);
/external/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h165 ForwardedRegister(unsigned VReg, MCPhysReg PReg, MVT VT) argument
166 : VReg(VReg), PReg(PReg), VT(VT) {}
168 MCPhysReg PReg; member in struct:llvm::ForwardedRegister
/external/llvm/lib/CodeGen/
H A DMachineFunction.cpp435 unsigned MachineFunction::addLiveIn(unsigned PReg, argument
438 unsigned VReg = MRI.getLiveInVirtReg(PReg);
447 assert((VRegRC == RC || (VRegRC->contains(PReg) &&
453 MRI.addLiveIn(PReg, VReg);
H A DRegAllocPBQP.cpp579 unsigned PReg = RawPRegOrder[I]; local
580 if (MRI.isReserved(PReg))
584 if (!RegMaskOverlaps.empty() && !RegMaskOverlaps.test(PReg))
589 for (MCRegUnitIterator Units(PReg, &TRI); Units.isValid(); ++Units) {
599 VRegAllowed.push_back(PReg);
676 unsigned PReg = G.getNodeMetadata(NId).getAllowedRegs()[AllocOption - 1]; local
678 << TRI.getName(PReg) << "\n");
679 assert(PReg != 0 && "Invalid preg selected.");
680 VRM.assignVirt2Phys(VReg, PReg);
704 unsigned PReg local
[all...]
/external/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp843 unsigned PReg = PMO.getReg(); local
844 unsigned PRegNum = PMO.isUndef() ? UINT_MAX : TRI->getEncodingValue(PReg);
/external/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp872 addLiveIn(MachineFunction &MF, unsigned PReg, const TargetRegisterClass *RC) argument
875 MF.getRegInfo().addLiveIn(PReg, VReg);

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