Searched defs:ShiftTy (Results 1 - 5 of 5) sorted by relevance
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1670 EVT ShiftTy = DCI.isBeforeLegalize() ? local 1677 DAG.getConstant(AndRHS->getAPIntValue().logBase2(), ShiftTy))); 1685 DAG.getConstant(C1.logBase2(), ShiftTy))); 1700 EVT ShiftTy = DCI.isBeforeLegalize() ? local 1704 DAG.getConstant(ShiftBits, ShiftTy)); 1728 EVT ShiftTy = DCI.isBeforeLegalize() ? local 1732 DAG.getConstant(ShiftBits, ShiftTy));
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H A D | LegalizeIntegerTypes.cpp | 2149 EVT ShiftTy = TLI.getShiftAmountTy(VT); local 2150 assert(ShiftTy.getScalarType().getSizeInBits() >= 2153 if (ShiftOp.getValueType() != ShiftTy) 2154 ShiftOp = DAG.getZExtOrTrunc(ShiftOp, dl, ShiftTy);
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/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 165 bool SelectShift(const Instruction *I, ARM_AM::ShiftOpc ShiftTy); 2755 ARM_AM::ShiftOpc ShiftTy) { 2798 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, ShiftImm)); 2801 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, 0)); 2754 SelectShift(const Instruction *I, ARM_AM::ShiftOpc ShiftTy) argument
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/external/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 797 EVT ShiftTy, SelectionDAG &DAG) { 812 DAG.getConstant(Log2_64(C), ShiftTy)); 822 SDValue Op0 = genConstMult(X, Floor, DL, VT, ShiftTy, DAG); 823 SDValue Op1 = genConstMult(X, C - Floor, DL, VT, ShiftTy, DAG); 829 SDValue Op0 = genConstMult(X, Ceil, DL, VT, ShiftTy, DAG); 830 SDValue Op1 = genConstMult(X, Ceil - C, DL, VT, ShiftTy, DAG); 796 genConstMult(SDValue X, uint64_t C, SDLoc DL, EVT VT, EVT ShiftTy, SelectionDAG &DAG) argument
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/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 501 ARM_AM::ShiftOpc ShiftTy; member in struct:__anon10680::ARMOperand::PostIdxRegOp 511 ARM_AM::ShiftOpc ShiftTy; member in struct:__anon10680::ARMOperand::RegShiftedRegOp 518 ARM_AM::ShiftOpc ShiftTy; member in struct:__anon10680::ARMOperand::RegShiftedImmOp 1119 return Kind == k_PostIndexRegister && PostIdxReg.ShiftTy ==ARM_AM::no_shift; 1240 return PostIdxReg.ShiftTy == ARM_AM::no_shift; 1809 ARM_AM::getSORegOpc(RegShiftedReg.ShiftTy, RegShiftedReg.ShiftImm))); 1820 ARM_AM::getSORegOpc(RegShiftedImm.ShiftTy, Imm))); 2393 PostIdxReg.ShiftTy); 2623 Op->RegShiftedReg.ShiftTy = ShTy; 2636 Op->RegShiftedImm.ShiftTy 2783 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, unsigned ShiftImm, SMLoc S, SMLoc E) argument 3056 ARM_AM::ShiftOpc ShiftTy = StringSwitch<ARM_AM::ShiftOpc>(lowerCase) local 4604 ARM_AM::ShiftOpc ShiftTy = ARM_AM::no_shift; local 7971 ARM_AM::ShiftOpc ShiftTy; local 7996 ARM_AM::ShiftOpc ShiftTy; local [all...] |
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