Searched defs:isZExt (Results 1 - 3 of 3) sorted by relevance

/external/llvm/include/llvm/Target/
H A DTargetCallingConv.h63 bool isZExt() const { return Flags & ZExt; } function in struct:llvm::ISD::ArgFlagsTy
/external/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp120 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1010 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false);
1018 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true);
1242 if (!Outs[0].Flags.isZExt() && !Outs[0].Flags.isSExt())
1245 bool IsZExt = Outs[0].Flags.isZExt();
1292 bool isZExt = isa<ZExtInst>(I); local
1309 if (!emitIntExt(SrcVT, SrcReg, DestVT, ResultReg, isZExt))
1383 bool isZExt) {
1385 bool Success = emitIntExt(SrcVT, SrcReg, DestVT, DestReg, isZExt);
1382 emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt) argument
/external/llvm/lib/Target/ARM/
H A DARMFastISel.cpp172 bool isZExt);
174 unsigned Alignment = 0, bool isZExt = true,
183 unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
963 unsigned Alignment, bool isZExt, bool allocReg) {
975 Opc = isZExt ? ARM::t2LDRBi8 : ARM::t2LDRSBi8;
977 Opc = isZExt ? ARM::t2LDRBi12 : ARM::t2LDRSBi12;
979 if (isZExt) {
994 Opc = isZExt ? ARM::t2LDRHi8 : ARM::t2LDRSHi8;
996 Opc = isZExt ? ARM::t2LDRHi12 : ARM::t2LDRSHi12;
998 Opc = isZExt
962 ARMEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, unsigned Alignment, bool isZExt, bool allocReg) argument
1365 ARMEmitCmp(const Value *Src1Value, const Value *Src2Value, bool isZExt) argument
2592 ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt) argument
2736 bool isZExt = isa<ZExtInst>(I); local
2888 uint8_t isZExt : 1; member in struct:__anon10666::FoldableLoadExtendsStruct
2919 bool isZExt; local
[all...]

Completed in 182 milliseconds