Searched refs:reg (Results 51 - 75 of 1023) sorted by relevance

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/external/libunwind/src/mips/
H A DGinit.c45 uc_addr (ucontext_t *uc, int reg) argument
47 if (reg >= UNW_MIPS_R0 && reg < UNW_MIPS_R0 + 32)
48 return &uc->uc_mcontext.gregs[reg - UNW_MIPS_R0];
49 else if (reg == UNW_MIPS_PC)
58 tdep_uc_addr (ucontext_t *uc, int reg) argument
60 char *addr = uc_addr (uc, reg);
62 if (reg >= UNW_MIPS_R0 && reg <= UNW_MIPS_R31
140 access_reg (unw_addr_space_t as, unw_regnum_t reg, unw_word_ argument
171 access_fpreg(unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val, int write, void *arg) argument
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H A DGregs.c30 tdep_access_reg (struct cursor *c, unw_regnum_t reg, unw_word_t *valp, argument
35 switch (reg)
69 loc = c->dwarf.loc[reg - UNW_MIPS_R0];
73 loc = c->dwarf.loc[reg];
85 Debug (1, "bad register number %u\n", reg);
98 tdep_access_fpreg (struct cursor *c, unw_regnum_t reg, unw_fpreg_t *valp, argument
101 Debug (1, "bad register number %u\n", reg);
/external/libunwind/src/ppc32/
H A DGinit.c46 uc_addr (ucontext_t *uc, int reg) argument
50 if ((unsigned) (reg - UNW_PPC32_R0) < 32)
51 addr = &uc->uc_mcontext.uc_regs->gregs[reg - UNW_PPC32_R0];
54 if ( ((unsigned) (reg - UNW_PPC32_F0) < 32) &&
55 ((unsigned) (reg - UNW_PPC32_F0) >= 0) )
56 addr = &uc->uc_mcontext.uc_regs->fpregs.fpregs[reg - UNW_PPC32_F0];
62 switch (reg)
87 tdep_uc_addr (ucontext_t *uc, int reg) argument
89 return uc_addr (uc, reg);
157 access_reg (unw_addr_space_t as, unw_regnum_t reg, unw_word_ argument
189 access_fpreg(unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val, int write, void *arg) argument
[all...]
H A DGregs.c31 tdep_access_reg (struct cursor *c, unw_regnum_t reg, unw_word_t *valp, argument
36 switch (reg)
62 if ((((unsigned) (reg - UNW_PPC32_F0)) <= 31))
65 loc = c->dwarf.loc[reg];
74 tdep_access_fpreg (struct cursor *c, unw_regnum_t reg, unw_fpreg_t *valp, argument
79 if ((unsigned) (reg - UNW_PPC32_F0) < 32)
81 loc = c->dwarf.loc[reg];
/external/libunwind/src/ptrace/
H A D_UPT_access_fpreg.c31 _UPT_access_fpreg (unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val, argument
39 if ((unsigned) reg >= ARRAY_SIZE (_UPT_reg_offset))
50 ptrace (PTRACE_POKEUSER, pid, (void*) (_UPT_reg_offset[reg] + i * sizeof(wp[i])),
65 (void*) (_UPT_reg_offset[reg] + i * sizeof(wp[i])), 0);
75 _UPT_access_fpreg (unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val, argument
82 if ((unsigned) reg >= ARRAY_SIZE (_UPT_reg_offset))
89 memcpy(&fpreg.fpr_xacc[reg], val, sizeof(unw_fpreg_t));
91 memcpy(&fpreg.fpr_acc[reg], val, sizeof(unw_fpreg_t));
99 memcpy(val, &fpreg.fpr_xacc[reg], sizeof(unw_fpreg_t));
101 memcpy(val, &fpreg.fpr_acc[reg], sizeo
110 _UPT_access_fpreg(unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val, int write, void *arg) argument
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/external/mesa3d/src/gallium/drivers/i915/
H A Di915_fpc.h127 #define GET_CHANNEL_SRC( reg, channel ) ((reg<<(channel*4)) & (0xf<<20))
130 #define GET_UREG_TYPE(reg) (((reg)>>UREG_TYPE_SHIFT)&REG_TYPE_MASK)
131 #define GET_UREG_NR(reg) (((reg)>>UREG_NR_SHIFT)&REG_NR_MASK)
140 swizzle(int reg, uint x, uint y, uint z, uint w) argument
146 return ((reg & ~UREG_XYZW_CHANNEL_MASK) |
147 CHANNEL_SRC(GET_CHANNEL_SRC(reg, x), 0) |
148 CHANNEL_SRC(GET_CHANNEL_SRC(reg,
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/external/mesa3d/src/mesa/drivers/dri/i915/
H A Di915_program.c42 #define A0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
43 #define D0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
44 #define T0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
45 #define A0_SRC0( reg ) (((reg)&UREG_MASK)>>UREG_A0_SRC0_SHIFT_LEFT)
46 #define A1_SRC0( reg ) (((reg)
113 GLuint reg = UREG(type, nr); local
303 GLint reg, idx; local
333 GLint reg, idx; local
373 GLint reg; local
410 GLint reg, i; local
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H A Di915_program.h75 #define GET_CHANNEL_SRC( reg, channel ) ((reg<<(channel*4)) & (0xf<<20))
78 #define GET_UREG_TYPE(reg) (((reg)>>UREG_TYPE_SHIFT)&REG_TYPE_MASK)
79 #define GET_UREG_NR(reg) (((reg)>>UREG_NR_SHIFT)&REG_NR_MASK)
88 swizzle(int reg, int x, int y, int z, int w) argument
90 return ((reg & ~UREG_XYZW_CHANNEL_MASK) |
91 CHANNEL_SRC(GET_CHANNEL_SRC(reg, x), 0) |
92 CHANNEL_SRC(GET_CHANNEL_SRC(reg,
100 negate(int reg, int x, int y, int z, int w) argument
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/external/lldb/source/Plugins/Process/POSIX/
H A DRegisterContext_i386.cpp159 #define GPR_SIZE(reg) sizeof(((RegisterContext_i386::GPR*)NULL)->reg)
162 #define FPR_SIZE(reg) sizeof(((RegisterContext_i386::FPU*)NULL)->reg)
170 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
171 { #reg, alt, GPR_SIZE(reg), GPR_OFFSET(reg), eEncodingUint, \
172 eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg }, NULL, NULL }
174 #define DEFINE_FPR(reg, kind
247 GetRegOffset(unsigned reg) argument
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/external/clang/test/CodeGen/
H A Dpr4349.c4 union reg union
12 union reg pc;
/external/mesa3d/src/gallium/drivers/nv50/codegen/
H A Dnv50_ir.cpp96 imm.reg.type = type;
221 memset(&reg, 0, sizeof(reg));
222 reg.size = 4;
227 reg.file = file;
228 reg.size = (file != FILE_PREDICATE) ? 4 : 1;
229 reg.data.id = -1;
244 reg.file = lval->reg.file;
245 reg
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/external/libunwind/src/arm/
H A DGinit.c42 uc_addr (unw_tdep_context_t *uc, int reg) argument
44 if (reg >= UNW_ARM_R0 && reg < UNW_ARM_R0 + 16)
45 return &uc->regs[reg - UNW_ARM_R0];
53 tdep_uc_addr (unw_tdep_context_t *uc, int reg) argument
55 return uc_addr (uc, reg);
121 access_reg (unw_addr_space_t as, unw_regnum_t reg, unw_word_t *val, int write, argument
127 if (unw_is_fpreg (reg))
130 Debug (16, "reg = %s\n", unw_regname (reg));
152 access_fpreg(unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val, int write, void *arg) argument
[all...]
/external/libunwind/src/hppa/
H A DGinit.c44 uc_addr (ucontext_t *uc, int reg) argument
48 if ((unsigned) (reg - UNW_HPPA_GR) < 32)
49 addr = &uc->uc_mcontext.sc_gr[reg - UNW_HPPA_GR];
50 else if ((unsigned) (reg - UNW_HPPA_FR) < 32)
51 addr = &uc->uc_mcontext.sc_fr[reg - UNW_HPPA_FR];
60 _Uhppa_uc_addr (ucontext_t *uc, int reg) argument
62 return uc_addr (uc, reg);
134 access_reg (unw_addr_space_t as, unw_regnum_t reg, unw_word_t *val, int write, argument
140 if ((unsigned int) (reg - UNW_HPPA_FR) < 32)
143 addr = uc_addr (uc, reg);
165 access_fpreg(unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val, int write, void *arg) argument
[all...]
/external/libunwind/src/ia64/
H A DGget_save_loc.c34 unw_get_save_loc (unw_cursor_t *cursor, int reg, unw_save_loc_t *sloc) argument
43 switch (reg)
57 loc = c->loc[IA64_REG_R4 + (reg - (UNW_IA64_GR + 4))];
61 loc = c->loc[IA64_REG_NAT4 + (reg - (UNW_IA64_NAT + 4))];
62 reg_loc = c->loc[IA64_REG_R4 + (reg - (UNW_IA64_NAT + 4))];
63 nat_bitnr = c->nat_bitnr[reg - (UNW_IA64_NAT + 4)];
74 loc = c->loc[IA64_REG_F16 + (reg - (UNW_IA64_FR + 16))];
92 case UNW_IA64_GR + 32 ... UNW_IA64_GR + 127: /* stacked reg */
93 reg = rotate_gr (c, reg
[all...]
/external/mesa3d/src/gallium/drivers/svga/svgadump/
H A Dsvga_shader.h60 sh_reg_type( struct sh_reg reg )
62 return reg.type_lo | (reg.type_hi << 3);
73 struct sh_reg reg; member in struct:sh_def
80 struct sh_reg reg; member in struct:sh_defb
92 struct sh_reg reg; member in struct:sh_defi
142 sh_dstreg_type( struct sh_dstreg reg )
144 return reg.type_lo | (reg.type_hi << 3);
154 struct sh_dstreg reg; member in struct:sh_dcl
[all...]
/external/valgrind/VEX/test/
H A Dmmxtest.c85 #define mmx_m2r(op, mem, reg) \
90 __asm__ __volatile__ ("movq %%" #reg ", %0" \
93 fprintf(stderr, #reg "=0x%016llx) => ", mmx_trace.q); \
94 __asm__ __volatile__ (#op " %0, %%" #reg \
97 __asm__ __volatile__ ("movq %%" #reg ", %0" \
100 fprintf(stderr, #reg "=0x%016llx\n", mmx_trace.q); \
103 #define mmx_r2m(op, reg, mem) \
106 __asm__ __volatile__ ("movq %%" #reg ", %0" \
109 fprintf(stderr, #op "_r2m(" #reg "=0x%016llx, ", mmx_trace.q); \
112 __asm__ __volatile__ (#op " %%" #reg ",
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/external/libunwind/src/aarch64/
H A DGinit.c44 uc_addr (ucontext_t *uc, int reg) argument
46 if (reg >= UNW_AARCH64_X0 && reg <= UNW_AARCH64_V31)
47 return &uc->uc_mcontext.regs[reg];
55 tdep_uc_addr (ucontext_t *uc, int reg) argument
57 return uc_addr (uc, reg);
129 access_reg (unw_addr_space_t as, unw_regnum_t reg, unw_word_t *val, int write, argument
135 if (unw_is_fpreg (reg))
138 if (!(addr = uc_addr (uc, reg)))
144 Debug (12, "%s <- %lx\n", unw_regname (reg), *va
159 access_fpreg(unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val, int write, void *arg) argument
[all...]
/external/libunwind/src/sh/
H A DGinit.c43 uc_addr (ucontext_t *uc, int reg) argument
45 if (reg >= UNW_SH_R0 && reg <= UNW_SH_PR)
46 return &uc->uc_mcontext.gregs[reg];
54 tdep_uc_addr (ucontext_t *uc, int reg) argument
56 return uc_addr (uc, reg);
128 access_reg (unw_addr_space_t as, unw_regnum_t reg, unw_word_t *val, int write, argument
134 if (unw_is_fpreg (reg))
137 if (!(addr = uc_addr (uc, reg)))
143 Debug (12, "%s <- %x\n", unw_regname (reg), *va
158 access_fpreg(unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val, int write, void *arg) argument
[all...]
/external/mesa3d/src/mesa/drivers/dri/r200/
H A Dr200_vertprog.h145 #define VSF_ATTR_UNITY(reg) EASY_VSF_SOURCE(reg, ONE, ONE, ONE, ONE, ATTR, NONE)
146 #define VSF_UNITY(reg) EASY_VSF_SOURCE(reg, ONE, ONE, ONE, ONE, NONE, NONE)
149 #define VSF_REG(reg) EASY_VSF_SOURCE(reg, X, Y, Z, W, ATTR, NONE)
152 #define VSF_PARAM(reg) EASY_VSF_SOURCE(reg, X, Y, Z, W, PARAM, NONE)
155 #define VSF_TMP(reg) EASY_VSF_SOURCE(reg,
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/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_clip_tri.c58 c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++;
61 c->reg.fixed_planes = brw_vec4_grf(i, 0);
73 c->reg.vertex[j] = brw_vec4_grf(i, 0);
84 brw_MOV(&c->func, byte_offset(c->reg.vertex[j], delta), brw_imm_f(0));
88 c->reg.t = brw_vec1_grf(i, 0);
89 c->reg.loopcount = retype(brw_vec1_grf(i, 1), BRW_REGISTER_TYPE_D);
90 c->reg.nr_verts = retype(brw_vec1_grf(i, 2), BRW_REGISTER_TYPE_UD);
91 c->reg.planemask = retype(brw_vec1_grf(i, 3), BRW_REGISTER_TYPE_UD);
92 c->reg.plane_equation = brw_vec4_grf(i, 4);
95 c->reg
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/external/libunwind/src/x86_64/
H A DGregs.c32 linux_scratch_loc (struct cursor *c, unw_regnum_t reg)
39 return DWARF_REG_LOC (&c->dwarf, reg);
50 return DWARF_REG_LOC (&c->dwarf, reg);
55 x86_64_scratch_loc (struct cursor *c, unw_regnum_t reg)
58 return linux_scratch_loc (c, reg);
60 return DWARF_REG_LOC (&c->dwarf, reg);
65 tdep_access_reg (struct cursor *c, unw_regnum_t reg, unw_word_t *valp, argument
72 switch (reg)
90 arg_num = reg - UNW_X86_64_RAX;
104 loc = c->dwarf.loc[(reg
134 tdep_access_fpreg(struct cursor *c, unw_regnum_t reg, unw_fpreg_t *valp, int write) argument
[all...]
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPUAsmPrinter.cpp74 unsigned reg; local
79 reg = MO.getReg();
80 if (reg == AMDGPU::VCC) {
84 if (reg == AMDGPU::EXEC) {
87 if (AMDGPU::SReg_32RegClass.contains(reg)) {
90 } else if (AMDGPU::VReg_32RegClass.contains(reg)) {
93 } else if (AMDGPU::SReg_64RegClass.contains(reg)) {
96 } else if (AMDGPU::VReg_64RegClass.contains(reg)) {
99 } else if (AMDGPU::SReg_128RegClass.contains(reg)) {
102 } else if (AMDGPU::VReg_128RegClass.contains(reg)) {
[all...]
H A DSIRegisterInfo.cpp33 unsigned SIRegisterInfo::getBinaryCode(unsigned reg) const
35 switch (reg) {
38 default: return getHWRegNum(reg);
/external/v8/src/
H A Dcode.h22 explicit ParameterCount(Register reg) argument
23 : reg_(reg), immediate_(0) { }
32 Register reg() const { function in class:v8::internal::BASE_EMBEDDED
/external/lldb/source/Target/
H A DRegisterContext.cpp70 for (uint32_t reg = start_idx; reg < num_registers; ++reg)
72 const RegisterInfo * reg_info = GetRegisterInfoAtIndex(reg);
85 RegisterContext::GetRegisterName (uint32_t reg) argument
87 const RegisterInfo * reg_info = GetRegisterInfoAtIndex(reg);
96 uint32_t reg = ConvertRegisterKindToRegisterNumber (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC); local
97 return ReadRegisterAsUnsigned (reg, fail_value);
103 uint32_t reg = ConvertRegisterKindToRegisterNumber (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC); local
104 bool success = WriteRegisterFromUnsigned (reg, p
119 uint32_t reg = ConvertRegisterKindToRegisterNumber (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP); local
126 uint32_t reg = ConvertRegisterKindToRegisterNumber (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP); local
133 uint32_t reg = ConvertRegisterKindToRegisterNumber (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FP); local
140 uint32_t reg = ConvertRegisterKindToRegisterNumber (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FP); local
147 uint32_t reg = ConvertRegisterKindToRegisterNumber (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_RA); local
154 uint32_t reg = ConvertRegisterKindToRegisterNumber (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FLAGS); local
160 ReadRegisterAsUnsigned(uint32_t reg, uint64_t fail_value) argument
180 WriteRegisterFromUnsigned(uint32_t reg, uint64_t uval) argument
219 const uint32_t reg = reg_set->registers[reg_idx]; local
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