1/**********************************************************
2 * Copyright 2007-2009 VMware, Inc.  All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26/**
27 * @file
28 * SVGA Shader Token Definitions
29 *
30 * @author Michal Krol <michal@vmware.com>
31 */
32
33#ifndef ST_SHADER_SVGA_H
34#define ST_SHADER_SVGA_H
35
36#include "pipe/p_compiler.h"
37
38struct sh_op
39{
40   unsigned opcode:16;
41   unsigned control:8;
42   unsigned length:4;
43   unsigned predicated:1;
44   unsigned unused:1;
45   unsigned coissue:1;
46   unsigned is_reg:1;
47};
48
49struct sh_reg
50{
51   unsigned number:11;
52   unsigned type_hi:2;
53   unsigned relative:1;
54   unsigned unused:14;
55   unsigned type_lo:3;
56   unsigned is_reg:1;
57};
58
59static INLINE unsigned
60sh_reg_type( struct sh_reg reg )
61{
62   return reg.type_lo | (reg.type_hi << 3);
63}
64
65struct sh_cdata
66{
67   float xyzw[4];
68};
69
70struct sh_def
71{
72   struct sh_op op;
73   struct sh_reg reg;
74   struct sh_cdata cdata;
75};
76
77struct sh_defb
78{
79   struct sh_op op;
80   struct sh_reg reg;
81   uint data;
82};
83
84struct sh_idata
85{
86   int xyzw[4];
87};
88
89struct sh_defi
90{
91   struct sh_op op;
92   struct sh_reg reg;
93   struct sh_idata idata;
94};
95
96#define PS_TEXTURETYPE_UNKNOWN   SVGA3DSAMP_UNKNOWN
97#define PS_TEXTURETYPE_2D        SVGA3DSAMP_2D
98#define PS_TEXTURETYPE_CUBE      SVGA3DSAMP_CUBE
99#define PS_TEXTURETYPE_VOLUME    SVGA3DSAMP_VOLUME
100
101struct sh_sampleinfo
102{
103   unsigned unused:27;
104   unsigned texture_type:4;
105   unsigned is_reg:1;
106};
107
108struct sh_semantic
109{
110   unsigned usage:4;
111   unsigned unused1:12;
112   unsigned usage_index:4;
113   unsigned unused2:11;
114   unsigned is_reg:1;
115};
116
117#define SH_WRITEMASK_0              0x1
118#define SH_WRITEMASK_1              0x2
119#define SH_WRITEMASK_2              0x4
120#define SH_WRITEMASK_3              0x8
121#define SH_WRITEMASK_ALL            0xf
122
123#define SH_DSTMOD_NONE              0x0
124#define SH_DSTMOD_SATURATE          0x1
125#define SH_DSTMOD_PARTIALPRECISION  0x2
126#define SH_DSTMOD_MSAMPCENTROID     0x4
127
128struct sh_dstreg
129{
130   unsigned number:11;
131   unsigned type_hi:2;
132   unsigned relative:1;
133   unsigned unused:2;
134   unsigned write_mask:4;
135   unsigned modifier:4;
136   unsigned shift_scale:4;
137   unsigned type_lo:3;
138   unsigned is_reg:1;
139};
140
141static INLINE unsigned
142sh_dstreg_type( struct sh_dstreg reg )
143{
144   return reg.type_lo | (reg.type_hi << 3);
145}
146
147struct sh_dcl
148{
149   struct sh_op op;
150   union {
151      struct sh_sampleinfo sampleinfo;
152      struct sh_semantic semantic;
153   } u;
154   struct sh_dstreg reg;
155};
156
157struct sh_srcreg
158{
159   unsigned number:11;
160   unsigned type_hi:2;
161   unsigned relative:1;
162   unsigned unused:2;
163   unsigned swizzle_x:2;
164   unsigned swizzle_y:2;
165   unsigned swizzle_z:2;
166   unsigned swizzle_w:2;
167   unsigned modifier:4;
168   unsigned type_lo:3;
169   unsigned is_reg:1;
170};
171
172static INLINE unsigned
173sh_srcreg_type( struct sh_srcreg reg )
174{
175   return reg.type_lo | (reg.type_hi << 3);
176}
177
178struct sh_dstop
179{
180   struct sh_op op;
181   struct sh_dstreg dst;
182};
183
184struct sh_srcop
185{
186   struct sh_op op;
187   struct sh_srcreg src;
188};
189
190struct sh_src2op
191{
192   struct sh_op op;
193   struct sh_srcreg src0;
194   struct sh_srcreg src1;
195};
196
197struct sh_unaryop
198{
199   struct sh_op op;
200   struct sh_dstreg dst;
201   struct sh_srcreg src;
202};
203
204struct sh_binaryop
205{
206   struct sh_op op;
207   struct sh_dstreg dst;
208   struct sh_srcreg src0;
209   struct sh_srcreg src1;
210};
211
212struct sh_trinaryop
213{
214   struct sh_op op;
215   struct sh_dstreg dst;
216   struct sh_srcreg src0;
217   struct sh_srcreg src1;
218   struct sh_srcreg src2;
219};
220
221struct sh_comment
222{
223   unsigned opcode:16;
224   unsigned size:16;
225};
226
227#endif /* ST_SHADER_SVGA_H */
228