/art/compiler/optimizing/ |
H A D | code_generator_arm.cc | 182 __ LoadImmediate(calling_convention.GetRegisterAt(0), cls_->GetTypeIndex()); 228 __ LoadImmediate(calling_convention.GetRegisterAt(0), instruction_->GetStringIndex()); 814 __ LoadImmediate(location.AsRegister<Register>(), value); 817 __ LoadImmediate(IP, value); 824 __ LoadImmediate(location.AsRegisterPairLow<Register>(), Low32Bits(value)); 825 __ LoadImmediate(location.AsRegisterPairHigh<Register>(), High32Bits(value)); 828 __ LoadImmediate(IP, Low32Bits(value)); 830 __ LoadImmediate(IP, High32Bits(value)); 976 __ LoadImmediate(temp, value); 1055 __ LoadImmediate(tem [all...] |
H A D | intrinsics_arm.cc | 880 __ LoadImmediate(tmp_reg, std::numeric_limits<uint16_t>::max()); 890 __ LoadImmediate(tmp_reg, 0);
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/art/compiler/utils/arm/ |
H A D | assembler_arm.cc | 560 LoadImmediate(scratch.AsCoreRegister(), imm); 568 LoadImmediate(scratch.AsCoreRegister(), imm); 747 LoadImmediate(out_reg.AsCoreRegister(), 0, EQ); 786 LoadImmediate(out_reg.AsCoreRegister(), 0, EQ); // TODO: why EQ?
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H A D | assembler_arm32.cc | 1417 void Arm32Assembler::LoadImmediate(Register rd, int32_t value, Condition cond) { function in class:art::arm::Arm32Assembler 1442 LoadImmediate(IP, offset, cond); 1482 LoadImmediate(IP, offset, cond); 1500 LoadImmediate(IP, offset, cond); 1520 LoadImmediate(IP, offset, cond); 1554 LoadImmediate(IP, offset, cond); 1572 LoadImmediate(IP, offset, cond);
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H A D | assembler_thumb2.cc | 2523 void Thumb2Assembler::LoadImmediate(Register rd, int32_t value, Condition cond) { function in class:art::arm::Thumb2Assembler 2548 LoadImmediate(IP, offset, cond); 2588 LoadImmediate(IP, offset, cond); 2606 LoadImmediate(IP, offset, cond); 2642 LoadImmediate(tmp_reg, offset, cond); 2680 LoadImmediate(IP, offset, cond); 2698 LoadImmediate(IP, offset, cond);
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H A D | assembler_arm.h | 540 virtual void LoadImmediate(Register rd, int32_t value, Condition cond = AL) = 0; 551 LoadImmediate(IP, int_value, cond);
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H A D | assembler_arm32.h | 248 void LoadImmediate(Register rd, int32_t value, Condition cond = AL) OVERRIDE;
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H A D | assembler_thumb2.h | 287 void LoadImmediate(Register rd, int32_t value, Condition cond = AL) OVERRIDE;
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/art/compiler/utils/arm64/ |
H A D | assembler_arm64.cc | 160 LoadImmediate(scratch.AsXRegister(), imm); 169 LoadImmediate(scratch.AsXRegister(), imm); 199 void Arm64Assembler::LoadImmediate(XRegister dest, int32_t value, function in class:art::arm64::Arm64Assembler 566 LoadImmediate(out_reg.AsXRegister(), 0, eq); 602 LoadImmediate(out_reg.AsXRegister(), 0, eq);
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H A D | assembler_arm64.h | 222 void LoadImmediate(XRegister dest, int32_t value, vixl::Condition cond = vixl::al);
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/art/compiler/utils/mips/ |
H A D | assembler_mips.cc | 454 void MipsAssembler::LoadImmediate(Register rt, int32_t value) { function in class:art::mips::MipsAssembler 650 LoadImmediate(scratch.AsCoreRegister(), imm); 658 LoadImmediate(scratch.AsCoreRegister(), imm); 864 LoadImmediate(out_reg.AsCoreRegister(), 0); 905 LoadImmediate(out_reg.AsCoreRegister(), 0);
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H A D | assembler_mips.h | 137 void LoadImmediate(Register rt, int32_t value);
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