/art/compiler/utils/arm/ |
H A D | assembler_thumb2_test.cc | 255 __ StoreToOffset(type, arm::R0, arm::SP, offset); 256 __ StoreToOffset(type, arm::IP, arm::SP, offset); 257 __ StoreToOffset(type, arm::IP, arm::R5, offset); 271 __ StoreToOffset(type, arm::R0, arm::SP, offset); 272 __ StoreToOffset(type, arm::IP, arm::SP, offset); 273 __ StoreToOffset(type, arm::IP, arm::R5, offset); 299 __ StoreToOffset(type, arm::R0, arm::SP, offset); 308 __ StoreToOffset(type, arm::R11, arm::SP, offset); 309 __ StoreToOffset(type, arm::R11, arm::R5, offset); 323 __ StoreToOffset(typ [all...] |
H A D | assembler_arm.cc | 415 StoreToOffset(kStoreWord, R0, SP, 0); 426 StoreToOffset(kStoreWord, reg.AsCoreRegister(), SP, offset); 489 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); 492 StoreToOffset(kStoreWord, src.AsRegisterPairLow(), SP, dest.Int32Value()); 493 StoreToOffset(kStoreWord, src.AsRegisterPairHigh(), 506 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); 512 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); 519 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); 521 StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value() + 4); 528 StoreToOffset(kStoreWor [all...] |
H A D | assembler_arm32.h | 255 void StoreToOffset(StoreOperandType type,
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H A D | assembler_thumb2.h | 294 void StoreToOffset(StoreOperandType type,
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H A D | assembler_arm.h | 590 virtual void StoreToOffset(StoreOperandType type,
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H A D | assembler_arm32.cc | 1512 void Arm32Assembler::StoreToOffset(StoreOperandType type, function in class:art::arm::Arm32Assembler
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H A D | assembler_thumb2.cc | 2618 void Thumb2Assembler::StoreToOffset(StoreOperandType type, function in class:art::arm::Thumb2Assembler
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/art/compiler/utils/mips/ |
H A D | assembler_mips.cc | 512 void MipsAssembler::StoreToOffset(StoreOperandType type, Register reg, Register base, function in class:art::mips::MipsAssembler 556 StoreToOffset(kStoreWord, RA, SP, stack_offset); 561 StoreToOffset(kStoreWord, reg, SP, stack_offset); 566 StoreToOffset(kStoreWord, method_reg.AsMips().AsCoreRegister(), SP, 0); 571 StoreToOffset(kStoreWord, reg, SP, frame_size + kFramePointerSize + (i * kFramePointerSize)); 620 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); 623 StoreToOffset(kStoreWord, src.AsRegisterPairLow(), SP, dest.Int32Value()); 624 StoreToOffset(kStoreWord, src.AsRegisterPairHigh(), 637 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); 643 StoreToOffset(kStoreWor [all...] |
H A D | assembler_mips.h | 143 void StoreToOffset(StoreOperandType type, Register reg, Register base, int32_t offset);
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/art/compiler/utils/arm64/ |
H A D | assembler_arm64.cc | 58 StoreToOffset(ETR, SP, offset.Int32Value()); 112 void Arm64Assembler::StoreToOffset(XRegister source, XRegister base, int32_t offset) { function in class:art::arm64::Arm64Assembler 134 StoreToOffset(src.AsXRegister(), SP, offs.Int32Value()); 153 StoreToOffset(src.AsXRegister(), SP, offs.Int32Value()); 170 StoreToOffset(scratch.AsXRegister(), ETR, offs.Int32Value()); 179 StoreToOffset(scratch.AsXRegister(), ETR, tr_offs.Int32Value()); 193 StoreToOffset(source.AsXRegister(), SP, dest_off.Int32Value()); 195 StoreToOffset(scratch.AsXRegister(), SP, dest_off.Int32Value() + 8); 361 StoreToOffset(scratch.AsXRegister(), SP, fr_offs.Int32Value()); 370 StoreToOffset(scratc [all...] |
H A D | assembler_arm64.h | 218 void StoreToOffset(XRegister source, XRegister base, int32_t offset);
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/art/compiler/utils/mips64/ |
H A D | assembler_mips64.cc | 1017 void Mips64Assembler::StoreToOffset(StoreOperandType type, GpuRegister reg, GpuRegister base, function in class:art::mips64::Mips64Assembler 1081 StoreToOffset(kStoreDoubleword, RA, SP, stack_offset); 1086 StoreToOffset(kStoreDoubleword, reg, SP, stack_offset); 1091 StoreToOffset(kStoreDoubleword, method_reg.AsMips64().AsGpuRegister(), SP, 0); 1107 StoreToOffset((size == 4) ? kStoreWord : kStoreDoubleword, 1160 StoreToOffset(kStoreDoubleword, src.AsGpuRegister(), SP, dest.Int32Value()); 1162 StoreToOffset(kStoreWord, src.AsGpuRegister(), SP, dest.Int32Value()); 1181 StoreToOffset(kStoreWord, src.AsGpuRegister(), SP, dest.Int32Value()); 1187 StoreToOffset(kStoreDoubleword, src.AsGpuRegister(), SP, dest.Int32Value()); 1195 StoreToOffset(kStoreWor [all...] |
H A D | assembler_mips64.h | 220 void StoreToOffset(StoreOperandType type, GpuRegister reg, GpuRegister base, int32_t offset);
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/art/compiler/optimizing/ |
H A D | code_generator_arm.cc | 358 __ StoreToOffset(kStoreWord, static_cast<Register>(reg_id), SP, stack_index); 556 __ StoreToOffset(kStoreWord, R0, SP, 0); 734 __ StoreToOffset(kStoreWord, source.AsRegister<Register>(), SP, destination.GetStackIndex()); 740 __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex()); 780 __ StoreToOffset(kStoreWord, R1, SP, destination.GetStackIndex()); 781 __ StoreToOffset(kStoreWord, R2, SP, destination.GetHighStackIndex(kArmWordSize)); 783 __ StoreToOffset(kStoreWordPair, source.AsRegisterPairLow<Register>(), 818 __ StoreToOffset(kStoreWord, IP, SP, location.GetStackIndex()); 829 __ StoreToOffset(kStoreWord, IP, SP, location.GetStackIndex()); 831 __ StoreToOffset(kStoreWor [all...] |
H A D | code_generator_mips64.cc | 467 __ StoreToOffset(store_type, 471 __ StoreToOffset(store_type, TMP, SP, index1 + stack_offset); 684 __ StoreToOffset(store_type, 703 __ StoreToOffset(store_type, TMP, SP, destination.GetStackIndex()); 710 __ StoreToOffset(kStoreWord, TMP, SP, destination.GetStackIndex()); 713 __ StoreToOffset(kStoreDoubleword, TMP, SP, destination.GetStackIndex()); 772 __ StoreToOffset(store_type, reg_loc.AsRegister<GpuRegister>(), SP, mem_loc.GetStackIndex()); 811 __ StoreToOffset(kStoreWord, TMP, SP, location.GetStackIndex()); 814 __ StoreToOffset(kStoreDoubleword, TMP, SP, location.GetStackIndex()); 923 __ StoreToOffset(kStoreDoublewor [all...] |
/art/compiler/utils/ |
H A D | assembler_thumb_test.cc | 798 TEST(Thumb2AssemblerTest, StoreToOffset) { 801 __ StoreToOffset(kStoreWord, R2, R4, 12); // Simple 802 __ StoreToOffset(kStoreWord, R2, R4, 0x2000); // Offset too big. 803 __ StoreToOffset(kStoreWord, R0, R12, 12); 804 __ StoreToOffset(kStoreHalfword, R0, R12, 12); 805 __ StoreToOffset(kStoreByte, R2, R12, 12); 811 dump(managed_code, "StoreToOffset");
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