| /art/runtime/arch/arm64/ |
| H A D | memcmp16_arm64.S | 53 eor tmp1, src1, src2
66 eor diff, data1, data2 /* Non-zero if differences found. */
|
| H A D | quick_entrypoints_arm64.S | 1021 eor w2, w1, w2 // lock_word.ThreadId() ^ self->ThreadId()
1065 eor w3, w3, w2 // lock_word.ThreadId() ^ self->ThreadId()
|
| /art/compiler/utils/arm/ |
| H A D | assembler_thumb2_test.cc | 213 TEST_F(AssemblerThumb2Test, eor) {
215 __ eor(arm::R1, arm::R1, arm::ShifterOperand(arm::R0));
216 __ eor(arm::R1, arm::R0, arm::ShifterOperand(arm::R1));
217 __ eor(arm::R1, arm::R8, arm::ShifterOperand(arm::R0));
218 __ eor(arm::R8, arm::R1, arm::ShifterOperand(arm::R0));
219 __ eor(arm::R1, arm::R0, arm::ShifterOperand(arm::R8));
223 "eor r1, r0, r1\n"
224 "eor r1, r8, r0\n"
225 "eor r8, r1, r0\n"
226 "eor r
[all...] |
| H A D | assembler_arm32.h | 44 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
|
| H A D | assembler_arm32_test.cc | 591 T4Helper(&arm::Arm32Assembler::eor, true, "eor{cond} {reg1}, {reg2}, {shift}", "eor");
|
| H A D | assembler_thumb2.h | 66 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
|
| H A D | assembler_arm.h | 353 virtual void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
|
| H A D | assembler_arm32.cc | 65 void Arm32Assembler::eor(Register rd, Register rn, const ShifterOperand& so, function in class:art::arm::Arm32Assembler
|
| H A D | assembler_thumb2.cc | 60 void Thumb2Assembler::eor(Register rd, Register rn, const ShifterOperand& so, function in class:art::arm::Thumb2Assembler
|
| /art/runtime/arch/arm/ |
| H A D | memcmp16_arm.S | 91 eor r0, r3, r1
|
| H A D | quick_entrypoints_arm.S | 484 eor r2, r1, r2 @ lock_word.ThreadId() ^ self->ThreadId()
526 eor r3, r3, r2 @ lock_word.ThreadId() ^ self->ThreadId()
|
| /art/compiler/optimizing/ |
| H A D | intrinsics_arm.cc | 281 __ eor(out_reg_lo, mask, ShifterOperand(out_reg_lo));
282 __ eor(out_reg_hi, mask, ShifterOperand(out_reg_hi));
289 __ eor(out_reg, mask, ShifterOperand(out_reg));
|
| H A D | code_generator_arm.cc | 2694 __ eor(out.AsRegister<Register>(), in.AsRegister<Register>(), ShifterOperand(1));
4038 __ eor(out, first, ShifterOperand(second));
4061 __ eor(out.AsRegisterPairLow<Register>(),
4064 __ eor(out.AsRegisterPairHigh<Register>(),
|
| /art/compiler/utils/ |
| H A D | assembler_thumb_test.cc | 219 __ eor(R0, R1, ShifterOperand(R2));
230 __ eor(R0, R0, ShifterOperand(R1));
264 __ eor(R0, R1, ShifterOperand(0x55));
298 __ eor(R0, R1, ShifterOperand(0x550055));
|
| /art/compiler/dex/quick/arm64/ |
| H A D | int_arm64.cc | 486 uint64_t eor = DecodeLogicalImmediate(/*is_wide*/true, magic_table[lit].magic64_eor); local
487 reconstructed_imm = base ^ eor;
|