Searched refs:so (Results 1 - 15 of 15) sorted by relevance

/art/test/115-native-bridge/
H A Drun21 ln -s ${LIBPATH}/libnativebridgetest.so .
22 touch libarttest.so
23 ln -s ${LIBPATH}/libarttest.so libarttest2.so
25 # pwd likely has /, so it's a pain to put that into a sed rule.
29 exec ${RUN} --runtime-option -XX:NativeBridge=libnativebridgetest.so ${MODARGS} NativeBridgeMain
/art/compiler/utils/arm/
H A Dassembler_arm32.cc59 void Arm32Assembler::and_(Register rd, Register rn, const ShifterOperand& so, argument
61 EmitType01(cond, so.type(), AND, 0, rn, rd, so);
65 void Arm32Assembler::eor(Register rd, Register rn, const ShifterOperand& so, argument
67 EmitType01(cond, so.type(), EOR, 0, rn, rd, so);
71 void Arm32Assembler::sub(Register rd, Register rn, const ShifterOperand& so, argument
73 EmitType01(cond, so.type(), SUB, 0, rn, rd, so);
76 void Arm32Assembler::rsb(Register rd, Register rn, const ShifterOperand& so, argument
81 rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
87 add(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
93 adds(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
99 subs(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
105 adc(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
111 sbc(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
117 rsc(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
123 tst(Register rn, const ShifterOperand& so, Condition cond) argument
129 teq(Register rn, const ShifterOperand& so, Condition cond) argument
135 cmp(Register rn, const ShifterOperand& so, Condition cond) argument
140 cmn(Register rn, const ShifterOperand& so, Condition cond) argument
145 orr(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
151 orrs(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
157 mov(Register rd, const ShifterOperand& so, Condition cond) argument
162 movs(Register rd, const ShifterOperand& so, Condition cond) argument
167 bic(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
173 mvn(Register rd, const ShifterOperand& so, Condition cond) argument
178 mvns(Register rd, const ShifterOperand& so, Condition cond) argument
583 EmitType01(Condition cond, int type, Opcode opcode, int set_cc, Register rn, Register rd, const ShifterOperand& so) argument
684 EmitShiftImmediate(Condition cond, Shift opcode, Register rd, Register rm, const ShifterOperand& so) argument
701 EmitShiftRegister(Condition cond, Shift opcode, Register rd, Register rm, const ShifterOperand& so) argument
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H A Dassembler_thumb2.h64 void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
66 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
68 void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
69 void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
71 void rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
72 void rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
74 void add(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
76 void adds(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
78 void adc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
80 void sbc(Register rd, Register rn, const ShifterOperand& so, Conditio
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H A Dassembler_arm32.h42 void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
44 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
46 void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
47 void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
49 void rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
50 void rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
52 void add(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
54 void adds(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
56 void adc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
58 void sbc(Register rd, Register rn, const ShifterOperand& so, Conditio
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H A Dassembler_thumb2.cc54 void Thumb2Assembler::and_(Register rd, Register rn, const ShifterOperand& so, argument
56 EmitDataProcessing(cond, AND, 0, rn, rd, so);
60 void Thumb2Assembler::eor(Register rd, Register rn, const ShifterOperand& so, argument
62 EmitDataProcessing(cond, EOR, 0, rn, rd, so);
66 void Thumb2Assembler::sub(Register rd, Register rn, const ShifterOperand& so, argument
68 EmitDataProcessing(cond, SUB, 0, rn, rd, so);
72 void Thumb2Assembler::rsb(Register rd, Register rn, const ShifterOperand& so, argument
74 EmitDataProcessing(cond, RSB, 0, rn, rd, so);
78 void Thumb2Assembler::rsbs(Register rd, Register rn, const ShifterOperand& so, argument
80 EmitDataProcessing(cond, RSB, 1, rn, rd, so);
84 add(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
90 adds(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
96 subs(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
102 adc(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
108 sbc(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
114 rsc(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
120 tst(Register rn, const ShifterOperand& so, Condition cond) argument
126 teq(Register rn, const ShifterOperand& so, Condition cond) argument
132 cmp(Register rn, const ShifterOperand& so, Condition cond) argument
137 cmn(Register rn, const ShifterOperand& so, Condition cond) argument
142 orr(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
148 orrs(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
154 mov(Register rd, const ShifterOperand& so, Condition cond) argument
159 movs(Register rd, const ShifterOperand& so, Condition cond) argument
164 bic(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument
170 mvn(Register rd, const ShifterOperand& so, Condition cond) argument
175 mvns(Register rd, const ShifterOperand& so, Condition cond) argument
694 Is32BitDataProcessing(Condition cond ATTRIBUTE_UNUSED, Opcode opcode, bool set_cc, Register rn, Register rd, const ShifterOperand& so) argument
800 Emit32BitDataProcessing(Condition cond ATTRIBUTE_UNUSED, Opcode opcode, bool set_cc, Register rn, Register rd, const ShifterOperand& so) argument
885 Emit16BitDataProcessing(Condition cond, Opcode opcode, bool set_cc, Register rn, Register rd, const ShifterOperand& so) argument
1049 Emit16BitAddSub(Condition cond ATTRIBUTE_UNUSED, Opcode opcode, bool set_cc, Register rn, Register rd, const ShifterOperand& so) argument
1186 EmitDataProcessing(Condition cond, Opcode opcode, bool set_cc, Register rn, Register rd, const ShifterOperand& so) argument
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H A Dassembler_arm.h351 virtual void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
353 virtual void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
355 virtual void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
356 virtual void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
358 virtual void rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
359 virtual void rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
361 virtual void add(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
363 virtual void adds(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
365 virtual void adc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
367 virtual void sbc(Register rd, Register rn, const ShifterOperand& so, Conditio
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/art/test/
H A DAndroid.libnativebridgetest.mk24 ART_TARGET_LIBNATIVEBRIDGETEST_$(ART_PHONY_TEST_TARGET_SUFFIX) += $(ART_TARGET_TEST_OUT)/$(TARGET_ARCH)/libnativebridgetest.so
26 ART_TARGET_LIBNATIVEBRIDGETEST_$(2ND_ART_PHONY_TEST_TARGET_SUFFIX) += $(ART_TARGET_TEST_OUT)/$(TARGET_2ND_ARCH)/libnativebridgetest.so
H A DAndroid.libarttest.mk39 ART_TARGET_LIBARTTEST_$(ART_PHONY_TEST_TARGET_SUFFIX) += $(ART_TARGET_TEST_OUT)/$(TARGET_ARCH)/libarttest.so
41 ART_TARGET_LIBARTTEST_$(2ND_ART_PHONY_TEST_TARGET_SUFFIX) += $(ART_TARGET_TEST_OUT)/$(TARGET_2ND_ARCH)/libarttest.so
H A DAndroid.run-test.mk351 # The following tests use libarttest.so, which is linked against libartd.so, so will
352 # not work when libart.so is the one loaded.
569 TEST_ART_TARGET_SYNC_DEPS += $(ART_TARGET_TEST_OUT)/$(TARGET_ARCH)/libarttest.so
571 TEST_ART_TARGET_SYNC_DEPS += $(ART_TARGET_TEST_OUT)/$(TARGET_2ND_ARCH)/libarttest.so
575 TEST_ART_TARGET_SYNC_DEPS += $(ART_TARGET_TEST_OUT)/$(TARGET_ARCH)/libnativebridgetest.so
577 TEST_ART_TARGET_SYNC_DEPS += $(ART_TARGET_TEST_OUT)/$(TARGET_2ND_ARCH)/libnativebridgetest.so
/art/build/
H A DAndroid.common.mk30 # be relative to $ANDROID_BUILD_TOP so we can just adb pull from the top and not
74 ART_HOST_SHLIB_EXTENSION ?= .so
H A DAndroid.gtest.mk325 # $(3): LD_LIBRARY_PATH or undefined - used in case libartd.so is not in /system/lib/
335 $$($(2)TARGET_OUT_SHARED_LIBRARIES)/libjavacore.so \
364 $(HOST_OUT)/lib64/valgrind/vgpreload_core-amd64-linux.so \
365 $(HOST_OUT)/lib64/valgrind/vgpreload_core-x86-linux.so \
366 $(HOST_OUT)/lib64/valgrind/vgpreload_memcheck-amd64-linux.so \
367 $(HOST_OUT)/lib64/valgrind/vgpreload_memcheck-x86-linux.so
/art/
H A DAndroid.mk100 $(TARGET_OUT_SHARED_LIBRARIES)/libjavacore.so
102 ART_TARGET_DEPENDENCIES += $(2ND_TARGET_OUT_SHARED_LIBRARIES)/libjavacore.so
105 ART_HOST_DEPENDENCIES += $(2ND_HOST_OUT_SHARED_LIBRARIES)/libjavacore.so
386 adb shell setprop persist.sys.dalvik.vm.lib.2 libart.so
393 adb shell setprop persist.sys.dalvik.vm.lib.2 libartd.so
400 adb shell setprop persist.sys.dalvik.vm.lib.2 libdvm.so
410 adb shell setprop persist.sys.dalvik.vm.lib.2 libart.so
420 adb shell setprop persist.sys.dalvik.vm.lib.2 libartd.so
430 adb shell setprop persist.sys.dalvik.vm.lib.2 libart.so
440 adb shell setprop persist.sys.dalvik.vm.lib.2 libart.so
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/art/runtime/arch/mips64/
H A Dquick_entrypoints_mips64.S61 .cfi_rel_offset 28, 136 # Value from gp is pushed, so set the cfi offset accordingly.
119 .cfi_rel_offset 28, 56 # Value from gp is pushed, so set the cfi offset accordingly.
207 .cfi_rel_offset 28, 184 # Value from gp is pushed, so set the cfi offset accordingly.
517 * NOTE: "this" is first visable argument of the target, and so can be found in arg1/$a1.
1504 move $ra, $zero # link register is to here, so clobber with 0 for later checks
/art/runtime/arch/arm/
H A Dquick_entrypoints_arm.S318 * NOTE: "this" is first visible argument of the target, and so can be found in arg1/r1.
405 and r4, #0xFFFFFFF0 @ convention only aligns to 8B, so we have to ensure ART
583 .cfi_adjust_cfa_offset 4 @ Reset unwind info so following code unwinds.
928 // Save SP , so we can have static CFI info. r10 is saved in ref_and_args.
1048 mov lr, #0 @ link register is to here, so clobber with 0 for later checks
1346 * Note: data pointers point to previous element so we can use pre-index
1366 * Unroll the first two checks so we can quickly catch early mismatch
/art/runtime/arch/mips/
H A Dquick_entrypoints_mips.S452 * NOTE: "this" is first visable argument of the target, and so can be found in arg1/$a1.
520 sll $sp, $t0, 4 # so we have to ensure ART 16B alignment ourselves.
1231 move $ra, $zero # link register is to here, so clobber with 0 for later checks

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