Searched refs:NVPTX (Results 1 - 17 of 17) sorted by relevance
/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXRegisterInfo.cpp | 1 //===- NVPTXRegisterInfo.cpp - NVPTX Register Information -----------------===// 10 // This file contains the NVPTX implementation of the TargetRegisterInfo class. 15 #include "NVPTX.h" 30 if (RC == &NVPTX::Float32RegsRegClass) { 33 if (RC == &NVPTX::Float64RegsRegClass) { 35 } else if (RC == &NVPTX::Int64RegsRegClass) { 37 } else if (RC == &NVPTX::Int32RegsRegClass) { 39 } else if (RC == &NVPTX::Int16RegsRegClass) { 41 } else if (RC == &NVPTX::Int1RegsRegClass) { 43 } else if (RC == &NVPTX [all...] |
H A D | NVPTXInstrInfo.cpp | 1 //===- NVPTXInstrInfo.cpp - NVPTX Instruction Information -----------------===// 10 // This file contains the NVPTX implementation of the TargetInstrInfo class. 14 #include "NVPTX.h" 43 if (DestRC == &NVPTX::Int32RegsRegClass) 44 BuildMI(MBB, I, DL, get(NVPTX::IMOV32rr), DestReg) 46 else if (DestRC == &NVPTX::Int1RegsRegClass) 47 BuildMI(MBB, I, DL, get(NVPTX::IMOV1rr), DestReg) 49 else if (DestRC == &NVPTX::Float32RegsRegClass) 50 BuildMI(MBB, I, DL, get(NVPTX::FMOV32rr), DestReg) 52 else if (DestRC == &NVPTX [all...] |
H A D | NVPTXISelDAGToDAG.cpp | 1 //===-- NVPTXISelDAGToDAG.cpp - A dag to dag inst selector for NVPTX ------===// 10 // This file defines an instruction selector for the NVPTX target. 29 cl::desc("NVPTX Specifies: 0 use div.approx, 1 use div.full, 2 use" 35 cl::desc("NVPTX Specific: 0 use sqrt.approx, 1 use sqrt.rn."), 40 cl::desc("NVPTX Specific: Flush f32 subnormals to sign-preserving zero."), 45 /// NVPTX-specific DAG, ready for instruction scheduling. 531 return NVPTX::PTXLdStInstCode::GENERIC; 535 case llvm::ADDRESS_SPACE_LOCAL: return NVPTX::PTXLdStInstCode::LOCAL; 536 case llvm::ADDRESS_SPACE_GLOBAL: return NVPTX::PTXLdStInstCode::GLOBAL; 537 case llvm::ADDRESS_SPACE_SHARED: return NVPTX [all...] |
H A D | NVPTXFrameLowering.cpp | 1 //=======- NVPTXFrameLowering.cpp - NVPTX Frame Information ---*- C++ -*-=====// 10 // This file contains the NVPTX implementation of TargetFrameLowering class. 15 #include "NVPTX.h" 48 unsigned LocalReg = MRI.createVirtualRegister(&NVPTX::Int64RegsRegClass); 51 NVPTX::cvta_local_yes_64), 52 NVPTX::VRFrame).addReg(LocalReg); 54 MF.getSubtarget().getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR_64), 57 unsigned LocalReg = MRI.createVirtualRegister(&NVPTX::Int32RegsRegClass); 60 MF.getSubtarget().getInstrInfo()->get(NVPTX::cvta_local_yes), 61 NVPTX [all...] |
H A D | Makefile | 1 ##===- lib/Target/NVPTX/Makefile ---------------------------*- Makefile -*-===## 12 TARGET = NVPTX
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H A D | NVPTXAsmPrinter.cpp | 1 //===-- NVPTXAsmPrinter.cpp - NVPTX LLVM assembly writer ------------------===// 11 // of machine-dependent LLVM code to NVPTX assembly language. 18 #include "NVPTX.h" 57 cl::desc("NVPTX Specific: Emit Line numbers even without -G"), 62 cl::desc("NVPTX Specific: Emit source line in ptx file"), 160 if (static_cast<NVPTXTargetMachine &>(TM).getDrvInterface() == NVPTX::CUDA) 234 if (MI->getOpcode() == NVPTX::CALL_PROTOTYPE) { 308 if (RC == &NVPTX::Int1RegsRegClass) { 310 } else if (RC == &NVPTX::Int16RegsRegClass) { 312 } else if (RC == &NVPTX [all...] |
H A D | NVPTXReplaceImageHandles.cpp | 16 #include "NVPTX.h" 40 return "NVPTX Replace Image Handles"; 143 case NVPTX::LD_i64_avar: { 148 if (TM.getDrvInterface() == NVPTX::CUDA) { 167 case NVPTX::texsurf_handles: { 176 case NVPTX::nvvm_move_i64:
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H A D | NVPTXSubtarget.cpp | 1 //===- NVPTXSubtarget.cpp - NVPTX Subtarget Information -------------------===// 10 // This file implements the NVPTX specific subclass of TargetSubtarget. 56 if (TM.getDrvInterface() == NVPTX::CUDA)
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H A D | NVPTXTargetMachine.h | 1 //===-- NVPTXTargetMachine.h - Define TargetMachine for NVPTX ---*- C++ -*-===// 10 // This file declares the NVPTX specific subclass of TargetMachine. 30 NVPTX::DrvInterface drvInterface; 47 NVPTX::DrvInterface getDrvInterface() const { return drvInterface; }
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H A D | NVPTX.h | 1 //===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===// 11 // the LLVM NVPTX back-end. 79 namespace NVPTX { namespace in namespace:llvm 186 // Defines symbolic names for NVPTX registers. This defines a mapping from 191 // Defines symbolic names for the NVPTX instructions.
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H A D | NVPTXTargetMachine.cpp | 1 //===-- NVPTXTargetMachine.cpp - Define TargetMachine for NVPTX -----------===// 10 // Top-level implementation for the NVPTX target. 16 #include "NVPTX.h" 65 // but it's very NVPTX-specific. 96 drvInterface = NVPTX::NVCL; 98 drvInterface = NVPTX::CUDA; 210 assert(!RegAllocPass && "NVPTX uses no regalloc!"); 216 assert(!RegAllocPass && "NVPTX uses no regalloc!");
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H A D | NVPTXAsmPrinter.h | 1 //===-- NVPTXAsmPrinter.h - NVPTX LLVM assembly writer --------------------===// 11 // of machine-dependent LLVM code to NVPTX assembly language. 18 #include "NVPTX.h" 185 const char *getPassName() const override { return "NVPTX Assembly Printer"; } 309 NVPTX::CUDA) {
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H A D | NVPTXISelLowering.cpp | 9 // This file defines the interfaces that NVPTX uses to lower LLVM code into a 15 #include "NVPTX.h" 49 cl::desc("NVPTX Specific: schedule for register pressue"), cl::init(false)); 53 cl::desc("NVPTX Specific: FMA contraction (0: don't do it" 133 addRegisterClass(MVT::i1, &NVPTX::Int1RegsRegClass); 134 addRegisterClass(MVT::i16, &NVPTX::Int16RegsRegClass); 135 addRegisterClass(MVT::i32, &NVPTX::Int32RegsRegClass); 136 addRegisterClass(MVT::i64, &NVPTX::Int64RegsRegClass); 137 addRegisterClass(MVT::f32, &NVPTX::Float32RegsRegClass); 138 addRegisterClass(MVT::f64, &NVPTX [all...] |
/external/llvm/lib/Target/NVPTX/InstPrinter/ |
H A D | NVPTXInstPrinter.cpp | 16 #include "NVPTX.h" 99 if (Imm & NVPTX::PTXCvtMode::FTZ_FLAG) 103 if (Imm & NVPTX::PTXCvtMode::SAT_FLAG) 107 switch (Imm & NVPTX::PTXCvtMode::BASE_MASK) { 110 case NVPTX::PTXCvtMode::NONE: 112 case NVPTX::PTXCvtMode::RNI: 115 case NVPTX::PTXCvtMode::RZI: 118 case NVPTX::PTXCvtMode::RMI: 121 case NVPTX::PTXCvtMode::RPI: 124 case NVPTX [all...] |
/external/clang/include/clang/Basic/ |
H A D | TargetBuiltins.h | 65 /// \brief NVPTX builtins 66 namespace NVPTX { namespace in namespace:clang
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/external/clang/lib/Basic/ |
H A D | Targets.cpp | 1509 // The GPU profiles supported by the NVPTX backend 1564 NumRecords = clang::NVPTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
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/external/llvm/ |
H A D | configure | 4185 nvptx-*) llvm_cv_target_arch="NVPTX" ;; 5146 NVPTX) TARGET_HAS_JIT=0 5608 ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600" 5642 nvptx) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;; 5656 NVPTX) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;;
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