/external/llvm/lib/Target/XCore/Disassembler/ |
H A D | XCoreDisassembler.cpp | 241 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { argument 254 Op2 = (Op2High << 2) | fieldFromInstruction(Insn, 0, 2); 259 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, argument 269 Op2 = (Op2High << 2) | fieldFromInstruction(Insn, 2, 2); 347 unsigned Op1, Op2; local 348 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2); 353 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); 360 unsigned Op1, Op2; local 361 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2); 366 DecodeGRRegsRegisterClass(Inst, Op2, Addres 373 unsigned Op1, Op2; local 386 unsigned Op1, Op2; local 400 unsigned Op1, Op2; local 413 unsigned Op1, Op2; local 426 unsigned Op1, Op2; local 511 unsigned Op1, Op2; local 525 unsigned Op1, Op2; local 539 unsigned Op1, Op2, Op3; local 552 unsigned Op1, Op2, Op3; local 565 unsigned Op1, Op2, Op3; local 578 unsigned Op1, Op2, Op3; local 591 unsigned Op1, Op2, Op3; local 605 unsigned Op1, Op2, Op3; local 620 unsigned Op1, Op2, Op3; local 634 unsigned Op1, Op2, Op3; local 648 unsigned Op1, Op2, Op3, Op4, Op5, Op6; local 682 unsigned Op1, Op2, Op3, Op4, Op5; local 702 unsigned Op1, Op2, Op3; local 721 unsigned Op1, Op2, Op3; local [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreSelectionDAGInfo.h | 31 SDValue Op1, SDValue Op2,
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/external/llvm/include/llvm/Target/ |
H A D | TargetSelectionDAGInfo.h | 58 SDValue Op1, SDValue Op2, 75 SDValue Op1, SDValue Op2, 91 SDValue Op1, SDValue Op2, 105 SDValue Op1, SDValue Op2, 146 SDValue Op1, SDValue Op2, 56 EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument 73 EmitTargetCodeForMemmove(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument 89 EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument 103 EmitTargetCodeForMemcmp(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument 144 EmitTargetCodeForStrcmp(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument
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/external/llvm/lib/Target/ARM/ |
H A D | ARMSelectionDAGInfo.h | 54 SDValue Op1, SDValue Op2,
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/external/llvm/lib/Target/BPF/MCTargetDesc/ |
H A D | BPFMCCodeEmitter.cpp | 159 MCOperand Op2 = MI.getOperand(2); local 160 assert(Op2.isImm() && "Second operand is not immediate."); 161 Encoding |= Op2.getImm() & 0xffff;
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonExpandPredSpillCode.cpp | 102 MachineOperand &Op2 = MI->getOperand(2); local 118 NewMI->addOperand(Op2); 145 MachineOperand &Op2 = MI->getOperand(2); local 156 NewMI->addOperand(Op2); 187 MachineOperand &Op2 = MI->getOperand(2); local 197 NewMI->addOperand(Op2); 224 MachineOperand &Op2 = MI->getOperand(2); local 238 NewMI->addOperand(Op2);
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H A D | HexagonPeephole.cpp | 290 MachineOperand Op2 = MI->getOperand(S2); local 291 ChangeOpInto(MI->getOperand(S1), Op2);
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H A D | HexagonHardwareLoops.cpp | 519 const MachineOperand &Op2 = CondI->getOperand(2); local 523 if (Op2.isImm() || Op1.getReg() == IVReg) 524 EndValue = &Op2;
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/external/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 849 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger); 855 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
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H A D | SelectionDAG.h | 627 SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2, argument 633 Ops.push_back(Op2); 880 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2); 881 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 883 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 885 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 896 SDValue Op1, SDValue Op2); 898 SDValue Op1, SDValue Op2, SDValue Op3); 911 EVT VT2, SDValue Op1, SDValue Op2); 913 EVT VT2, SDValue Op1, SDValue Op2, SDValu [all...] |
H A D | FastISel.h | 403 unsigned Op2, bool Op2IsKill);
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
H A D | AArch64InstPrinter.cpp | 68 const MCOperand &Op2 = MI->getOperand(2); local 73 if (Op2.isImm() && Op2.getImm() == 0 && Op3.isImm()) { 109 if (Op2.isImm() && Op3.isImm()) { 112 int64_t immr = Op2.getImm(); 143 if (Op2.getImm() > Op3.getImm()) { 146 << ", #" << (Is64Bit ? 64 : 32) - Op2.getImm() << ", #" << Op3.getImm() + 1; 154 << ", #" << Op2.getImm() << ", #" << Op3.getImm() - Op2.getImm() + 1; 161 const MCOperand &Op2 local 675 const MCOperand &Op2 = MI->getOperand(3); local [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 712 SDValue Op2 = Op.getOperand(2); local 715 && Op1.getValueType() == Op2.getValueType() && "Invalid type"); 748 Op2 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op2); 755 Op2 = DAG.getNode(ISD::AND, DL, MaskTy, Op2, NotMask); 756 SDValue Val = DAG.getNode(ISD::OR, DL, MaskTy, Op1, Op2); 889 SDValue Op2 = Op.getOperand(2); local 917 Op2 = DAG.getNode(ISD::BITCAST, DL, VT, Op2); [all...] |
H A D | SelectionDAG.cpp | 319 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, argument 321 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 325 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 343 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, argument 345 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 350 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 888 SDValue Op1, SDValue Op2, 893 SDValue Ops[] = { Op1, Op2 }; 5397 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { argument 5401 if (Op1 == N->getOperand(0) && Op2 887 FindModifiedNodeSlot(SDNode *N, SDValue Op1, SDValue Op2, void *&InsertPos) argument 5426 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) argument 5432 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3, SDValue Op4) argument 5439 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3, SDValue Op4, SDValue Op5) argument 5502 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1, SDValue Op2) argument 5510 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3) argument 5558 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) argument 5566 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3) argument 5575 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3) argument 5723 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1, SDValue Op2) argument 5731 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3) argument 5760 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) argument 5768 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3) argument 5785 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2) argument 5794 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3) argument [all...] |
H A D | SelectionDAGBuilder.cpp | 2819 SDValue Op2 = getValue(I.getOperand(1)); 2821 Op2.getValueType(), Op2)); 2830 SDValue Op2 = getValue(I.getOperand(1)); 2845 Op1, Op2, nuw, nsw, exact); 2851 SDValue Op2 = getValue(I.getOperand(1)); 2854 DAG.getTargetLoweringInfo().getShiftAmountTy(Op2.getValueType()); 2857 if (!I.getType()->isVectorTy() && Op2.getValueType() != ShiftTy) { 2859 unsigned Op2Size = Op2.getValueType().getSizeInBits(); 2864 Op2 [all...] |
H A D | LegalizeIntegerTypes.cpp | 186 SDValue Op2 = GetPromotedInteger(N->getOperand(2)); local 190 Op2, N->getMemOperand(), N->getOrdering(), 221 SDValue Op2 = GetPromotedInteger(N->getOperand(2)); local 224 DAG.getVTList(Op2.getValueType(), N->getValueType(1), MVT::Other); 227 N->getBasePtr(), Op2, Op3, N->getMemOperand(), N->getSuccessOrdering(), 944 SDValue Op2 = GetPromotedInteger(N->getOperand(2)); local 946 N->getChain(), N->getBasePtr(), Op2, N->getMemOperand(), 1500 unsigned Op1, Op2; local 1503 case ISD::SHL: Op1 = ISD::SHL; Op2 = ISD::SRL; break; 1505 case ISD::SRA: Op1 = ISD::SRL; Op2 [all...] |
/external/llvm/lib/Analysis/ |
H A D | ConstantFolding.cpp | 1602 if (ConstantFP *Op2 = dyn_cast<ConstantFP>(Operands[1])) { 1603 if (Op2->getType() != Op1->getType()) 1606 double Op2V = getValueAsDouble(Op2); 1612 APFloat V2 = Op2->getValueAPF(); 1619 const APFloat &C2 = Op2->getValueAPF(); 1625 const APFloat &C2 = Op2->getValueAPF(); 1655 if (ConstantInt *Op2 = dyn_cast<ConstantInt>(Operands[1])) { 1669 Res = Op1->getValue().sadd_ov(Op2->getValue(), Overflow); 1672 Res = Op1->getValue().uadd_ov(Op2->getValue(), Overflow); 1675 Res = Op1->getValue().ssub_ov(Op2 [all...] |
/external/llvm/include/llvm/Transforms/Utils/ |
H A D | BuildLibCalls.h | 86 /// 'Op2' and return one value with the same type. If 'Op1/Op2' are long 87 /// double, 'l' is added as the suffix of name, if 'Op1/Op2' are float, we 89 Value *EmitBinaryFloatFnCall(Value *Op1, Value *Op2, StringRef Name,
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/external/llvm/lib/Target/AArch64/Utils/ |
H A D | AArch64BaseInfo.cpp | 837 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; local 843 Ops[5].getAsInteger(10, Op2); 844 Bits = (Op0 << 14) | (Op1 << 11) | (CRn << 7) | (CRm << 3) | Op2; 872 uint32_t Op2 = Bits & 0x7; local 875 + "_c" + utostr(CRm) + "_" + utostr(Op2);
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/external/llvm/include/llvm/Analysis/ |
H A D | ScalarEvolution.h | 623 const SCEV *getAddExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2, argument 628 Ops.push_back(Op2); 641 const SCEV *getMulExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2, argument 646 Ops.push_back(Op2);
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/external/llvm/lib/Transforms/Scalar/ |
H A D | LoopRerollPass.cpp | 1185 Value *Op2 = RootInst->getOperand(j); local 1191 if (Instruction *Op2I = dyn_cast<Instruction>(Op2)) 1195 DenseMap<Value *, Value *>::iterator BMI = BaseMap.find(Op2); 1197 Op2 = BMI->second; 1200 if (DRS.Roots[Iter-1] == (Instruction*) Op2) { 1201 Op2 = DRS.BaseInst; 1207 if (BaseInst->getOperand(Swapped ? unsigned(!j) : j) != Op2) { 1214 BaseInst->getOperand(!j) == Op2) {
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H A D | Scalarizer.cpp | 396 Scatterer Op2 = scatter(&SI, SI.getOperand(2)); local 398 assert(Op2.size() == NumElems && "Mismatched select"); 406 Res[I] = Builder.CreateSelect(Op0[I], Op1[I], Op2[I], 411 Res[I] = Builder.CreateSelect(Op0, Op1[I], Op2[I],
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/external/llvm/lib/Target/X86/AsmParser/ |
H A D | X86AsmParser.cpp | 174 ICToken Op2 = OperandStack.pop_back_val(); local 181 Val = Op1.second + Op2.second; 185 Val = Op1.second - Op2.second; 189 assert (Op1.first == IC_IMM && Op2.first == IC_IMM && 191 Val = Op1.second * Op2.second; 195 assert (Op1.first == IC_IMM && Op2.first == IC_IMM && 197 assert (Op2.second != 0 && "Division by zero!"); 198 Val = Op1.second / Op2.second; 202 assert (Op1.first == IC_IMM && Op2.first == IC_IMM && 204 Val = Op1.second | Op2 837 doSrcDstMatch(X86Operand &Op1, X86Operand &Op2) argument 2255 X86Operand &Op2 = (X86Operand &)*Operands[2]; local 2281 X86Operand &Op2 = (X86Operand &)*Operands[2]; local [all...] |
/external/llvm/lib/Transforms/Utils/ |
H A D | BuildLibCalls.cpp | 295 /// (e.g. 'fmin'). This function is known to take type matching 'Op1' and 'Op2' 296 /// and return one value with the same type. If 'Op1/Op2' are long double, 'l' 297 /// is added as the suffix of name, if 'Op1/Op2' is a float, we add a 'f' 299 Value *llvm::EmitBinaryFloatFnCall(Value *Op1, Value *Op2, StringRef Name, argument 306 Op1->getType(), Op2->getType(), nullptr); 307 CallInst *CI = B.CreateCall2(Callee, Op1, Op2, Name);
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H A D | SimplifyLibCalls.cpp | 1054 Value *Op1 = CI->getArgOperand(0), *Op2 = CI->getArgOperand(1); 1063 return EmitUnaryFloatFnCall(Op2, "exp2", B, Callee->getAttributes()); 1068 return EmitUnaryFloatFnCall(Op2, TLI->getName(LibFunc::exp10), B, 1072 ConstantFP *Op2C = dyn_cast<ConstantFP>(Op2); 1080 hasUnaryFloatFn(TLI, Op2->getType(), LibFunc::sqrt, LibFunc::sqrtf, 1082 hasUnaryFloatFn(TLI, Op2->getType(), LibFunc::fabs, LibFunc::fabsf,
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