| H A D | radeon_surface.c | 164 unsigned bpe, unsigned level,
186 surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples;
275 xalign = MAX2(1, surf_man->hw_info.group_bytes / surf->bpe);
279 xalign = MAX2((surf->bpe == 1) ? 64 : 32, xalign);
285 surf_minify(surf, surf->level+i, surf->bpe, i, xalign, yalign, zalign, offset);
306 xalign = MAX2(64, surf_man->hw_info.group_bytes / surf->bpe);
313 surf_minify(surf, surf->level+i, surf->bpe, i, xalign, yalign, zalign, offset);
332 xalign = surf_man->hw_info.group_bytes / (tilew * surf->bpe * surf->nsamples);
337 xalign = MAX2((surf->bpe == 1) ? 64 : 32, xalign);
346 surf_minify(surf, surf->level+i, surf->bpe,
162 surf_minify(struct radeon_surface *surf, struct radeon_surface_level *surflevel, unsigned bpe, unsigned level, uint32_t xalign, uint32_t yalign, uint32_t zalign, unsigned offset) argument
565 eg_surf_minify(struct radeon_surface *surf, struct radeon_surface_level *surflevel, unsigned bpe, unsigned level, unsigned slice_pt, unsigned mtilew, unsigned mtileh, unsigned mtileb, unsigned offset) argument
606 eg_surface_init_1d(struct radeon_surface_manager *surf_man, struct radeon_surface *surf, struct radeon_surface_level *level, unsigned bpe, uint64_t offset, unsigned start_level) argument
647 eg_surface_init_2d(struct radeon_surface_manager *surf_man, struct radeon_surface *surf, struct radeon_surface_level *level, unsigned bpe, unsigned tile_split, uint64_t offset, unsigned start_level) argument
1414 si_surf_minify(struct radeon_surface *surf, struct radeon_surface_level *surflevel, unsigned bpe, unsigned level, uint32_t xalign, uint32_t yalign, uint32_t zalign, uint32_t slice_align, unsigned offset) argument
1461 si_surf_minify_2d(struct radeon_surface *surf, struct radeon_surface_level *surflevel, unsigned bpe, unsigned level, unsigned slice_pt, uint32_t xalign, uint32_t yalign, uint32_t zalign, unsigned mtileb, unsigned offset) argument
1542 si_surface_init_1d(struct radeon_surface_manager *surf_man, struct radeon_surface *surf, struct radeon_surface_level *level, unsigned bpe, unsigned tile_mode, uint64_t offset, unsigned start_level) argument
1609 si_surface_init_2d(struct radeon_surface_manager *surf_man, struct radeon_surface *surf, struct radeon_surface_level *level, unsigned bpe, unsigned tile_mode, unsigned num_pipes, unsigned num_banks, unsigned tile_split, uint64_t offset, unsigned start_level) argument
1849 cik_get_2d_params(struct radeon_surface_manager *surf_man, unsigned bpe, unsigned nsamples, bool is_color, unsigned tile_mode, uint32_t *num_pipes, uint32_t *tile_split_ptr, uint32_t *num_banks, uint32_t *macro_tile_aspect, uint32_t *bank_w, uint32_t *bank_h) argument
2206 cik_surface_init_2d(struct radeon_surface_manager *surf_man, struct radeon_surface *surf, struct radeon_surface_level *level, unsigned bpe, unsigned tile_mode, unsigned tile_split, unsigned num_pipes, unsigned num_banks, uint64_t offset, unsigned start_level) argument
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