/external/valgrind/none/tests/arm/ |
H A D | neon128.c | 207 "vdup.i32 " #QD ", %3\n\t" \ 225 "vdup.i32 " #QD ", %3\n\t" \ 355 TESTINSN_imm("vmov.i32 q0", q0, 0x7); 358 TESTINSN_imm("vmov.i32 q5", q5, 0x700); 360 TESTINSN_imm("vmov.i32 q10", q10, 0x70000); 361 TESTINSN_imm("vmov.i32 q12", q12, 0x7000000); 362 TESTINSN_imm("vmov.i32 q13", q13, 0x7FF); 363 TESTINSN_imm("vmov.i32 q14", q14, 0x7FFFF); 369 TESTINSN_imm("vmvn.i32 q0", q0, 0x7); 372 TESTINSN_imm("vmvn.i32 q [all...] |
H A D | vfpv4_fma.c | 82 TESTINSN_bin_f64("vfma.f64 d0, d11, d12", d0, d11, i32, f2u0(-INFINITY), f2u1(-INFINITY), d12, i32, f2u0(NAN), f2u1(NAN)); 83 TESTINSN_bin_f64("vfma.f64 d7, d1, d6", d7, d1, i32, f2u0(INFINITY), f2u1(INFINITY), d6, i32, f2u0(NAN), f2u1(NAN)); 84 TESTINSN_bin_f64("vfma.f64 d0, d5, d2", d0, d5, i32, f2u0(NAN), f2u1(NAN), d2, i32, f2u0(-1.0), f2u1(-1.0)); 85 TESTINSN_bin_f64("vfma.f64 d10, d13, d15", d10, d13, i32, f2u0(NAN), f2u1(NAN), d15, i32, f2u0(0.0), f2u1(0.0)); 86 TESTINSN_bin_f64("vfma.f64 d10, d13, d15", d10, d13, i32, f2u0(NAN), f2u1(NAN), d15, i32, f2u [all...] |
H A D | neon64.c | 418 "vdup.i32 " #QD ", %3\n\t" \ 437 "vdup.i32 " #QD ", %3\n\t" \ 642 TESTINSN_imm("vmov.i32 d0", d0, 0x7); 645 TESTINSN_imm("vmov.i32 d5", d5, 0x700); 647 TESTINSN_imm("vmov.i32 d10", d10, 0x70000); 648 TESTINSN_imm("vmov.i32 d12", d12, 0x7000000); 649 TESTINSN_imm("vmov.i32 d13", d13, 0x7FF); 650 TESTINSN_imm("vmov.i32 d14", d14, 0x7FFFF); 657 TESTINSN_imm("vmvn.i32 d0", d0, 0x7); 660 TESTINSN_imm("vmvn.i32 d [all...] |
H A D | neon64.stdout.exp | 2 vmov.i32 d0, #0x7 :: Qd 0x00000007 0x00000007 3 vmov.i32 d0, #0x7 :: Qd 0x00000007 0x00000007 8 vmov.i32 d5, #0x700 :: Qd 0x00000700 0x00000700 9 vmov.i32 d5, #0x700 :: Qd 0x00000700 0x00000700 12 vmov.i32 d10, #0x70000 :: Qd 0x00070000 0x00070000 13 vmov.i32 d10, #0x70000 :: Qd 0x00070000 0x00070000 14 vmov.i32 d12, #0x7000000 :: Qd 0x07000000 0x07000000 15 vmov.i32 d12, #0x7000000 :: Qd 0x07000000 0x07000000 16 vmov.i32 d13, #0x7FF :: Qd 0x000007ff 0x000007ff 17 vmov.i32 d1 [all...] |
H A D | vfp.c | 727 "vdup.i32 " #QD ", %5\n\t" \ 1087 TESTINSN_scalar_to_core("vmov.32 r5, d0[0]", r5, d0, i32, f2u(NAN)); 1088 TESTINSN_scalar_to_core("vmov.32 r6, d5[1]", r6, d5, i32, f2u(INFINITY)); 1089 TESTINSN_scalar_to_core("vmov.32 r4, d10[0]", r4, d10, i32, f2u(-INFINITY)); 1090 TESTINSN_scalar_to_core("vmov.32 r5, d15[1]", r5, d15, i32, 0x11223344); 1091 TESTINSN_scalar_to_core("vmov.32 r9, d20[0]", r9, d20, i32, 0x11223344); 1092 TESTINSN_scalar_to_core("vmov.32 r8, d25[1]", r8, d25, i32, 0x11223344); 1093 TESTINSN_scalar_to_core("vmov.32 r0, d30[0]", r0, d30, i32, 0x11223344); 1094 TESTINSN_scalar_to_core("vmov.32 r2, d19[1]", r2, d19, i32, 0x11223344); 1095 TESTINSN_scalar_to_core("vmov.u16 r5, d31[0]", r5, d31, i32, f2 [all...] |
H A D | neon128.stdout.exp | 2 vmov.i32 q0, #0x7 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007 3 vmov.i32 q0, #0x7 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007 8 vmov.i32 q5, #0x700 :: Qd 0x00000700 0x00000700 0x00000700 0x00000700 9 vmov.i32 q5, #0x700 :: Qd 0x00000700 0x00000700 0x00000700 0x00000700 12 vmov.i32 q10, #0x70000 :: Qd 0x00070000 0x00070000 0x00070000 0x00070000 13 vmov.i32 q10, #0x70000 :: Qd 0x00070000 0x00070000 0x00070000 0x00070000 14 vmov.i32 q12, #0x7000000 :: Qd 0x07000000 0x07000000 0x07000000 0x07000000 15 vmov.i32 q12, #0x7000000 :: Qd 0x07000000 0x07000000 0x07000000 0x07000000 16 vmov.i32 q13, #0x7FF :: Qd 0x000007ff 0x000007ff 0x000007ff 0x000007ff 17 vmov.i32 q1 [all...] |
H A D | vfpv4_fma.stdout.exp | 26 vfma.f32 s0, s11, s12 :: Qd 0x55555555 0x7fc00000 Sm (i32)0xff800000 Sn (i32)0x7fc00000 27 vfma.f32 s7, s1, s6 :: Qd 0x55555555 0x7fc00000 Sm (i32)0x7f800000 Sn (i32)0x7fc00000 28 vfma.f32 s0, s5, s2 :: Qd 0x55555555 0x7fc00000 Sm (i32)0x7fc00000 Sn (i32)0xbf800000 29 vfma.f32 s10, s13, s15 :: Qd 0x55555555 0x7fc00000 Sm (i32)0x7fc00000 Sn (i32)0x00000000 30 vfma.f32 s10, s13, s15 :: Qd 0x55555555 0x7fc00000 Sm (i32)0x7fc00000 Sn (i32) [all...] |
H A D | vfp.stdout.exp | 77 vmov.32 r5, d0[0] :: Rd 0x7fc00000 Qm (i32)0x7fc00000 78 vmov.32 r6, d5[1] :: Rd 0x7f800000 Qm (i32)0x7f800000 79 vmov.32 r4, d10[0] :: Rd 0xff800000 Qm (i32)0xff800000 80 vmov.32 r5, d15[1] :: Rd 0x11223344 Qm (i32)0x11223344 81 vmov.32 r9, d20[0] :: Rd 0x11223344 Qm (i32)0x11223344 82 vmov.32 r8, d25[1] :: Rd 0x11223344 Qm (i32)0x11223344 83 vmov.32 r0, d30[0] :: Rd 0x11223344 Qm (i32)0x11223344 84 vmov.32 r2, d19[1] :: Rd 0x11223344 Qm (i32)0x11223344 85 vmov.u16 r5, d31[0] :: Rd 0x00000000 Qm (i32)0x7fc00000 86 vmov.u16 r3, d30[1] :: Rd 0x00007f80 Qm (i32) [all...] |
/external/llvm/test/MC/ARM/ |
H A D | vorr-vbic-illegal-cases.s | 4 vorr.i32 d2, #0xffffffff 5 vorr.i32 q2, #0xffffffff 6 vorr.i32 d2, #0xabababab 7 vorr.i32 q2, #0xabababab 12 @ CHECK: vorr.i32 d2, #0xffffffff 14 @ CHECK: vorr.i32 q2, #0xffffffff 16 @ CHECK: vorr.i32 d2, #0xabababab 18 @ CHECK: vorr.i32 q2, #0xabababab 24 vbic.i32 d2, #0xffffffff 25 vbic.i32 q [all...] |
H A D | vmov-vmvn-illegal-cases.s | 5 @ CHECK: vmov.i32 d2, #0xffffffab 7 @ CHECK: vmov.i32 q2, #0xffffffab 14 @ CHECK: vmvn.i32 d2, #0xffffffab 16 @ CHECK: vmvn.i32 q2, #0xffffffab 22 vmov.i32 d2, #0xffffffab 23 vmov.i32 q2, #0xffffffab 27 vmvn.i32 d2, #0xffffffab 28 vmvn.i32 q2, #0xffffffab
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H A D | neont2-mov-encoding.s | 8 vmov.i32 d16, #0x20 9 vmov.i32 d16, #0x2000 10 vmov.i32 d16, #0x200000 11 vmov.i32 d16, #0x20000000 12 vmov.i32 d16, #0x20FF 13 vmov.i32 d16, #0x20FFFF 19 @ CHECK: vmov.i32 d16, #0x20 @ encoding: [0xc2,0xef,0x10,0x00] 20 @ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0xc2,0xef,0x10,0x02] 21 @ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0xc2,0xef,0x10,0x04] 22 @ CHECK: vmov.i32 d1 [all...] |
H A D | vmov-vmvn-byte-replicate.s | 19 vmov.i32 d2, #0xffffffff 20 vmov.i32 q2, #0xffffffff 21 vmov.i32 d2, #0xabababab 22 vmov.i32 q2, #0xabababab 26 vmvn.i32 d2, #0xffffffff 27 vmvn.i32 q2, #0xffffffff 28 vmvn.i32 d2, #0xabababab 29 vmvn.i32 q2, #0xabababab
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H A D | neon-mov-encoding.s | 6 vmov.i32 d16, #0x20 7 vmov.i32 d16, #0x2000 8 vmov.i32 d16, #0x200000 9 vmov.i32 d16, #0x20000000 10 vmov.i32 d16, #0x20FF 11 vmov.i32 d16, #0x20FFFF 17 @ CHECK: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xf2] 18 @ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xf2] 19 @ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xf2] 20 @ CHECK: vmov.i32 d1 [all...] |
H A D | neon-bitwise-encoding.s | 22 vorr.i32 d16, #0x1000000 23 vorr.i32 q8, #0x1000000 24 vorr.i32 q8, #0x0 26 @ CHECK: vorr.i32 d16, #0x1000000 @ encoding: [0x11,0x07,0xc0,0xf2] 27 @ CHECK: vorr.i32 q8, #0x1000000 @ encoding: [0x51,0x07,0xc0,0xf2] 28 @ CHECK: vorr.i32 q8, #0x0 @ encoding: [0x50,0x01,0xc0,0xf2] 38 vbic.i32 d16, #0xFF000000 39 vbic.i32 q8, #0xFF000000 40 vbic.i32 d16, #0x00FF0000 41 vbic.i32 q [all...] |
/external/valgrind/drd/tests/ |
H A D | annotate_trace_memory.c | 9 volatile int32_t i32; variable 18 DRD_TRACE_VAR(i32); 34 i32 = 8; 35 i32++; 44 DRD_STOP_TRACING_VAR(i32);
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/external/valgrind/none/tests/s390x/ |
H A D | rounding-5.c | 10 volatile int32_t i32; variable 39 __asm__ volatile("cefbr %[r1],%[r2]" : [r1] "=f"(out) : [r2] "d"(i32)); 40 printf("cefbr: %"PRId32" -> %f\n", i32, out); 68 /* i32 -> f32 */ 69 i32 = INT32_MAX; 72 i32 = INT32_MIN;
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelDAGToDAG.cpp | 49 /// i32. 51 return CurDAG->getTargetConstant(Imm, MVT::i32); 92 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32); 93 Offset = CurDAG->getTargetConstant(0, MVT::i32); 102 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32); 103 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), MVT::i32); 120 Reg = CurDAG->getRegister(XCore::CP, MVT::i32); 123 Reg = CurDAG->getRegister(XCore::DP, MVT::i32); 143 MVT::i32, MskSize); 150 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32, [all...] |
H A D | XCoreISelLowering.cpp | 76 addRegisterClass(MVT::i32, &XCore::GRRegsRegClass); 88 // Use i32 for setcc operations results (slt, sgt, ...). 93 setOperationAction(ISD::BR_CC, MVT::i32, Expand); 94 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); 95 setOperationAction(ISD::ADDC, MVT::i32, Expand); 96 setOperationAction(ISD::ADDE, MVT::i32, Expand); 97 setOperationAction(ISD::SUBC, MVT::i32, Expand); 98 setOperationAction(ISD::SUBE, MVT::i32, Expand); 103 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom); 104 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Custo [all...] |
/external/clang/test/SemaCXX/ |
H A D | ms_integer_suffix.cpp | 16 static_assert(sizeof(0i32) == __SIZEOF_INT32__, "");
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 112 return CurDAG->getTargetConstant(bitPos, MVT::i32); 134 // type i32 where the negative literal is transformed into a positive literal 138 return CurDAG->getTargetConstant( - Imm, MVT::i32); 150 return CurDAG->getTargetConstant(Imm - 1, MVT::i32); 156 return CurDAG->getTargetConstant(Imm - 1, MVT::i32); 161 return CurDAG->getTargetConstant(Imm - 2, MVT::i32); 166 return CurDAG->getTargetConstant(Imm - 3, MVT::i32); 258 SDValue TargetConst = CurDAG->getTargetConstant(Val, MVT::i32); 259 SDNode *Result_1 = CurDAG->getMachineNode(Opcode, dl, MVT::i32, MVT::i32, [all...] |
/external/libopus/silk/ |
H A D | resampler_structs.h | 41 opus_int32 i32[ SILK_RESAMPLER_MAX_FIR_ORDER ]; member in union:_silk_resampler_state_struct::__anon9020
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/external/llvm/lib/Target/X86/ |
H A D | X86CallingConv.h | 29 LocVT = MVT::i32; 32 return false; // Continue the search, but now for i32.
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/external/llvm/lib/Target/ARM/ |
H A D | ARMSelectionDAGInfo.cpp | 53 EVT VT = MVT::i32; 69 DAG.getNode(ISD::ADD, dl, MVT::i32, Src, 70 DAG.getConstant(SrcOff, MVT::i32)), 82 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst, 83 DAG.getConstant(DstOff, MVT::i32)), 110 DAG.getNode(ISD::ADD, dl, MVT::i32, Src, 111 DAG.getConstant(SrcOff, MVT::i32)), 134 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst, 135 DAG.getConstant(DstOff, MVT::i32)), 177 // Extend or truncate the argument to be an i32 valu [all...] |
/external/webp/src/dsp/ |
H A D | yuv_sse2.c | 22 int32_t i32[4]; member in union:__anon16948 42 VP8kYtoRGBA[i].i32[0] = 43 VP8kYtoRGBA[i].i32[1] = 44 VP8kYtoRGBA[i].i32[2] = (i - 16) * kYScale + YUV_HALF2; 45 VP8kYtoRGBA[i].i32[3] = 0xff << YUV_FIX2; 47 VP8kUtoRGBA[i].i32[0] = 0; 48 VP8kUtoRGBA[i].i32[1] = -kUToG * (i - 128); 49 VP8kUtoRGBA[i].i32[2] = kUToB * (i - 128); 50 VP8kUtoRGBA[i].i32[3] = 0; 52 VP8kVtoRGBA[i].i32[ [all...] |
/external/llvm/lib/Target/R600/ |
H A D | AMDGPUISelDAGToDAG.cpp | 193 return CurDAG->getTargetConstant(Imm, MVT::i32); 201 R1 = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32); 202 R2 = CurDAG->getTargetConstant(0, MVT::i32); 205 R2 = CurDAG->getTargetConstant(0, MVT::i32); 212 R2 = CurDAG->getTargetConstant(0, MVT::i32); 278 assert(EltVT.bitsEq(MVT::i32)); 329 SDValue RegClass = CurDAG->getTargetConstant(RegClassID, MVT::i32); 343 RegSeqArgs[0] = CurDAG->getTargetConstant(RegClassID, MVT::i32); 354 CurDAG->getTargetConstant(TRI->getSubRegFromChannel(i), MVT::i32); 366 CurDAG->getTargetConstant(TRI->getSubRegFromChannel(i), MVT::i32); [all...] |