/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | brw_vec4.h | 163 src_reg src0 = src_reg(), 336 vec4_instruction *emit(enum opcode opcode, dst_reg dst, src_reg src0); 339 src_reg src0, src_reg src1); 342 src_reg src0, src_reg src1, src_reg src2); 347 vec4_instruction *MOV(dst_reg dst, src_reg src0); 348 vec4_instruction *NOT(dst_reg dst, src_reg src0); 349 vec4_instruction *RNDD(dst_reg dst, src_reg src0); 350 vec4_instruction *RNDE(dst_reg dst, src_reg src0); 351 vec4_instruction *RNDZ(dst_reg dst, src_reg src0); 352 vec4_instruction *FRC(dst_reg dst, src_reg src0); [all...] |
H A D | brw_eu_emit.c | 743 struct brw_reg src0, 748 brw_set_src0(p, insn, src0); 767 struct brw_reg src0, 788 assert(src0.file == BRW_GENERAL_REGISTER_FILE); 789 assert(src0.address_mode == BRW_ADDRESS_DIRECT); 790 assert(src0.nr < 128); 791 assert(src0.type == BRW_REGISTER_TYPE_F); 792 insn->bits2.da3src.src0_swizzle = src0.dw1.bits.swizzle; 793 insn->bits2.da3src.src0_subreg_nr = get_3src_subreg_nr(src0); 794 insn->bits2.da3src.src0_reg_nr = src0 740 brw_alu2(struct brw_compile *p, GLuint opcode, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1 ) argument 764 brw_alu3(struct brw_compile *p, GLuint opcode, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1, struct brw_reg src2) argument 933 brw_AVG(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) argument 955 brw_MUL(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) argument 1007 brw_JMPI(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) argument 1123 gen6_IF(struct brw_compile *p, uint32_t conditional, struct brw_reg src0, struct brw_reg src1) argument 1609 brw_CMP(struct brw_compile *p, struct brw_reg dest, GLuint conditional, struct brw_reg src0, struct brw_reg src1) argument 1722 brw_math2(struct brw_compile *p, struct brw_reg dest, GLuint function, struct brw_reg src0, struct brw_reg src1) argument 2235 brw_fb_WRITE(struct brw_compile *p, int dispatch_width, GLuint msg_reg_nr, struct brw_reg src0, GLuint msg_control, GLuint binding_table_index, GLuint msg_length, GLuint response_length, bool eot, bool header_present) argument 2297 brw_SAMPLE(struct brw_compile *p, struct brw_reg dest, GLuint msg_reg_nr, struct brw_reg src0, GLuint binding_table_index, GLuint sampler, GLuint writemask, GLuint msg_type, GLuint response_length, GLuint msg_length, GLuint header_present, GLuint simd_mode, GLuint return_format) argument 2425 brw_urb_WRITE(struct brw_compile *p, struct brw_reg dest, GLuint msg_reg_nr, struct brw_reg src0, bool allocate, bool used, GLuint msg_length, GLuint response_length, bool eot, bool writes_complete, GLuint offset, GLuint swizzle) argument 2555 brw_ff_sync(struct brw_compile *p, struct brw_reg dest, GLuint msg_reg_nr, struct brw_reg src0, bool allocate, GLuint response_length, bool eot) argument 2595 brw_svb_write(struct brw_compile *p, struct brw_reg dest, GLuint msg_reg_nr, struct brw_reg src0, GLuint binding_table_index, bool send_commit_msg) argument [all...] |
H A D | brw_fs.h | 146 fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0); 147 fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1); 149 fs_reg src0, fs_reg src1,fs_reg src2); 221 fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0); 222 fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1); 224 fs_reg src0, fs_reg src1, fs_reg src2); 277 struct brw_reg src0, 284 struct brw_reg src0, 316 fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0); 317 fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_re [all...] |
H A D | brw_wm_fp.c | 207 struct prog_src_register src0, 226 inst->SrcReg[0] = src0; 237 struct prog_src_register src0, 243 src0, src1, src2); 559 struct prog_src_register src0 = inst->SrcReg[0]; local 565 /* dst.y = mul src0.y, src1.y 571 src0, 578 GLuint z = GET_SWZ(src0.Swizzle, Z); 580 /* dst.xz = swz src0.1zzz 586 src_swizzle(src0, SWIZZLE_ON 200 emit_tex_op(struct brw_wm_compile *c, GLuint op, struct prog_dst_register dest, GLuint saturate, GLuint tex_src_unit, GLuint tex_src_target, GLuint tex_shadow, struct prog_src_register src0, struct prog_src_register src1, struct prog_src_register src2 ) argument 233 emit_op(struct brw_wm_compile *c, GLuint op, struct prog_dst_register dest, GLuint saturate, struct prog_src_register src0, struct prog_src_register src1, struct prog_src_register src2 ) argument 623 struct prog_src_register src0 = inst->SrcReg[0]; local 688 struct prog_src_register src0 = inst->SrcReg[0]; local 925 struct prog_src_register src0 = inst->SrcReg[0]; local [all...] |
H A D | brw_fs_emit.cpp | 170 struct brw_reg src0) 175 0, src0, 183 struct brw_reg src0, 187 brw_math2(p, dst, brw_math_function(inst->opcode), src0, src1); 193 struct brw_reg src0) 202 0, src0, 210 0, sechalf(src0), 220 struct brw_reg src0, 228 brw_math2(p, dst, op, src0, src1); 232 brw_math2(p, sechalf(dst), op, sechalf(src0), sechal 168 generate_math1_gen7(fs_inst *inst, struct brw_reg dst, struct brw_reg src0) argument 181 generate_math2_gen7(fs_inst *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) argument 191 generate_math1_gen6(fs_inst *inst, struct brw_reg dst, struct brw_reg src0) argument 218 generate_math2_gen6(fs_inst *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) argument 457 struct brw_reg src0 = brw_reg(src.file, src.nr, 1, local 480 struct brw_reg src0 = brw_reg(src.file, src.nr, 0, local [all...] |
H A D | brw_vec4_visitor.cpp | 35 src_reg src0, src_reg src1, src_reg src2) 39 this->src[0] = src0; 67 src_reg src0, src_reg src1, src_reg src2) 70 src0, src1, src2)); 75 vec4_visitor::emit(enum opcode opcode, dst_reg dst, src_reg src0, src_reg src1) argument 77 return emit(new(mem_ctx) vec4_instruction(this, opcode, dst, src0, src1)); 81 vec4_visitor::emit(enum opcode opcode, dst_reg dst, src_reg src0) argument 83 return emit(new(mem_ctx) vec4_instruction(this, opcode, dst, src0)); 94 vec4_visitor::op(dst_reg dst, src_reg src0) \ 97 src0); \ 33 vec4_instruction(vec4_visitor *v, enum opcode opcode, dst_reg dst, src_reg src0, src_reg src1, src_reg src2) argument 66 emit(enum opcode opcode, dst_reg dst, src_reg src0, src_reg src1, src_reg src2) argument 137 IF(src_reg src0, src_reg src1, uint32_t condition) argument 159 CMP(dst_reg dst, src_reg src0, src_reg src1, uint32_t condition) argument 209 emit_dp(dst_reg dst, src_reg src0, src_reg src1, unsigned elements) argument 283 emit_math2_gen6(enum opcode opcode, dst_reg dst, src_reg src0, src_reg src1) argument 320 emit_math2_gen4(enum opcode opcode, dst_reg dst, src_reg src0, src_reg src1) argument 329 emit_math(enum opcode opcode, dst_reg dst, src_reg src0, src_reg src1) argument 987 emit_bool_comparison(unsigned int op, dst_reg dst, src_reg src0, src_reg src1) argument [all...] |
H A D | brw_fs.cpp | 87 fs_inst::fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0) argument 92 this->src[0] = src0; 100 fs_inst::fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1) argument 105 this->src[0] = src0; 117 fs_reg src0, fs_reg src1, fs_reg src2) 122 this->src[0] = src0; 336 fs_visitor::emit(enum opcode opcode, fs_reg dst, fs_reg src0) argument 338 return emit(fs_inst(opcode, dst, src0)); 342 fs_visitor::emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1) argument 344 return emit(fs_inst(opcode, dst, src0, src 116 fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1, fs_reg src2) argument 348 emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1, fs_reg src2) argument 831 emit_math(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1) argument [all...] |
H A D | brw_eu.h | 833 struct brw_reg src0); 838 struct brw_reg src0, \ 844 struct brw_reg src0, \ 849 void brw_##OP(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0); 925 struct brw_reg src0, 938 struct brw_reg src0, 946 struct brw_reg src0, 953 struct brw_reg src0, 964 struct brw_reg src0, 993 struct brw_reg src0, [all...] |
/external/mesa3d/src/gallium/auxiliary/gallivm/ |
H A D | lp_bld_tgsi_aos.c | 460 LLVMValueRef src0, src1, src2; local 484 src0 = lp_build_emit_fetch(&bld->bld_base, inst, 0, LP_CHAN_ALL); 485 dst0 = lp_build_floor(&bld->bld_base.base, src0); 497 src0 = lp_build_emit_fetch(&bld->bld_base, inst, 0, LP_CHAN_ALL); 498 dst0 = lp_build_rcp(&bld->bld_base.base, src0); 503 src0 = lp_build_emit_fetch(&bld->bld_base, inst, 0, LP_CHAN_ALL); 504 tmp0 = lp_build_emit_llvm_unary(&bld->bld_base, TGSI_OPCODE_ABS, src0); 515 src0 = lp_build_emit_fetch(&bld->bld_base, inst, 0, LP_CHAN_ALL); 517 dst0 = lp_build_mul(&bld->bld_base.base, src0, src1); 521 src0 [all...] |
H A D | lp_bld_tgsi_info.c | 272 struct lp_tgsi_channel_info src0; local 275 analyse_src(ctx, &src0, &inst->Src[0].Register, chan); 278 if (is_immediate(&src0, 0.0f)) { 279 res[chan] = src0; 282 } else if (is_immediate(&src0, 1.0f)) { 285 res[chan] = src0;
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/external/mesa3d/src/gallium/auxiliary/tgsi/ |
H A D | tgsi_exec.c | 114 const union tgsi_exec_channel *src0, 118 dst->f[0] = src0->f[0] < src1->f[0] ? src1->f[0] : src0->f[0] > src2->f[0] ? src2->f[0] : src0->f[0]; 119 dst->f[1] = src0->f[1] < src1->f[1] ? src1->f[1] : src0->f[1] > src2->f[1] ? src2->f[1] : src0->f[1]; 120 dst->f[2] = src0->f[2] < src1->f[2] ? src1->f[2] : src0->f[2] > src2->f[2] ? src2->f[2] : src0 113 micro_clamp(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2) argument 125 micro_cmp(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2) argument 137 micro_cnd(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2) argument 270 micro_lrp(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2) argument 282 micro_mad(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2) argument 346 micro_seq(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 357 micro_sge(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 388 micro_sgt(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 409 micro_sle(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 420 micro_slt(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 431 micro_sne(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 891 micro_add(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 902 micro_div( union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1 ) argument 956 micro_lt( union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2, const union tgsi_exec_channel *src3 ) argument 970 micro_max(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 981 micro_min(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 992 micro_mul(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 1014 micro_pow( union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1 ) argument 1033 micro_sub(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3140 micro_shl(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3151 micro_and(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3162 micro_or(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3173 micro_xor(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3184 micro_mod(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3205 micro_idiv(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3216 micro_imax(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3227 micro_imin(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3238 micro_isge(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3249 micro_ishr(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3260 micro_islt(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3291 micro_uadd(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3302 micro_udiv(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3313 micro_umad(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2) argument 3325 micro_umax(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3336 micro_umin(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3347 micro_umod(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3358 micro_umul(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3369 micro_useq(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3380 micro_usge(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3391 micro_ushr(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3402 micro_uslt(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3413 micro_usne(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1) argument 3434 micro_ucmp(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src0, const union tgsi_exec_channel *src1, const union tgsi_exec_channel *src2) argument [all...] |
H A D | tgsi_ureg.h | 674 struct ureg_src src0, \ 690 ureg_emit_src( ureg, src0 ); \ 699 struct ureg_src src0, \ 717 ureg_emit_src( ureg, src0 ); \ 725 struct ureg_src src0, \ 742 ureg_emit_src( ureg, src0 ); \ 752 struct ureg_src src0, \ 772 ureg_emit_src( ureg, src0 ); \ 783 struct ureg_src src0, \ 801 ureg_emit_src( ureg, src0 ); \ [all...] |
/external/mesa3d/src/gallium/drivers/i915/ |
H A D | i915_fpc_translate.c | 498 uint src0, src1, src2, flags; local 503 src0 = src_vector(p, &inst->Src[0], fs); 508 src0, negate(src0, 1, 1, 1, 1), 0); 516 src0 = src_vector(p, &inst->Src[0], fs); 523 negate(src0, 1, 1, 1, 1), 0, 0); 532 src0 = src_vector(p, &inst->Src[0], fs); 538 0, src0, src2, src1); /* NOTE: order of src2, src1 */ 542 src0 = src_vector(p, &inst->Src[0], fs); 548 src0, i915_emit_const1 [all...] |
H A D | i915_fpc_emit.c | 116 uint saturate, uint src0, uint src1, uint src2) 125 if (GET_UREG_TYPE(src0) == REG_TYPE_CONST) 140 s[0] = src0; 156 src0 = s[0]; 163 *(p->csr++) = (op | A0_DEST(dest) | mask | saturate | A0_SRC0(src0)); 164 *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1)); 228 coord, 0, 0 ); /* src0, src1, src2 */ 112 i915_emit_arith(struct i915_fp_compile * p, uint op, uint dest, uint mask, uint saturate, uint src0, uint src1, uint src2) argument
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/external/mesa3d/src/mesa/drivers/dri/i915/ |
H A D | i915_fragprog.c | 409 GLuint src0, src1, src2, flags; local 414 src0 = src_vector(p, &inst->SrcReg[0], program); 419 src0, negate(src0, 1, 1, 1, 1), 0); 427 src0 = src_vector(p, &inst->SrcReg[0], program); 430 i915_emit_arith(p, A0_CMP, get_result_vector(p, inst), get_result_flags(inst), 0, src0, src2, src1); /* NOTE: order of src2, src1 */ 434 src0 = src_vector(p, &inst->SrcReg[0], program); 443 src0, 513 src0 = src_vector(p, &inst->SrcReg[0], program); 519 swizzle(src0, [all...] |
/external/mesa3d/src/gallium/drivers/svga/ |
H A D | svga_tgsi_insn.c | 296 struct src_register *src0) 303 src0_swizzle = src0->base.swizzle; 312 src0->base.swizzle = SVGA3DSWIZZLE_NONE; 314 if (!emit_op1( emit, inst_token( SVGA3DOP_MOV ), dst, *src0 )) 317 *src0 = src( dst ); 318 src0->base.swizzle = src0_swizzle; 335 struct src_register src0 ) 337 return emit_op1( emit, inst, dest, src0 ); 351 struct src_register src0, 359 type0 = SVGA3dShaderGetRegType( src0 294 emit_repl( struct svga_shader_emitter *emit, SVGA3dShaderDestToken dst, struct src_register *src0) argument 348 submit_op2( struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1 ) argument 393 submit_op3( struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1, struct src_register src2 ) argument 463 submit_op4( struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1, struct src_register src2, struct src_register src3) argument 547 submit_lrp(struct svga_shader_emitter *emit, SVGA3dShaderDestToken dst, struct src_register src0, struct src_register src1, struct src_register src2) argument 781 const struct src_register src0 = translate_src_register( local 805 struct src_register src0 = translate_src_register( local 856 const struct src_register src0 = translate_src_register( local 883 const struct src_register src0 = translate_src_register(emit, &insn->Src[0]); local 909 const struct src_register src0 = translate_src_register( local 950 const struct src_register src0 = translate_src_register( local 983 const struct src_register src0 = translate_src_register( local 1014 const struct src_register src0 = translate_src_register( local 1035 do_emit_sincos(struct svga_shader_emitter *emit, SVGA3dShaderDestToken dst, struct src_register src0) argument 1047 struct src_register src0 = translate_src_register( local 1070 struct src_register src0 = translate_src_register( local 1095 struct src_register src0 = translate_src_register( local 1116 struct src_register src0 = translate_src_register( local 1155 struct src_register src0 = translate_src_register( local 1174 struct src_register src0, srcIn; local 1271 emit_conditional(struct svga_shader_emitter *emit, unsigned compare_func, SVGA3dShaderDestToken dst, struct src_register src0, struct src_register src1, struct src_register pass, struct src_register fail) argument 1349 emit_select(struct svga_shader_emitter *emit, unsigned compare_func, SVGA3dShaderDestToken dst, struct src_register src0, struct src_register src1 ) argument 1399 struct src_register src0 = translate_src_register( local 1416 const struct src_register src0 = local 1633 struct src_register src0 = local 1859 struct src_register src0; local 1914 struct src_register src0 = translate_src_register( local 1949 const struct src_register src0 = translate_src_register( local 2002 const struct src_register src0 = translate_src_register( local 2031 const struct src_register src0 = translate_src_register( local 2096 struct src_register src0 = local 2186 const struct src_register src0 = translate_src_register( local 2264 struct src_register src0; local 2290 struct src_register src0 = local 2403 const struct src_register src0 = local [all...] |
H A D | svga_tgsi_emit.h | 183 struct src_register src0 ) 187 emit_src( emit, src0 )); 193 struct src_register src0, 198 emit_src( emit, src0 ) && 205 struct src_register src0, 211 emit_src( emit, src0 ) && 220 struct src_register src0, 227 emit_src( emit, src0 ) && 190 emit_op2( struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1 ) argument 202 emit_op3( struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1, struct src_register src2 ) argument 217 emit_op4( struct svga_shader_emitter *emit, SVGA3dShaderInstToken inst, SVGA3dShaderDestToken dest, struct src_register src0, struct src_register src1, struct src_register src2, struct src_register src3) argument
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/external/opencv/cv/src/ |
H A D | cvderiv.cpp | 575 const int *src0 = src[-1], *src1 = src[0], *src2 = src[1]; local 580 int s0 = src0[i] - src1[i]*2 + src2[i] + src1[i+width]; 581 int s1 = src0[i+1] - src1[i+1]*2 + src2[i+1] + src1[i+width+1]; 586 dst[i] = (short)(src0[i] - src1[i]*2 + src2[i] + src1[i+width]); 591 int s0 = src0[i] - src1[i]*2 + src2[i] + 592 src0[i+width] + src1[i+width]*2 + src2[i+width]; 593 int s1 = src0[i+1] - src1[i+1]*2 + src2[i+1] + 594 src0[i+width+1] + src1[i+width+1]*2 + src2[i+width+1]; 600 int s0 = CV_DESCALE(src0[i] - src1[i]*2 + src2[i] + 601 src0[ 609 const int *src0 = src[-2], *src1 = src[-1], *src2 = src[0], *src3 = src[1], *src4 = src[2]; local 717 const float *src0 = src[-1], *src1 = src[0], *src2 = src[1]; local 751 const float *src0 = src[-2], *src1 = src[-1], *src2 = src[0], *src3 = src[1], *src4 = src[2]; local [all...] |
H A D | cvsegmentation.cpp | 351 CvMat sstub0, *src0; local 354 CV_CALL( src0 = cvGetMat( srcarr, &sstub0 )); 357 if( CV_MAT_TYPE(src0->type) != CV_8UC3 ) 360 if( !CV_ARE_TYPES_EQ( src0, dst0 )) 363 if( !CV_ARE_SIZES_EQ( src0, dst0 )) 381 src_pyramid[0] = src0; 393 CV_CALL( mask0 = cvCreateMat( src0->rows, src0->cols, CV_8UC1 ));
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/external/mesa3d/src/gallium/drivers/svga/svgadump/ |
H A D | svga_shader.h | 193 struct sh_srcreg src0; member in struct:sh_src2op 208 struct sh_srcreg src0; member in struct:sh_binaryop 216 struct sh_srcreg src0; member in struct:sh_trinaryop
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/external/mesa3d/src/mesa/drivers/dri/r200/ |
H A D | r200_vertprog.c | 369 #define ZERO_SRC_0 (((o_inst->src0 & ~(0xfff << R200_VPI_IN_X_SHIFT)) \ 387 #define UNUSED_SRC_0 ((o_inst->src0 & ~15) | 9) 655 o_inst->src0 = MAKE_VSF_SOURCE(t_src_index(vp, &src[2]), 677 o_inst->src0 = MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), 713 o_inst->src0 = MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), 727 o_inst->src0 = MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), 742 o_inst->src0 = MAKE_VSF_SOURCE(u_temp_i, 759 o_inst->src0 = t_src(vp, &src[0]); 778 o_inst->src0 = t_src(vp, &src[0]); 805 o_inst->src0 [all...] |
/external/pdfium/core/src/fxcodec/jbig2/ |
H A D | JBig2_Image.cpp | 202 FX_DWORD src0, src1, src, dest, s1, s2, m1, m2, m3; local 382 src0 = src1; 384 src = (((src0 << 8) | src1) >> s1) & 0xff; 389 src0 = src1; 395 src = (((src0 << 8) | src1) >> s1) & 0xff; 414 src0 = src1; 416 src = (((src0 << 8) | src1) >> s1) & 0xff; 421 src0 = src1; 427 src = (((src0 << 8) | src1) >> s1) & 0xff; 446 src0 [all...] |
/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
H A D | nv50_ir_from_tgsi.cpp | 1439 Value *src0 = fetchSrc(0, 0), *src1 = fetchSrc(1, 0); 1442 mkOp2(OP_MUL, TYPE_F32, dotp, src0, src1); 1445 src0 = fetchSrc(0, c); 1447 mkOp3(OP_MAD, TYPE_F32, dotp, src0, src1, dotp); 1730 Value *src0, *src1, *src2; 1776 src0 = fetchSrc(0, c); 1778 mkOp2(op, dstTy, dst0[c], src0, src1); 1785 src0 = fetchSrc(0, c); 1788 mkOp3(op, dstTy, dst0[c], src0, src1, src2); 1806 src0 [all...] |
H A D | nv50_ir_build_util.cpp | 79 Value *src0, Value *src1) 84 insn->setSrc(0, src0); 93 Value *src0, Value *src1, Value *src2) 98 insn->setSrc(0, src0); 224 Value *src0, Value *src1, Value *src2) 232 insn->setSrc(0, src0); 261 BuildUtil::mkQuadop(uint8_t q, Value *def, uint8_t l, Value *src0, Value *src1) argument 263 Instruction *quadop = mkOp2(OP_QUADOP, TYPE_F32, def, src0, src1); 78 mkOp2(operation op, DataType ty, Value *dst, Value *src0, Value *src1) argument 92 mkOp3(operation op, DataType ty, Value *dst, Value *src0, Value *src1, Value *src2) argument 223 mkCmp(operation op, CondCode cc, DataType ty, Value *dst, Value *src0, Value *src1, Value *src2) argument
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/external/jpeg/ |
H A D | jccolor.c | 322 UINT32 src0 = *in++; local 326 *out0++ = PACK(B0(src0), B3(src0), B2(src1), B1(src2)); 327 *out1++ = PACK(B1(src0), B0(src1), B3(src1), B2(src2)); 328 *out2++ = PACK(B2(src0), B1(src1), B0(src2), B3(src2));
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