Searched refs:immediate (Results 1 - 10 of 10) sorted by relevance
/art/compiler/utils/arm/ |
H A D | assembler_thumb2.cc | 31 uint32_t immediate, 34 shifter_op->immed_ = immediate; 40 if (immediate < (1 << 12)) { // Less than (or equal to) 12 bits can always be done. 43 return ArmAssembler::ModifiedImmediate(immediate) != kInvalidModifiedImmediate; 47 return ArmAssembler::ModifiedImmediate(immediate) != kInvalidModifiedImmediate; 50 return ArmAssembler::ModifiedImmediate(immediate) != kInvalidModifiedImmediate; 704 // Check special case for SP relative ADD and SUB immediate. 706 // If the immediate is in range, use 16 bit. 708 if (so.GetImmediate() < (1 << 9)) { // 9 bit immediate. 712 if (so.GetImmediate() < (1 << 10)) { // 10 bit immediate 28 ShifterOperandCanHold(Register rd ATTRIBUTE_UNUSED, Register rn ATTRIBUTE_UNUSED, Opcode opcode, uint32_t immediate, ShifterOperand* shifter_op) argument 903 uint8_t immediate = 0; local 1061 uint32_t immediate = 0; // Should be at most 9 bits but keep the full immediate for CHECKs. local [all...] |
H A D | assembler_arm32.cc | 28 bool Arm32Assembler::ShifterOperandCanHoldArm32(uint32_t immediate, ShifterOperand* shifter_op) { argument 29 // Avoid the more expensive test for frequent small immediate values. 30 if (immediate < (1 << kImmed8Bits)) { 34 shifter_op->immed_ = immediate; 37 // Note that immediate must be unsigned for the test to work correctly. 39 uint32_t imm8 = (immediate << 2*rot) | (immediate >> (32 - 2*rot)); 54 uint32_t immediate, 56 return ShifterOperandCanHoldArm32(immediate, shifter_op); 51 ShifterOperandCanHold(Register rd ATTRIBUTE_UNUSED, Register rn ATTRIBUTE_UNUSED, Opcode opcode ATTRIBUTE_UNUSED, uint32_t immediate, ShifterOperand* shifter_op) argument
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H A D | assembler_arm32.h | 149 // Returns false if the immediate cannot be encoded. 280 uint32_t immediate, 286 // Emit data (e.g. encoded instruction or immediate) to the 369 bool ShifterOperandCanHoldArm32(uint32_t immediate, ShifterOperand* shifter_op);
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H A D | assembler_thumb2.h | 186 // Returns false if the immediate cannot be encoded. 319 uint32_t immediate, 325 // Emit data (e.g. encoded instruction or immediate) to the.
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H A D | assembler_arm.h | 274 I = 1 << 25, // immediate shifter operand (or not) 467 // Returns false if the immediate cannot be encoded. 642 // Returns whether the `immediate` can fit in a `ShifterOperand`. If yes, 647 uint32_t immediate,
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/art/compiler/utils/x86/ |
H A D | assembler_x86.cc | 1025 void X86Assembler::testl(Register reg, const Immediate& immediate) { argument 1029 if (immediate.is_uint8() && reg < 4) { 1030 // Use zero-extended 8-bit immediate. 1037 EmitUint8(immediate.value() & 0xFF); 1041 EmitImmediate(immediate); 1045 EmitImmediate(immediate); 1641 const Immediate& immediate) { 1644 if (immediate.is_int8()) { 1645 // Use sign-extended 8-bit immediate. 1648 EmitUint8(immediate 1639 EmitComplex(int reg_or_opcode, const Operand& operand, const Immediate& immediate) argument [all...] |
H A D | assembler_x86.h | 629 void EmitComplex(int rm, const Operand& operand, const Immediate& immediate);
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/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.cc | 80 CHECK(imm.is_int32()); // pushq only supports 32b immediate. 1255 CHECK(imm.is_int32()); // cmpq only supports 32b immediate. 1270 CHECK(imm.is_int32()); // cmpq only supports 32b immediate. 1309 void X86_64Assembler::testl(CpuRegister reg, const Immediate& immediate) { argument 1313 if (immediate.is_uint8() && reg.AsRegister() < 4) { 1314 // Use zero-extended 8-bit immediate. 1321 EmitUint8(immediate.value() & 0xFF); 1325 EmitImmediate(immediate); 1330 EmitImmediate(immediate); 1376 CHECK(imm.is_int32()); // andq only supports 32b immediate 2136 EmitComplex(uint8_t reg_or_opcode, const Operand& operand, const Immediate& immediate) argument [all...] |
H A D | assembler_x86_64.h | 33 // Encodes an immediate value for operands. 781 void EmitComplex(uint8_t rm, const Operand& operand, const Immediate& immediate);
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/art/compiler/optimizing/ |
H A D | code_generator_arm64.cc | 1274 ? static_cast<uint32_t>(rhs.immediate() & kMaxIntShiftValue) 1275 : static_cast<uint32_t>(rhs.immediate() & kMaxLongShiftValue); 1551 // 0.0 is the only immediate that can be encoded directly in a FCMP instruction. 1765 if ((arm64_cond != gt && arm64_cond != le) && rhs.IsImmediate() && (rhs.immediate() == 0)) {
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